rama982/kernel_xiaomi_lancelot

Auteur	SHA1 Message	Date
Ard Biesheuvel	0bcbfa51a7 drm: disable uncached DMA optimization for ARM and arm64	il y a 5 ans
Gabriel Krisman Bertazi	f9a87bd7d5 drm: Move drm_clflush prototypes to drm_cache header file	il y a 8 ans
Huacai Chen	221004c66a drm: Loongson-3 doesn't fully support wc memory	il y a 8 ans
Dave Airlie	4b0e4e4af6 drm: add helper to check for wc memory support	il y a 8 ans
Dave Airlie	c9c97b8c75 drm/ttm: consolidate cache flushing code in one place.	il y a 15 ans