pasemi-cpufreq.c 6.6 KB

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  1. /*
  2. * Copyright (C) 2007 PA Semi, Inc
  3. *
  4. * Authors: Egor Martovetsky <egor@pasemi.com>
  5. * Olof Johansson <olof@lixom.net>
  6. *
  7. * Maintained by: Olof Johansson <olof@lixom.net>
  8. *
  9. * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
  10. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. */
  27. #include <linux/cpufreq.h>
  28. #include <linux/timer.h>
  29. #include <linux/module.h>
  30. #include <linux/of_address.h>
  31. #include <asm/hw_irq.h>
  32. #include <asm/io.h>
  33. #include <asm/prom.h>
  34. #include <asm/time.h>
  35. #include <asm/smp.h>
  36. #define SDCASR_REG 0x0100
  37. #define SDCASR_REG_STRIDE 0x1000
  38. #define SDCPWR_CFGA0_REG 0x0100
  39. #define SDCPWR_PWST0_REG 0x0000
  40. #define SDCPWR_GIZTIME_REG 0x0440
  41. /* SDCPWR_GIZTIME_REG fields */
  42. #define SDCPWR_GIZTIME_GR 0x80000000
  43. #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
  44. /* Offset of ASR registers from SDC base */
  45. #define SDCASR_OFFSET 0x120000
  46. static void __iomem *sdcpwr_mapbase;
  47. static void __iomem *sdcasr_mapbase;
  48. /* Current astate, is used when waking up from power savings on
  49. * one core, in case the other core has switched states during
  50. * the idle time.
  51. */
  52. static int current_astate;
  53. /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
  54. static struct cpufreq_frequency_table pas_freqs[] = {
  55. {0, 0, 0},
  56. {0, 1, 0},
  57. {0, 2, 0},
  58. {0, 3, 0},
  59. {0, 4, 0},
  60. {0, 0, CPUFREQ_TABLE_END},
  61. };
  62. /*
  63. * hardware specific functions
  64. */
  65. static int get_astate_freq(int astate)
  66. {
  67. u32 ret;
  68. ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
  69. return ret & 0x3f;
  70. }
  71. static int get_cur_astate(int cpu)
  72. {
  73. u32 ret;
  74. ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
  75. ret = (ret >> (cpu * 4)) & 0x7;
  76. return ret;
  77. }
  78. static int get_gizmo_latency(void)
  79. {
  80. u32 giztime, ret;
  81. giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
  82. /* just provide the upper bound */
  83. if (giztime & SDCPWR_GIZTIME_GR)
  84. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
  85. else
  86. ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
  87. return ret;
  88. }
  89. static void set_astate(int cpu, unsigned int astate)
  90. {
  91. unsigned long flags;
  92. /* Return if called before init has run */
  93. if (unlikely(!sdcasr_mapbase))
  94. return;
  95. local_irq_save(flags);
  96. out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
  97. local_irq_restore(flags);
  98. }
  99. int check_astate(void)
  100. {
  101. return get_cur_astate(hard_smp_processor_id());
  102. }
  103. void restore_astate(int cpu)
  104. {
  105. set_astate(cpu, current_astate);
  106. }
  107. /*
  108. * cpufreq functions
  109. */
  110. static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
  111. {
  112. struct cpufreq_frequency_table *pos;
  113. const u32 *max_freqp;
  114. u32 max_freq;
  115. int cur_astate;
  116. struct resource res;
  117. struct device_node *cpu, *dn;
  118. int err = -ENODEV;
  119. cpu = of_get_cpu_node(policy->cpu, NULL);
  120. if (!cpu)
  121. goto out;
  122. max_freqp = of_get_property(cpu, "clock-frequency", NULL);
  123. of_node_put(cpu);
  124. if (!max_freqp) {
  125. err = -EINVAL;
  126. goto out;
  127. }
  128. /* we need the freq in kHz */
  129. max_freq = *max_freqp / 1000;
  130. dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
  131. if (!dn)
  132. dn = of_find_compatible_node(NULL, NULL,
  133. "pasemi,pwrficient-sdc");
  134. if (!dn)
  135. goto out;
  136. err = of_address_to_resource(dn, 0, &res);
  137. of_node_put(dn);
  138. if (err)
  139. goto out;
  140. sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
  141. if (!sdcasr_mapbase) {
  142. err = -EINVAL;
  143. goto out;
  144. }
  145. dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
  146. if (!dn)
  147. dn = of_find_compatible_node(NULL, NULL,
  148. "pasemi,pwrficient-gizmo");
  149. if (!dn) {
  150. err = -ENODEV;
  151. goto out_unmap_sdcasr;
  152. }
  153. err = of_address_to_resource(dn, 0, &res);
  154. of_node_put(dn);
  155. if (err)
  156. goto out_unmap_sdcasr;
  157. sdcpwr_mapbase = ioremap(res.start, 0x1000);
  158. if (!sdcpwr_mapbase) {
  159. err = -EINVAL;
  160. goto out_unmap_sdcasr;
  161. }
  162. pr_debug("init cpufreq on CPU %d\n", policy->cpu);
  163. pr_debug("max clock-frequency is at %u kHz\n", max_freq);
  164. pr_debug("initializing frequency table\n");
  165. /* initialize frequency table */
  166. cpufreq_for_each_entry(pos, pas_freqs) {
  167. pos->frequency = get_astate_freq(pos->driver_data) * 100000;
  168. pr_debug("%d: %d\n", (int)(pos - pas_freqs), pos->frequency);
  169. }
  170. cur_astate = get_cur_astate(policy->cpu);
  171. pr_debug("current astate is at %d\n",cur_astate);
  172. policy->cur = pas_freqs[cur_astate].frequency;
  173. ppc_proc_freq = policy->cur * 1000ul;
  174. return cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
  175. out_unmap_sdcasr:
  176. iounmap(sdcasr_mapbase);
  177. out:
  178. return err;
  179. }
  180. static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  181. {
  182. /*
  183. * We don't support CPU hotplug. Don't unmap after the system
  184. * has already made it to a running state.
  185. */
  186. if (system_state >= SYSTEM_RUNNING)
  187. return 0;
  188. if (sdcasr_mapbase)
  189. iounmap(sdcasr_mapbase);
  190. if (sdcpwr_mapbase)
  191. iounmap(sdcpwr_mapbase);
  192. return 0;
  193. }
  194. static int pas_cpufreq_target(struct cpufreq_policy *policy,
  195. unsigned int pas_astate_new)
  196. {
  197. int i;
  198. pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
  199. policy->cpu,
  200. pas_freqs[pas_astate_new].frequency,
  201. pas_freqs[pas_astate_new].driver_data);
  202. current_astate = pas_astate_new;
  203. for_each_online_cpu(i)
  204. set_astate(i, pas_astate_new);
  205. ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul;
  206. return 0;
  207. }
  208. static struct cpufreq_driver pas_cpufreq_driver = {
  209. .name = "pas-cpufreq",
  210. .flags = CPUFREQ_CONST_LOOPS,
  211. .init = pas_cpufreq_cpu_init,
  212. .exit = pas_cpufreq_cpu_exit,
  213. .verify = cpufreq_generic_frequency_table_verify,
  214. .target_index = pas_cpufreq_target,
  215. .attr = cpufreq_generic_attr,
  216. };
  217. /*
  218. * module init and destoy
  219. */
  220. static int __init pas_cpufreq_init(void)
  221. {
  222. if (!of_machine_is_compatible("PA6T-1682M") &&
  223. !of_machine_is_compatible("pasemi,pwrficient"))
  224. return -ENODEV;
  225. return cpufreq_register_driver(&pas_cpufreq_driver);
  226. }
  227. static void __exit pas_cpufreq_exit(void)
  228. {
  229. cpufreq_unregister_driver(&pas_cpufreq_driver);
  230. }
  231. module_init(pas_cpufreq_init);
  232. module_exit(pas_cpufreq_exit);
  233. MODULE_LICENSE("GPL");
  234. MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");