clksrc-dbx500-prcmu.c 2.5 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2011
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
  6. * Author: Sundar Iyer for ST-Ericsson
  7. * sched_clock implementation is based on:
  8. * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com>
  9. *
  10. * DBx500-PRCMU Timer
  11. * The PRCMU has 5 timers which are available in a always-on
  12. * power domain. We use the Timer 4 for our always-on clock
  13. * source on DB8500.
  14. */
  15. #include <linux/of.h>
  16. #include <linux/of_address.h>
  17. #include <linux/clockchips.h>
  18. #include <linux/sched_clock.h>
  19. #define RATE_32K 32768
  20. #define TIMER_MODE_CONTINOUS 0x1
  21. #define TIMER_DOWNCOUNT_VAL 0xffffffff
  22. #define PRCMU_TIMER_REF 0
  23. #define PRCMU_TIMER_DOWNCOUNT 0x4
  24. #define PRCMU_TIMER_MODE 0x8
  25. #define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */
  26. static void __iomem *clksrc_dbx500_timer_base;
  27. static u64 notrace clksrc_dbx500_prcmu_read(struct clocksource *cs)
  28. {
  29. void __iomem *base = clksrc_dbx500_timer_base;
  30. u32 count, count2;
  31. do {
  32. count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
  33. count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
  34. } while (count2 != count);
  35. /* Negate because the timer is a decrementing counter */
  36. return ~count;
  37. }
  38. static struct clocksource clocksource_dbx500_prcmu = {
  39. .name = "dbx500-prcmu-timer",
  40. .rating = 300,
  41. .read = clksrc_dbx500_prcmu_read,
  42. .mask = CLOCKSOURCE_MASK(32),
  43. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  44. };
  45. #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
  46. static u64 notrace dbx500_prcmu_sched_clock_read(void)
  47. {
  48. if (unlikely(!clksrc_dbx500_timer_base))
  49. return 0;
  50. return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
  51. }
  52. #endif
  53. static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
  54. {
  55. clksrc_dbx500_timer_base = of_iomap(node, 0);
  56. /*
  57. * The A9 sub system expects the timer to be configured as
  58. * a continous looping timer.
  59. * The PRCMU should configure it but if it for some reason
  60. * don't we do it here.
  61. */
  62. if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
  63. TIMER_MODE_CONTINOUS) {
  64. writel(TIMER_MODE_CONTINOUS,
  65. clksrc_dbx500_timer_base + PRCMU_TIMER_MODE);
  66. writel(TIMER_DOWNCOUNT_VAL,
  67. clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
  68. }
  69. #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
  70. sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K);
  71. #endif
  72. return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
  73. }
  74. TIMER_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
  75. clksrc_dbx500_prcmu_init);