 Pedro Gimeno
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0008b9d10e
Optimize one of the loops, to remove 5 cycles
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4 年之前 |
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Pedro Gimeno
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4e745657ac
Add write loops for gaps of 19 to 24 cycles between writes
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4 年之前 |
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Pedro Gimeno
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c8083b50a0
Add 3 more write loops with different separations, with results
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4 年之前 |
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Pedro Gimeno
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6e39c069a6
Move FillVRAM, BlankVideo, UnblankVideo to the bottom
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4 年之前 |
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Pedro Gimeno
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074f89806b
Prepare the code for write loops of other lengths (2/2)
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4 年之前 |
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Pedro Gimeno
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242c6dd8be
Prepare the code for write loops of other lengths (1/2)
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4 年之前 |
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Pedro Gimeno
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58b596792c
Drop the Bit Array and change strategy
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4 年之前 |
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Pedro Gimeno
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856d034e51
Optimize comparison code a little bit
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4 年之前 |
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Pedro Gimeno
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d2899fc9ea
Switch to autolocal labels
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4 年之前 |
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Pedro Gimeno
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0642fa84c8
Find the first cycle at which a fast write fails and report it
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4 年之前 |
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Pedro Gimeno
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d474d7b267
Comment fix: wrong register
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4 年之前 |
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Pedro Gimeno
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799d19f4ba
Use memory to store the division result, and IY for error reporting
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4 年之前 |
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Pedro Gimeno
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90fa9f8129
Add the phase earlier, to avoid another addition
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4 年之前 |
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Pedro Gimeno
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461f51c5db
Fix a bunch of issues with the VRAM timing test program
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4 年之前 |
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Pedro Gimeno
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fcb0fa2959
Minor comment corrections
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4 年之前 |
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Pedro Gimeno
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bfb802ff02
A stale -5 in a comment screwed the T-state count in DivCycFrmByC
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4 年之前 |
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Pedro Gimeno
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38f35f547d
Fix start address again to be 3000h for real this time
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4 年之前 |
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Pedro Gimeno
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992bb5118d
Rename bitmap to bit array, TimeBM to TimingBA
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4 年之前 |
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Pedro Gimeno
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87d1c5b8ff
Move VRAM address to 3000h
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4 年之前 |
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Pedro Gimeno
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777d72fd58
Rename and update stuff
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4 年之前 |
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Pedro Gimeno
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3891b219c3
Fix starting value of VDP address
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4 年之前 |
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Pedro Gimeno
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f4f2ac16ce
Fill only 16383 bytes; change fill bytes; track VRAM address
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4 年之前 |
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Pedro Gimeno
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dff9e3af52
Finished first test preliminarily
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4 年之前 |
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Pedro Gimeno
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d801ff33a6
Progress on formalizing the VRAM timing measurement
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4 年之前 |
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Pedro Gimeno
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01673b19f2
Misc minor details
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4 年之前 |
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Pedro Gimeno
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a646f34d00
Incorporate division code and use it for a faster loop
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4 年之前 |
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Pedro Gimeno
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d5f60c7afa
Start work on a 49T loop instead of 64T (will require division)
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4 年之前 |
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Pedro Gimeno
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6aba8bd752
WIP VRAM timing test
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4 年之前 |
