 Yifeng Li
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ff6ca6a422
vl670.kicad_pcb: update fab layers
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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f54bf92b06
fix incorrect RX/TX pairs
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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598d981f7c
vl670.kicad_pcb: final adjustments
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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15d5e2cfe0
vl670.kicad_pcb: adjust copper fill
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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e36b2d358f
usb-b edition
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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c674b919d1
v0.02.
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%!s(int64=2) %!d(string=hai) anos |
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Yifeng Li
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3260afb664
rename components and footprints.
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%!s(int64=3) %!d(string=hai) anos |
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Yifeng Li
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92dc1ee521
various changes for v0.01 public release.
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%!s(int64=3) %!d(string=hai) anos |
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Yifeng Li
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33949fcf4a
Change GPIO connections to match firmware.
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%!s(int64=3) %!d(string=hai) anos |
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Yifeng Li
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5b74404f45
Change R13 to a no-connection item
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%!s(int64=3) %!d(string=hai) anos |
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Yifeng Li
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5fb0019790
First private release.
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%!s(int64=3) %!d(string=hai) anos |
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Yifeng Li
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5a17411204
initial commit.
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%!s(int64=3) %!d(string=hai) anos |
