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crcgen @ ddb1a3400a
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e7c9815893
Update crcgen
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9 mesi fa |
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fpgamakelib @ 6d289c99e8
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b01d4ca760
Update fpgamakelib
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1 anno fa |
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.gitignore
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fe465a179c
Update crcgen
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5 anni fa |
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Makefile
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14cdf5c6dc
crcgen: Update
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3 anni fa |
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block_ram_mod.v
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e2542fed3c
Add FPGA PHY source code
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5 anni fa |
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edge_detect_mod.v
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e2542fed3c
Add FPGA PHY source code
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5 anni fa |
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led_blink_mod.v
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2a97e0444f
fpga: Add LED blinker
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5 anni fa |
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main.v
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0e4226eb30
phy-fpha: Declare miso as inout
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5 anni fa |
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parity_func.v
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e2542fed3c
Add FPGA PHY source code
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5 anni fa |
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profibus_phy_mod.v
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4db238f9ef
phy-fpga: Set CRC error flag
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5 anni fa |
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spi_slave_mod.v
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bf2afdb4e8
fpga: re-arrange pins
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5 anni fa |
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sync_signal_mod.v
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e2542fed3c
Add FPGA PHY source code
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5 anni fa |
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tinyfpga_bx.pcf
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e2542fed3c
Add FPGA PHY source code
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5 anni fa |
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tinyfpga_bx_program.sh
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0835c8771e
tinyfpga_bx_program: Update bootloader, if required
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5 anni fa |
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uart_mod.v
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1eabd5e26d
uart: Limit sym timer
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5 anni fa |
Michael Buesch
e7c9815893
Update crcgen