Michael Buesch e7c9815893 Update crcgen hai 9 meses
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crcgen @ ddb1a3400a e7c9815893 Update crcgen hai 9 meses
fpgamakelib @ 6d289c99e8 b01d4ca760 Update fpgamakelib hai 1 ano
.gitignore fe465a179c Update crcgen %!s(int64=5) %!d(string=hai) anos
Makefile 14cdf5c6dc crcgen: Update %!s(int64=3) %!d(string=hai) anos
block_ram_mod.v e2542fed3c Add FPGA PHY source code %!s(int64=5) %!d(string=hai) anos
edge_detect_mod.v e2542fed3c Add FPGA PHY source code %!s(int64=5) %!d(string=hai) anos
led_blink_mod.v 2a97e0444f fpga: Add LED blinker %!s(int64=5) %!d(string=hai) anos
main.v 0e4226eb30 phy-fpha: Declare miso as inout %!s(int64=5) %!d(string=hai) anos
parity_func.v e2542fed3c Add FPGA PHY source code %!s(int64=5) %!d(string=hai) anos
profibus_phy_mod.v 4db238f9ef phy-fpga: Set CRC error flag %!s(int64=5) %!d(string=hai) anos
spi_slave_mod.v bf2afdb4e8 fpga: re-arrange pins %!s(int64=5) %!d(string=hai) anos
sync_signal_mod.v e2542fed3c Add FPGA PHY source code %!s(int64=5) %!d(string=hai) anos
tinyfpga_bx.pcf e2542fed3c Add FPGA PHY source code %!s(int64=5) %!d(string=hai) anos
tinyfpga_bx_program.sh 0835c8771e tinyfpga_bx_program: Update bootloader, if required %!s(int64=5) %!d(string=hai) anos
uart_mod.v 1eabd5e26d uart: Limit sym timer %!s(int64=5) %!d(string=hai) anos