msm8660.c 8.4 KB

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  1. /* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/mfd/pmic8058.h>
  16. #include <linux/mfd/pmic8901.h>
  17. #include <linux/platform_device.h>
  18. #include <mach/board.h>
  19. #include <mach/mpp.h>
  20. #include <sound/core.h>
  21. #include <sound/soc.h>
  22. #include <sound/soc-dapm.h>
  23. #include <sound/pcm.h>
  24. #include <sound/dai.h>
  25. #include "msm8660-pcm.h"
  26. #include "../codecs/timpani.h"
  27. #define PM8058_GPIO_BASE NR_MSM_GPIOS
  28. #define PM8901_GPIO_BASE (PM8058_GPIO_BASE + \
  29. PM8058_GPIOS + PM8058_MPPS)
  30. #define PM8901_GPIO_PM_TO_SYS(pm_gpio) (pm_gpio + PM8901_GPIO_BASE)
  31. #define GPIO_EXPANDER_GPIO_BASE \
  32. (PM8901_GPIO_BASE + PM8901_MPPS)
  33. static struct clk *rx_osr_clk;
  34. static struct clk *rx_bit_clk;
  35. static struct clk *tx_osr_clk;
  36. static struct clk *tx_bit_clk;
  37. static int rx_hw_param_status;
  38. static int tx_hw_param_status;
  39. /* Platform specific logic */
  40. static int timpani_rx_route_enable(void)
  41. {
  42. int ret = 0;
  43. pr_debug("%s\n", __func__);
  44. ret = gpio_request(109, "I2S_Clock");
  45. if (ret != 0) {
  46. pr_err("%s: I2s clk gpio 109 request"
  47. "failed\n", __func__);
  48. return ret;
  49. }
  50. return ret;
  51. }
  52. static int timpani_rx_route_disable(void)
  53. {
  54. int ret = 0;
  55. pr_debug("%s\n", __func__);
  56. gpio_free(109);
  57. return ret;
  58. }
  59. #define GPIO_CLASS_D1_EN (GPIO_EXPANDER_GPIO_BASE + 0)
  60. #define PM8901_MPP_3 (2) /* PM8901 MPP starts from 0 */
  61. static void config_class_d1_gpio(int enable)
  62. {
  63. int rc;
  64. if (enable) {
  65. rc = gpio_request(GPIO_CLASS_D1_EN, "CLASSD1_EN");
  66. if (rc) {
  67. pr_err("%s: spkr pamp gpio %d request"
  68. "failed\n", __func__, GPIO_CLASS_D1_EN);
  69. return;
  70. }
  71. gpio_direction_output(GPIO_CLASS_D1_EN, 1);
  72. gpio_set_value_cansleep(GPIO_CLASS_D1_EN, 1);
  73. } else {
  74. gpio_set_value_cansleep(GPIO_CLASS_D1_EN, 0);
  75. gpio_free(GPIO_CLASS_D1_EN);
  76. }
  77. }
  78. static void config_class_d0_gpio(int enable)
  79. {
  80. int rc;
  81. if (enable) {
  82. rc = pm8901_mpp_config_digital_out(PM8901_MPP_3,
  83. PM8901_MPP_DIG_LEVEL_MSMIO, 1);
  84. if (rc) {
  85. pr_err("%s: CLASS_D0_EN failed\n", __func__);
  86. return;
  87. }
  88. rc = gpio_request(PM8901_GPIO_PM_TO_SYS(PM8901_MPP_3),
  89. "CLASSD0_EN");
  90. if (rc) {
  91. pr_err("%s: spkr pamp gpio pm8901 mpp3 request"
  92. "failed\n", __func__);
  93. pm8901_mpp_config_digital_out(PM8901_MPP_3,
  94. PM8901_MPP_DIG_LEVEL_MSMIO, 0);
  95. return;
  96. }
  97. gpio_direction_output(PM8901_GPIO_PM_TO_SYS(PM8901_MPP_3), 1);
  98. gpio_set_value_cansleep(PM8901_GPIO_PM_TO_SYS(PM8901_MPP_3), 1);
  99. } else {
  100. pm8901_mpp_config_digital_out(PM8901_MPP_3,
  101. PM8901_MPP_DIG_LEVEL_MSMIO, 0);
  102. gpio_set_value_cansleep(PM8901_GPIO_PM_TO_SYS(PM8901_MPP_3), 0);
  103. gpio_free(PM8901_GPIO_PM_TO_SYS(PM8901_MPP_3));
  104. }
  105. }
  106. static void timpani_poweramp_on(void)
  107. {
  108. pr_debug("%s: enable stereo spkr amp\n", __func__);
  109. timpani_rx_route_enable();
  110. config_class_d0_gpio(1);
  111. config_class_d1_gpio(1);
  112. }
  113. static void timpani_poweramp_off(void)
  114. {
  115. pr_debug("%s: disable stereo spkr amp\n", __func__);
  116. timpani_rx_route_disable();
  117. config_class_d0_gpio(0);
  118. config_class_d1_gpio(0);
  119. }
  120. static int msm8660_hw_params(struct snd_pcm_substream *substream,
  121. struct snd_pcm_hw_params *params)
  122. {
  123. int rate = params_rate(params);
  124. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  125. if (rx_hw_param_status)
  126. return 0;
  127. clk_set_rate(rx_osr_clk, rate * 256);
  128. rx_hw_param_status++;
  129. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  130. if (tx_hw_param_status)
  131. return 0;
  132. clk_set_rate(tx_osr_clk, rate * 256);
  133. tx_hw_param_status++;
  134. }
  135. return 0;
  136. }
  137. static int msm8660_startup(struct snd_pcm_substream *substream)
  138. {
  139. int ret = 0;
  140. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  141. rx_osr_clk = clk_get(NULL, "i2s_spkr_osr_clk");
  142. if (IS_ERR(rx_osr_clk)) {
  143. pr_debug("Failed to get i2s_spkr_osr_clk\n");
  144. return PTR_ERR(rx_osr_clk);
  145. }
  146. /* Master clock OSR 256 */
  147. /* Initially set to Lowest sample rate Needed */
  148. clk_set_rate(rx_osr_clk, 8000 * 256);
  149. ret = clk_prepare_enable(rx_osr_clk);
  150. if (ret != 0) {
  151. pr_debug("Unable to enable i2s_spkr_osr_clk\n");
  152. clk_put(rx_osr_clk);
  153. return ret;
  154. }
  155. rx_bit_clk = clk_get(NULL, "i2s_spkr_bit_clk");
  156. if (IS_ERR(rx_bit_clk)) {
  157. pr_debug("Failed to get i2s_spkr_bit_clk\n");
  158. clk_disable_unprepare(rx_osr_clk);
  159. clk_put(rx_osr_clk);
  160. return PTR_ERR(rx_bit_clk);
  161. }
  162. clk_set_rate(rx_bit_clk, 8);
  163. ret = clk_prepare_enable(rx_bit_clk);
  164. if (ret != 0) {
  165. pr_debug("Unable to enable i2s_spkr_bit_clk\n");
  166. clk_put(rx_bit_clk);
  167. clk_disable_unprepare(rx_osr_clk);
  168. clk_put(rx_osr_clk);
  169. return ret;
  170. }
  171. timpani_poweramp_on();
  172. msleep(30);
  173. /* End of platform specific logic */
  174. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  175. tx_osr_clk = clk_get(NULL, "i2s_mic_osr_clk");
  176. if (IS_ERR(tx_osr_clk)) {
  177. pr_debug("Failed to get i2s_mic_osr_clk\n");
  178. return PTR_ERR(tx_osr_clk);
  179. }
  180. /* Master clock OSR 256 */
  181. clk_set_rate(tx_osr_clk, 8000 * 256);
  182. ret = clk_prepare_enable(tx_osr_clk);
  183. if (ret != 0) {
  184. pr_debug("Unable to enable i2s_mic_osr_clk\n");
  185. clk_put(tx_osr_clk);
  186. return ret;
  187. }
  188. tx_bit_clk = clk_get(NULL, "i2s_mic_bit_clk");
  189. if (IS_ERR(tx_bit_clk)) {
  190. pr_debug("Failed to get i2s_mic_bit_clk\n");
  191. clk_disable_unprepare(tx_osr_clk);
  192. clk_put(tx_osr_clk);
  193. return PTR_ERR(tx_bit_clk);
  194. }
  195. clk_set_rate(tx_bit_clk, 8);
  196. ret = clk_prepare_enable(tx_bit_clk);
  197. if (ret != 0) {
  198. pr_debug("Unable to enable i2s_mic_bit_clk\n");
  199. clk_put(tx_bit_clk);
  200. clk_disable_unprepare(tx_osr_clk);
  201. clk_put(tx_osr_clk);
  202. return ret;
  203. }
  204. msm_snddev_enable_dmic_power();
  205. msleep(30);
  206. }
  207. return ret;
  208. }
  209. /*
  210. * TODO: rx/tx_hw_param_status should be a counter in the below code
  211. * when driver starts supporting mutisession else setting it to 0
  212. * will stop audio in all sessions.
  213. */
  214. static void msm8660_shutdown(struct snd_pcm_substream *substream)
  215. {
  216. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  217. rx_hw_param_status = 0;
  218. timpani_poweramp_off();
  219. msleep(30);
  220. if (rx_bit_clk) {
  221. clk_disable_unprepare(rx_bit_clk);
  222. clk_put(rx_bit_clk);
  223. rx_bit_clk = NULL;
  224. }
  225. if (rx_osr_clk) {
  226. clk_disable_unprepare(rx_osr_clk);
  227. clk_put(rx_osr_clk);
  228. rx_osr_clk = NULL;
  229. }
  230. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  231. tx_hw_param_status = 0;
  232. msm_snddev_disable_dmic_power();
  233. msleep(30);
  234. if (tx_bit_clk) {
  235. clk_disable_unprepare(tx_bit_clk);
  236. clk_put(tx_bit_clk);
  237. tx_bit_clk = NULL;
  238. }
  239. if (tx_osr_clk) {
  240. clk_disable_unprepare(tx_osr_clk);
  241. clk_put(tx_osr_clk);
  242. tx_osr_clk = NULL;
  243. }
  244. }
  245. }
  246. static struct snd_soc_ops machine_ops = {
  247. .startup = msm8660_startup,
  248. .shutdown = msm8660_shutdown,
  249. .hw_params = msm8660_hw_params,
  250. };
  251. /* Digital audio interface glue - connects codec <---> CPU */
  252. static struct snd_soc_dai_link msm8660_dai[] = {
  253. {
  254. .name = "Audio Rx",
  255. .stream_name = "Audio Rx",
  256. .cpu_dai = &msm_cpu_dai[0],
  257. .codec_dai = &timpani_codec_dai[0],
  258. .ops = &machine_ops,
  259. },
  260. {
  261. .name = "Audio Tx",
  262. .stream_name = "Audio Tx",
  263. .cpu_dai = &msm_cpu_dai[5],
  264. .codec_dai = &timpani_codec_dai[1],
  265. .ops = &machine_ops,
  266. }
  267. };
  268. struct snd_soc_card snd_soc_card_msm8660 = {
  269. .name = "msm8660-pcm-audio",
  270. .dai_link = msm8660_dai,
  271. .num_links = ARRAY_SIZE(msm8660_dai),
  272. .platform = &msm8660_soc_platform,
  273. };
  274. /* msm_audio audio subsystem */
  275. static struct snd_soc_device msm_snd_devdata = {
  276. .card = &snd_soc_card_msm8660,
  277. .codec_dev = &soc_codec_dev_timpani,
  278. };
  279. static struct platform_device *msm_snd_device;
  280. static int __init msm_audio_init(void)
  281. {
  282. int ret;
  283. msm_snd_device = platform_device_alloc("soc-audio", 0);
  284. if (!msm_snd_device) {
  285. pr_err("Platform device allocation failed\n");
  286. return -ENOMEM;
  287. }
  288. platform_set_drvdata(msm_snd_device, &msm_snd_devdata);
  289. msm_snd_devdata.dev = &msm_snd_device->dev;
  290. ret = platform_device_add(msm_snd_device);
  291. if (ret) {
  292. platform_device_put(msm_snd_device);
  293. return ret;
  294. }
  295. return ret;
  296. }
  297. module_init(msm_audio_init);
  298. static void __exit msm_audio_exit(void)
  299. {
  300. platform_device_unregister(msm_snd_device);
  301. }
  302. module_exit(msm_audio_exit);
  303. MODULE_DESCRIPTION("ALSA SoC MSM8660");
  304. MODULE_LICENSE("GPL v2");