spdif.c 12 KB

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  1. /* sound/soc/samsung/spdif.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd
  6. * http://www.samsung.com/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/io.h>
  14. #include <sound/soc.h>
  15. #include <sound/pcm_params.h>
  16. #include <plat/audio.h>
  17. #include <mach/dma.h>
  18. #include "dma.h"
  19. #include "spdif.h"
  20. /* Registers */
  21. #define CLKCON 0x00
  22. #define CON 0x04
  23. #define BSTAS 0x08
  24. #define CSTAS 0x0C
  25. #define DATA_OUTBUF 0x10
  26. #define DCNT 0x14
  27. #define BSTAS_S 0x18
  28. #define DCNT_S 0x1C
  29. #define CLKCTL_MASK 0x7
  30. #define CLKCTL_MCLK_EXT (0x1 << 2)
  31. #define CLKCTL_PWR_ON (0x1 << 0)
  32. #define CON_MASK 0x3ffffff
  33. #define CON_FIFO_TH_SHIFT 19
  34. #define CON_FIFO_TH_MASK (0x7 << 19)
  35. #define CON_USERDATA_23RDBIT (0x1 << 12)
  36. #define CON_SW_RESET (0x1 << 5)
  37. #define CON_MCLKDIV_MASK (0x3 << 3)
  38. #define CON_MCLKDIV_256FS (0x0 << 3)
  39. #define CON_MCLKDIV_384FS (0x1 << 3)
  40. #define CON_MCLKDIV_512FS (0x2 << 3)
  41. #define CON_PCM_MASK (0x3 << 1)
  42. #define CON_PCM_16BIT (0x0 << 1)
  43. #define CON_PCM_20BIT (0x1 << 1)
  44. #define CON_PCM_24BIT (0x2 << 1)
  45. #define CON_PCM_DATA (0x1 << 0)
  46. #define CSTAS_MASK 0x3fffffff
  47. #define CSTAS_SAMP_FREQ_MASK (0xF << 24)
  48. #define CSTAS_SAMP_FREQ_44 (0x0 << 24)
  49. #define CSTAS_SAMP_FREQ_48 (0x2 << 24)
  50. #define CSTAS_SAMP_FREQ_32 (0x3 << 24)
  51. #define CSTAS_SAMP_FREQ_96 (0xA << 24)
  52. #define CSTAS_CATEGORY_MASK (0xFF << 8)
  53. #define CSTAS_CATEGORY_CODE_CDP (0x01 << 8)
  54. #define CSTAS_NO_COPYRIGHT (0x1 << 2)
  55. /**
  56. * struct samsung_spdif_info - Samsung S/PDIF Controller information
  57. * @lock: Spin lock for S/PDIF.
  58. * @dev: The parent device passed to use from the probe.
  59. * @regs: The pointer to the device register block.
  60. * @clk_rate: Current clock rate for calcurate ratio.
  61. * @pclk: The peri-clock pointer for spdif master operation.
  62. * @sclk: The source clock pointer for making sync signals.
  63. * @save_clkcon: Backup clkcon reg. in suspend.
  64. * @save_con: Backup con reg. in suspend.
  65. * @save_cstas: Backup cstas reg. in suspend.
  66. * @dma_playback: DMA information for playback channel.
  67. */
  68. struct samsung_spdif_info {
  69. spinlock_t lock;
  70. struct device *dev;
  71. void __iomem *regs;
  72. unsigned long clk_rate;
  73. struct clk *pclk;
  74. struct clk *sclk;
  75. u32 saved_clkcon;
  76. u32 saved_con;
  77. u32 saved_cstas;
  78. struct s3c_dma_params *dma_playback;
  79. };
  80. static struct s3c2410_dma_client spdif_dma_client_out = {
  81. .name = "S/PDIF Stereo out",
  82. };
  83. static struct s3c_dma_params spdif_stereo_out;
  84. static struct samsung_spdif_info spdif_info;
  85. static inline struct samsung_spdif_info *to_info(struct snd_soc_dai *cpu_dai)
  86. {
  87. return snd_soc_dai_get_drvdata(cpu_dai);
  88. }
  89. static void spdif_snd_txctrl(struct samsung_spdif_info *spdif, int on)
  90. {
  91. void __iomem *regs = spdif->regs;
  92. u32 clkcon;
  93. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  94. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  95. if (on)
  96. writel(clkcon | CLKCTL_PWR_ON, regs + CLKCON);
  97. else
  98. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  99. }
  100. static int spdif_set_sysclk(struct snd_soc_dai *cpu_dai,
  101. int clk_id, unsigned int freq, int dir)
  102. {
  103. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  104. u32 clkcon;
  105. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  106. clkcon = readl(spdif->regs + CLKCON);
  107. if (clk_id == SND_SOC_SPDIF_INT_MCLK)
  108. clkcon &= ~CLKCTL_MCLK_EXT;
  109. else
  110. clkcon |= CLKCTL_MCLK_EXT;
  111. writel(clkcon, spdif->regs + CLKCON);
  112. spdif->clk_rate = freq;
  113. return 0;
  114. }
  115. static int spdif_trigger(struct snd_pcm_substream *substream, int cmd,
  116. struct snd_soc_dai *dai)
  117. {
  118. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  119. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  120. unsigned long flags;
  121. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  122. switch (cmd) {
  123. case SNDRV_PCM_TRIGGER_START:
  124. case SNDRV_PCM_TRIGGER_RESUME:
  125. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  126. spin_lock_irqsave(&spdif->lock, flags);
  127. spdif_snd_txctrl(spdif, 1);
  128. spin_unlock_irqrestore(&spdif->lock, flags);
  129. break;
  130. case SNDRV_PCM_TRIGGER_STOP:
  131. case SNDRV_PCM_TRIGGER_SUSPEND:
  132. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  133. spin_lock_irqsave(&spdif->lock, flags);
  134. spdif_snd_txctrl(spdif, 0);
  135. spin_unlock_irqrestore(&spdif->lock, flags);
  136. break;
  137. default:
  138. return -EINVAL;
  139. }
  140. return 0;
  141. }
  142. static int spdif_sysclk_ratios[] = {
  143. 512, 384, 256,
  144. };
  145. static int spdif_hw_params(struct snd_pcm_substream *substream,
  146. struct snd_pcm_hw_params *params,
  147. struct snd_soc_dai *socdai)
  148. {
  149. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  150. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  151. void __iomem *regs = spdif->regs;
  152. struct s3c_dma_params *dma_data;
  153. u32 con, clkcon, cstas;
  154. unsigned long flags;
  155. int i, ratio;
  156. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  157. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  158. dma_data = spdif->dma_playback;
  159. else {
  160. dev_err(spdif->dev, "Capture is not supported\n");
  161. return -EINVAL;
  162. }
  163. snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data);
  164. spin_lock_irqsave(&spdif->lock, flags);
  165. con = readl(regs + CON) & CON_MASK;
  166. cstas = readl(regs + CSTAS) & CSTAS_MASK;
  167. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  168. con &= ~CON_FIFO_TH_MASK;
  169. con |= (0x7 << CON_FIFO_TH_SHIFT);
  170. con |= CON_USERDATA_23RDBIT;
  171. con |= CON_PCM_DATA;
  172. con &= ~CON_PCM_MASK;
  173. switch (params_format(params)) {
  174. case SNDRV_PCM_FORMAT_S16_LE:
  175. con |= CON_PCM_16BIT;
  176. break;
  177. default:
  178. dev_err(spdif->dev, "Unsupported data size.\n");
  179. goto err;
  180. }
  181. ratio = spdif->clk_rate / params_rate(params);
  182. for (i = 0; i < ARRAY_SIZE(spdif_sysclk_ratios); i++)
  183. if (ratio == spdif_sysclk_ratios[i])
  184. break;
  185. if (i == ARRAY_SIZE(spdif_sysclk_ratios)) {
  186. dev_err(spdif->dev, "Invalid clock ratio %ld/%d\n",
  187. spdif->clk_rate, params_rate(params));
  188. goto err;
  189. }
  190. con &= ~CON_MCLKDIV_MASK;
  191. switch (ratio) {
  192. case 256:
  193. con |= CON_MCLKDIV_256FS;
  194. break;
  195. case 384:
  196. con |= CON_MCLKDIV_384FS;
  197. break;
  198. case 512:
  199. con |= CON_MCLKDIV_512FS;
  200. break;
  201. }
  202. cstas &= ~CSTAS_SAMP_FREQ_MASK;
  203. switch (params_rate(params)) {
  204. case 44100:
  205. cstas |= CSTAS_SAMP_FREQ_44;
  206. break;
  207. case 48000:
  208. cstas |= CSTAS_SAMP_FREQ_48;
  209. break;
  210. case 32000:
  211. cstas |= CSTAS_SAMP_FREQ_32;
  212. break;
  213. case 96000:
  214. cstas |= CSTAS_SAMP_FREQ_96;
  215. break;
  216. default:
  217. dev_err(spdif->dev, "Invalid sampling rate %d\n",
  218. params_rate(params));
  219. goto err;
  220. }
  221. cstas &= ~CSTAS_CATEGORY_MASK;
  222. cstas |= CSTAS_CATEGORY_CODE_CDP;
  223. cstas |= CSTAS_NO_COPYRIGHT;
  224. writel(con, regs + CON);
  225. writel(cstas, regs + CSTAS);
  226. writel(clkcon, regs + CLKCON);
  227. spin_unlock_irqrestore(&spdif->lock, flags);
  228. return 0;
  229. err:
  230. spin_unlock_irqrestore(&spdif->lock, flags);
  231. return -EINVAL;
  232. }
  233. static void spdif_shutdown(struct snd_pcm_substream *substream,
  234. struct snd_soc_dai *dai)
  235. {
  236. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  237. struct samsung_spdif_info *spdif = to_info(rtd->cpu_dai);
  238. void __iomem *regs = spdif->regs;
  239. u32 con, clkcon;
  240. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  241. con = readl(regs + CON) & CON_MASK;
  242. clkcon = readl(regs + CLKCON) & CLKCTL_MASK;
  243. writel(con | CON_SW_RESET, regs + CON);
  244. cpu_relax();
  245. writel(clkcon & ~CLKCTL_PWR_ON, regs + CLKCON);
  246. }
  247. #ifdef CONFIG_PM
  248. static int spdif_suspend(struct snd_soc_dai *cpu_dai)
  249. {
  250. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  251. u32 con = spdif->saved_con;
  252. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  253. spdif->saved_clkcon = readl(spdif->regs + CLKCON) & CLKCTL_MASK;
  254. spdif->saved_con = readl(spdif->regs + CON) & CON_MASK;
  255. spdif->saved_cstas = readl(spdif->regs + CSTAS) & CSTAS_MASK;
  256. writel(con | CON_SW_RESET, spdif->regs + CON);
  257. cpu_relax();
  258. return 0;
  259. }
  260. static int spdif_resume(struct snd_soc_dai *cpu_dai)
  261. {
  262. struct samsung_spdif_info *spdif = to_info(cpu_dai);
  263. dev_dbg(spdif->dev, "Entered %s\n", __func__);
  264. writel(spdif->saved_clkcon, spdif->regs + CLKCON);
  265. writel(spdif->saved_con, spdif->regs + CON);
  266. writel(spdif->saved_cstas, spdif->regs + CSTAS);
  267. return 0;
  268. }
  269. #else
  270. #define spdif_suspend NULL
  271. #define spdif_resume NULL
  272. #endif
  273. static struct snd_soc_dai_ops spdif_dai_ops = {
  274. .set_sysclk = spdif_set_sysclk,
  275. .trigger = spdif_trigger,
  276. .hw_params = spdif_hw_params,
  277. .shutdown = spdif_shutdown,
  278. };
  279. struct snd_soc_dai_driver samsung_spdif_dai = {
  280. .name = "samsung-spdif",
  281. .playback = {
  282. .stream_name = "S/PDIF Playback",
  283. .channels_min = 2,
  284. .channels_max = 2,
  285. .rates = (SNDRV_PCM_RATE_32000 |
  286. SNDRV_PCM_RATE_44100 |
  287. SNDRV_PCM_RATE_48000 |
  288. SNDRV_PCM_RATE_96000),
  289. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  290. .ops = &spdif_dai_ops,
  291. .suspend = spdif_suspend,
  292. .resume = spdif_resume,
  293. };
  294. static __devinit int spdif_probe(struct platform_device *pdev)
  295. {
  296. struct s3c_audio_pdata *spdif_pdata;
  297. struct resource *mem_res, *dma_res;
  298. struct samsung_spdif_info *spdif;
  299. int ret;
  300. spdif_pdata = pdev->dev.platform_data;
  301. dev_dbg(&pdev->dev, "Entered %s\n", __func__);
  302. dma_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  303. if (!dma_res) {
  304. dev_err(&pdev->dev, "Unable to get dma resource.\n");
  305. return -ENXIO;
  306. }
  307. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  308. if (!mem_res) {
  309. dev_err(&pdev->dev, "Unable to get register resource.\n");
  310. return -ENXIO;
  311. }
  312. if (spdif_pdata && spdif_pdata->cfg_gpio
  313. && spdif_pdata->cfg_gpio(pdev)) {
  314. dev_err(&pdev->dev, "Unable to configure GPIO pins\n");
  315. return -EINVAL;
  316. }
  317. spdif = &spdif_info;
  318. spdif->dev = &pdev->dev;
  319. spin_lock_init(&spdif->lock);
  320. spdif->pclk = clk_get(&pdev->dev, "spdif");
  321. if (IS_ERR(spdif->pclk)) {
  322. dev_err(&pdev->dev, "failed to get peri-clock\n");
  323. ret = -ENOENT;
  324. goto err0;
  325. }
  326. clk_enable(spdif->pclk);
  327. spdif->sclk = clk_get(&pdev->dev, "sclk_spdif");
  328. if (IS_ERR(spdif->sclk)) {
  329. dev_err(&pdev->dev, "failed to get internal source clock\n");
  330. ret = -ENOENT;
  331. goto err1;
  332. }
  333. clk_enable(spdif->sclk);
  334. /* Request S/PDIF Register's memory region */
  335. if (!request_mem_region(mem_res->start,
  336. resource_size(mem_res), "samsung-spdif")) {
  337. dev_err(&pdev->dev, "Unable to request register region\n");
  338. ret = -EBUSY;
  339. goto err2;
  340. }
  341. spdif->regs = ioremap(mem_res->start, 0x100);
  342. if (spdif->regs == NULL) {
  343. dev_err(&pdev->dev, "Cannot ioremap registers\n");
  344. ret = -ENXIO;
  345. goto err3;
  346. }
  347. dev_set_drvdata(&pdev->dev, spdif);
  348. ret = snd_soc_register_dai(&pdev->dev, &samsung_spdif_dai);
  349. if (ret != 0) {
  350. dev_err(&pdev->dev, "fail to register dai\n");
  351. goto err4;
  352. }
  353. spdif_stereo_out.dma_size = 2;
  354. spdif_stereo_out.client = &spdif_dma_client_out;
  355. spdif_stereo_out.dma_addr = mem_res->start + DATA_OUTBUF;
  356. spdif_stereo_out.channel = dma_res->start;
  357. spdif->dma_playback = &spdif_stereo_out;
  358. return 0;
  359. err4:
  360. iounmap(spdif->regs);
  361. err3:
  362. release_mem_region(mem_res->start, resource_size(mem_res));
  363. err2:
  364. clk_disable(spdif->sclk);
  365. clk_put(spdif->sclk);
  366. err1:
  367. clk_disable(spdif->pclk);
  368. clk_put(spdif->pclk);
  369. err0:
  370. return ret;
  371. }
  372. static __devexit int spdif_remove(struct platform_device *pdev)
  373. {
  374. struct samsung_spdif_info *spdif = &spdif_info;
  375. struct resource *mem_res;
  376. snd_soc_unregister_dai(&pdev->dev);
  377. iounmap(spdif->regs);
  378. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  379. if (mem_res)
  380. release_mem_region(mem_res->start, resource_size(mem_res));
  381. clk_disable(spdif->sclk);
  382. clk_put(spdif->sclk);
  383. clk_disable(spdif->pclk);
  384. clk_put(spdif->pclk);
  385. return 0;
  386. }
  387. static struct platform_driver samsung_spdif_driver = {
  388. .probe = spdif_probe,
  389. .remove = spdif_remove,
  390. .driver = {
  391. .name = "samsung-spdif",
  392. .owner = THIS_MODULE,
  393. },
  394. };
  395. static int __init spdif_init(void)
  396. {
  397. return platform_driver_register(&samsung_spdif_driver);
  398. }
  399. module_init(spdif_init);
  400. static void __exit spdif_exit(void)
  401. {
  402. platform_driver_unregister(&samsung_spdif_driver);
  403. }
  404. module_exit(spdif_exit);
  405. MODULE_AUTHOR("Seungwhan Youn, <sw.youn@samsung.com>");
  406. MODULE_DESCRIPTION("Samsung S/PDIF Controller Driver");
  407. MODULE_LICENSE("GPL");
  408. MODULE_ALIAS("platform:samsung-spdif");