mcpdm.c 11 KB

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  1. /*
  2. * mcpdm.c -- McPDM interface driver
  3. *
  4. * Author: Jorge Eduardo Candelaria <x0107209@ti.com>
  5. * Copyright (C) 2009 - Texas Instruments, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/device.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/wait.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/err.h>
  30. #include <linux/clk.h>
  31. #include <linux/delay.h>
  32. #include <linux/io.h>
  33. #include <linux/irq.h>
  34. #include "mcpdm.h"
  35. static struct omap_mcpdm *mcpdm;
  36. static inline void omap_mcpdm_write(u16 reg, u32 val)
  37. {
  38. __raw_writel(val, mcpdm->io_base + reg);
  39. }
  40. static inline int omap_mcpdm_read(u16 reg)
  41. {
  42. return __raw_readl(mcpdm->io_base + reg);
  43. }
  44. static void omap_mcpdm_reg_dump(void)
  45. {
  46. dev_dbg(mcpdm->dev, "***********************\n");
  47. dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n",
  48. omap_mcpdm_read(MCPDM_IRQSTATUS_RAW));
  49. dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n",
  50. omap_mcpdm_read(MCPDM_IRQSTATUS));
  51. dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n",
  52. omap_mcpdm_read(MCPDM_IRQENABLE_SET));
  53. dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n",
  54. omap_mcpdm_read(MCPDM_IRQENABLE_CLR));
  55. dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
  56. omap_mcpdm_read(MCPDM_IRQWAKE_EN));
  57. dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
  58. omap_mcpdm_read(MCPDM_DMAENABLE_SET));
  59. dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n",
  60. omap_mcpdm_read(MCPDM_DMAENABLE_CLR));
  61. dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n",
  62. omap_mcpdm_read(MCPDM_DMAWAKEEN));
  63. dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n",
  64. omap_mcpdm_read(MCPDM_CTRL));
  65. dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n",
  66. omap_mcpdm_read(MCPDM_DN_DATA));
  67. dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
  68. omap_mcpdm_read(MCPDM_UP_DATA));
  69. dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
  70. omap_mcpdm_read(MCPDM_FIFO_CTRL_DN));
  71. dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n",
  72. omap_mcpdm_read(MCPDM_FIFO_CTRL_UP));
  73. dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n",
  74. omap_mcpdm_read(MCPDM_DN_OFFSET));
  75. dev_dbg(mcpdm->dev, "***********************\n");
  76. }
  77. /*
  78. * Takes the McPDM module in and out of reset state.
  79. * Uplink and downlink can be reset individually.
  80. */
  81. static void omap_mcpdm_reset_capture(int reset)
  82. {
  83. int ctrl = omap_mcpdm_read(MCPDM_CTRL);
  84. if (reset)
  85. ctrl |= SW_UP_RST;
  86. else
  87. ctrl &= ~SW_UP_RST;
  88. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  89. }
  90. static void omap_mcpdm_reset_playback(int reset)
  91. {
  92. int ctrl = omap_mcpdm_read(MCPDM_CTRL);
  93. if (reset)
  94. ctrl |= SW_DN_RST;
  95. else
  96. ctrl &= ~SW_DN_RST;
  97. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  98. }
  99. /*
  100. * Enables the transfer through the PDM interface to/from the Phoenix
  101. * codec by enabling the corresponding UP or DN channels.
  102. */
  103. void omap_mcpdm_start(int stream)
  104. {
  105. int ctrl = omap_mcpdm_read(MCPDM_CTRL);
  106. if (stream)
  107. ctrl |= mcpdm->up_channels;
  108. else
  109. ctrl |= mcpdm->dn_channels;
  110. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  111. }
  112. /*
  113. * Disables the transfer through the PDM interface to/from the Phoenix
  114. * codec by disabling the corresponding UP or DN channels.
  115. */
  116. void omap_mcpdm_stop(int stream)
  117. {
  118. int ctrl = omap_mcpdm_read(MCPDM_CTRL);
  119. if (stream)
  120. ctrl &= ~mcpdm->up_channels;
  121. else
  122. ctrl &= ~mcpdm->dn_channels;
  123. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  124. }
  125. /*
  126. * Configures McPDM uplink for audio recording.
  127. * This function should be called before omap_mcpdm_start.
  128. */
  129. int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink)
  130. {
  131. int irq_mask = 0;
  132. int ctrl;
  133. if (!uplink)
  134. return -EINVAL;
  135. mcpdm->uplink = uplink;
  136. /* Enable irq request generation */
  137. irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
  138. omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
  139. /* Configure uplink threshold */
  140. if (uplink->threshold > UP_THRES_MAX)
  141. uplink->threshold = UP_THRES_MAX;
  142. omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold);
  143. /* Configure DMA controller */
  144. omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE);
  145. /* Set pdm out format */
  146. ctrl = omap_mcpdm_read(MCPDM_CTRL);
  147. ctrl &= ~PDMOUTFORMAT;
  148. ctrl |= uplink->format & PDMOUTFORMAT;
  149. /* Uplink channels */
  150. mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK);
  151. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  152. return 0;
  153. }
  154. /*
  155. * Configures McPDM downlink for audio playback.
  156. * This function should be called before omap_mcpdm_start.
  157. */
  158. int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink)
  159. {
  160. int irq_mask = 0;
  161. int ctrl;
  162. if (!downlink)
  163. return -EINVAL;
  164. mcpdm->downlink = downlink;
  165. /* Enable irq request generation */
  166. irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
  167. omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask);
  168. /* Configure uplink threshold */
  169. if (downlink->threshold > DN_THRES_MAX)
  170. downlink->threshold = DN_THRES_MAX;
  171. omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold);
  172. /* Enable DMA request generation */
  173. omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE);
  174. /* Set pdm out format */
  175. ctrl = omap_mcpdm_read(MCPDM_CTRL);
  176. ctrl &= ~PDMOUTFORMAT;
  177. ctrl |= downlink->format & PDMOUTFORMAT;
  178. /* Downlink channels */
  179. mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK);
  180. omap_mcpdm_write(MCPDM_CTRL, ctrl);
  181. return 0;
  182. }
  183. /*
  184. * Cleans McPDM uplink configuration.
  185. * This function should be called when the stream is closed.
  186. */
  187. int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink)
  188. {
  189. int irq_mask = 0;
  190. if (!uplink)
  191. return -EINVAL;
  192. /* Disable irq request generation */
  193. irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK;
  194. omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
  195. /* Disable DMA request generation */
  196. omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE);
  197. /* Clear Downlink channels */
  198. mcpdm->up_channels = 0;
  199. mcpdm->uplink = NULL;
  200. return 0;
  201. }
  202. /*
  203. * Cleans McPDM downlink configuration.
  204. * This function should be called when the stream is closed.
  205. */
  206. int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink)
  207. {
  208. int irq_mask = 0;
  209. if (!downlink)
  210. return -EINVAL;
  211. /* Disable irq request generation */
  212. irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK;
  213. omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask);
  214. /* Disable DMA request generation */
  215. omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE);
  216. /* clear Downlink channels */
  217. mcpdm->dn_channels = 0;
  218. mcpdm->downlink = NULL;
  219. return 0;
  220. }
  221. static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
  222. {
  223. struct omap_mcpdm *mcpdm_irq = dev_id;
  224. int irq_status;
  225. irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS);
  226. /* Acknowledge irq event */
  227. omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status);
  228. if (irq & MCPDM_DN_IRQ_FULL) {
  229. dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
  230. omap_mcpdm_reset_playback(1);
  231. omap_mcpdm_playback_open(mcpdm_irq->downlink);
  232. omap_mcpdm_reset_playback(0);
  233. }
  234. if (irq & MCPDM_DN_IRQ_EMPTY) {
  235. dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status);
  236. omap_mcpdm_reset_playback(1);
  237. omap_mcpdm_playback_open(mcpdm_irq->downlink);
  238. omap_mcpdm_reset_playback(0);
  239. }
  240. if (irq & MCPDM_DN_IRQ) {
  241. dev_dbg(mcpdm_irq->dev, "DN write request\n");
  242. }
  243. if (irq & MCPDM_UP_IRQ_FULL) {
  244. dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
  245. omap_mcpdm_reset_capture(1);
  246. omap_mcpdm_capture_open(mcpdm_irq->uplink);
  247. omap_mcpdm_reset_capture(0);
  248. }
  249. if (irq & MCPDM_UP_IRQ_EMPTY) {
  250. dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status);
  251. omap_mcpdm_reset_capture(1);
  252. omap_mcpdm_capture_open(mcpdm_irq->uplink);
  253. omap_mcpdm_reset_capture(0);
  254. }
  255. if (irq & MCPDM_UP_IRQ) {
  256. dev_dbg(mcpdm_irq->dev, "UP write request\n");
  257. }
  258. return IRQ_HANDLED;
  259. }
  260. int omap_mcpdm_request(void)
  261. {
  262. int ret;
  263. clk_enable(mcpdm->clk);
  264. spin_lock(&mcpdm->lock);
  265. if (!mcpdm->free) {
  266. dev_err(mcpdm->dev, "McPDM interface is in use\n");
  267. spin_unlock(&mcpdm->lock);
  268. ret = -EBUSY;
  269. goto err;
  270. }
  271. mcpdm->free = 0;
  272. spin_unlock(&mcpdm->lock);
  273. /* Disable lines while request is ongoing */
  274. omap_mcpdm_write(MCPDM_CTRL, 0x00);
  275. ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
  276. 0, "McPDM", (void *)mcpdm);
  277. if (ret) {
  278. dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n");
  279. goto err;
  280. }
  281. return 0;
  282. err:
  283. clk_disable(mcpdm->clk);
  284. return ret;
  285. }
  286. void omap_mcpdm_free(void)
  287. {
  288. spin_lock(&mcpdm->lock);
  289. if (mcpdm->free) {
  290. dev_err(mcpdm->dev, "McPDM interface is already free\n");
  291. spin_unlock(&mcpdm->lock);
  292. return;
  293. }
  294. mcpdm->free = 1;
  295. spin_unlock(&mcpdm->lock);
  296. clk_disable(mcpdm->clk);
  297. free_irq(mcpdm->irq, (void *)mcpdm);
  298. }
  299. /* Enable/disable DC offset cancelation for the analog
  300. * headset path (PDM channels 1 and 2).
  301. */
  302. int omap_mcpdm_set_offset(int offset1, int offset2)
  303. {
  304. int offset;
  305. if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX))
  306. return -EINVAL;
  307. offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2);
  308. /* offset cancellation for channel 1 */
  309. if (offset1)
  310. offset |= DN_OFST_RX1_EN;
  311. else
  312. offset &= ~DN_OFST_RX1_EN;
  313. /* offset cancellation for channel 2 */
  314. if (offset2)
  315. offset |= DN_OFST_RX2_EN;
  316. else
  317. offset &= ~DN_OFST_RX2_EN;
  318. omap_mcpdm_write(MCPDM_DN_OFFSET, offset);
  319. return 0;
  320. }
  321. int __devinit omap_mcpdm_probe(struct platform_device *pdev)
  322. {
  323. struct resource *res;
  324. int ret = 0;
  325. mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
  326. if (!mcpdm) {
  327. ret = -ENOMEM;
  328. goto exit;
  329. }
  330. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  331. if (res == NULL) {
  332. dev_err(&pdev->dev, "no resource\n");
  333. goto err_resource;
  334. }
  335. spin_lock_init(&mcpdm->lock);
  336. mcpdm->free = 1;
  337. mcpdm->io_base = ioremap(res->start, resource_size(res));
  338. if (!mcpdm->io_base) {
  339. ret = -ENOMEM;
  340. goto err_resource;
  341. }
  342. mcpdm->irq = platform_get_irq(pdev, 0);
  343. mcpdm->clk = clk_get(&pdev->dev, "pdm_ck");
  344. if (IS_ERR(mcpdm->clk)) {
  345. ret = PTR_ERR(mcpdm->clk);
  346. dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret);
  347. goto err_clk;
  348. }
  349. mcpdm->dev = &pdev->dev;
  350. platform_set_drvdata(pdev, mcpdm);
  351. return 0;
  352. err_clk:
  353. iounmap(mcpdm->io_base);
  354. err_resource:
  355. kfree(mcpdm);
  356. exit:
  357. return ret;
  358. }
  359. int __devexit omap_mcpdm_remove(struct platform_device *pdev)
  360. {
  361. struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev);
  362. platform_set_drvdata(pdev, NULL);
  363. clk_put(mcpdm_ptr->clk);
  364. iounmap(mcpdm_ptr->io_base);
  365. mcpdm_ptr->clk = NULL;
  366. mcpdm_ptr->free = 0;
  367. mcpdm_ptr->dev = NULL;
  368. kfree(mcpdm_ptr);
  369. return 0;
  370. }