wm9090.c 21 KB

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  1. /*
  2. * ALSA SoC WM9090 driver
  3. *
  4. * Copyright 2009, 2010 Wolfson Microelectronics
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. */
  22. #include <linux/module.h>
  23. #include <linux/errno.h>
  24. #include <linux/device.h>
  25. #include <linux/i2c.h>
  26. #include <linux/delay.h>
  27. #include <linux/slab.h>
  28. #include <sound/initval.h>
  29. #include <sound/soc.h>
  30. #include <sound/tlv.h>
  31. #include <sound/wm9090.h>
  32. #include "wm9090.h"
  33. static const u16 wm9090_reg_defaults[] = {
  34. 0x9093, /* R0 - Software Reset */
  35. 0x0006, /* R1 - Power Management (1) */
  36. 0x6000, /* R2 - Power Management (2) */
  37. 0x0000, /* R3 - Power Management (3) */
  38. 0x0000, /* R4 */
  39. 0x0000, /* R5 */
  40. 0x01C0, /* R6 - Clocking 1 */
  41. 0x0000, /* R7 */
  42. 0x0000, /* R8 */
  43. 0x0000, /* R9 */
  44. 0x0000, /* R10 */
  45. 0x0000, /* R11 */
  46. 0x0000, /* R12 */
  47. 0x0000, /* R13 */
  48. 0x0000, /* R14 */
  49. 0x0000, /* R15 */
  50. 0x0000, /* R16 */
  51. 0x0000, /* R17 */
  52. 0x0000, /* R18 */
  53. 0x0000, /* R19 */
  54. 0x0000, /* R20 */
  55. 0x0000, /* R21 */
  56. 0x0003, /* R22 - IN1 Line Control */
  57. 0x0003, /* R23 - IN2 Line Control */
  58. 0x0083, /* R24 - IN1 Line Input A Volume */
  59. 0x0083, /* R25 - IN1 Line Input B Volume */
  60. 0x0083, /* R26 - IN2 Line Input A Volume */
  61. 0x0083, /* R27 - IN2 Line Input B Volume */
  62. 0x002D, /* R28 - Left Output Volume */
  63. 0x002D, /* R29 - Right Output Volume */
  64. 0x0000, /* R30 */
  65. 0x0000, /* R31 */
  66. 0x0000, /* R32 */
  67. 0x0000, /* R33 */
  68. 0x0100, /* R34 - SPKMIXL Attenuation */
  69. 0x0000, /* R35 */
  70. 0x0010, /* R36 - SPKOUT Mixers */
  71. 0x0140, /* R37 - ClassD3 */
  72. 0x0039, /* R38 - Speaker Volume Left */
  73. 0x0000, /* R39 */
  74. 0x0000, /* R40 */
  75. 0x0000, /* R41 */
  76. 0x0000, /* R42 */
  77. 0x0000, /* R43 */
  78. 0x0000, /* R44 */
  79. 0x0000, /* R45 - Output Mixer1 */
  80. 0x0000, /* R46 - Output Mixer2 */
  81. 0x0100, /* R47 - Output Mixer3 */
  82. 0x0100, /* R48 - Output Mixer4 */
  83. 0x0000, /* R49 */
  84. 0x0000, /* R50 */
  85. 0x0000, /* R51 */
  86. 0x0000, /* R52 */
  87. 0x0000, /* R53 */
  88. 0x0000, /* R54 - Speaker Mixer */
  89. 0x0000, /* R55 */
  90. 0x0000, /* R56 */
  91. 0x000D, /* R57 - AntiPOP2 */
  92. 0x0000, /* R58 */
  93. 0x0000, /* R59 */
  94. 0x0000, /* R60 */
  95. 0x0000, /* R61 */
  96. 0x0000, /* R62 */
  97. 0x0000, /* R63 */
  98. 0x0000, /* R64 */
  99. 0x0000, /* R65 */
  100. 0x0000, /* R66 */
  101. 0x0000, /* R67 */
  102. 0x0000, /* R68 */
  103. 0x0000, /* R69 */
  104. 0x0000, /* R70 - Write Sequencer 0 */
  105. 0x0000, /* R71 - Write Sequencer 1 */
  106. 0x0000, /* R72 - Write Sequencer 2 */
  107. 0x0000, /* R73 - Write Sequencer 3 */
  108. 0x0000, /* R74 - Write Sequencer 4 */
  109. 0x0000, /* R75 - Write Sequencer 5 */
  110. 0x1F25, /* R76 - Charge Pump 1 */
  111. 0x0000, /* R77 */
  112. 0x0000, /* R78 */
  113. 0x0000, /* R79 */
  114. 0x0000, /* R80 */
  115. 0x0000, /* R81 */
  116. 0x0000, /* R82 */
  117. 0x0000, /* R83 */
  118. 0x0000, /* R84 - DC Servo 0 */
  119. 0x054A, /* R85 - DC Servo 1 */
  120. 0x0000, /* R86 */
  121. 0x0000, /* R87 - DC Servo 3 */
  122. 0x0000, /* R88 - DC Servo Readback 0 */
  123. 0x0000, /* R89 - DC Servo Readback 1 */
  124. 0x0000, /* R90 - DC Servo Readback 2 */
  125. 0x0000, /* R91 */
  126. 0x0000, /* R92 */
  127. 0x0000, /* R93 */
  128. 0x0000, /* R94 */
  129. 0x0000, /* R95 */
  130. 0x0100, /* R96 - Analogue HP 0 */
  131. 0x0000, /* R97 */
  132. 0x8640, /* R98 - AGC Control 0 */
  133. 0xC000, /* R99 - AGC Control 1 */
  134. 0x0200, /* R100 - AGC Control 2 */
  135. };
  136. /* This struct is used to save the context */
  137. struct wm9090_priv {
  138. struct mutex mutex;
  139. struct wm9090_platform_data pdata;
  140. void *control_data;
  141. };
  142. static int wm9090_volatile(struct snd_soc_codec *codec, unsigned int reg)
  143. {
  144. switch (reg) {
  145. case WM9090_SOFTWARE_RESET:
  146. case WM9090_DC_SERVO_0:
  147. case WM9090_DC_SERVO_READBACK_0:
  148. case WM9090_DC_SERVO_READBACK_1:
  149. case WM9090_DC_SERVO_READBACK_2:
  150. return 1;
  151. default:
  152. return 0;
  153. }
  154. }
  155. static void wait_for_dc_servo(struct snd_soc_codec *codec)
  156. {
  157. unsigned int reg;
  158. int count = 0;
  159. dev_dbg(codec->dev, "Waiting for DC servo...\n");
  160. do {
  161. count++;
  162. msleep(1);
  163. reg = snd_soc_read(codec, WM9090_DC_SERVO_READBACK_0);
  164. dev_dbg(codec->dev, "DC servo status: %x\n", reg);
  165. } while ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
  166. != WM9090_DCS_CAL_COMPLETE_MASK && count < 1000);
  167. if ((reg & WM9090_DCS_CAL_COMPLETE_MASK)
  168. != WM9090_DCS_CAL_COMPLETE_MASK)
  169. dev_err(codec->dev, "Timed out waiting for DC Servo\n");
  170. }
  171. static const unsigned int in_tlv[] = {
  172. TLV_DB_RANGE_HEAD(6),
  173. 0, 0, TLV_DB_SCALE_ITEM(-600, 0, 0),
  174. 1, 3, TLV_DB_SCALE_ITEM(-350, 350, 0),
  175. 4, 6, TLV_DB_SCALE_ITEM(600, 600, 0),
  176. };
  177. static const unsigned int mix_tlv[] = {
  178. TLV_DB_RANGE_HEAD(4),
  179. 0, 2, TLV_DB_SCALE_ITEM(-1200, 300, 0),
  180. 3, 3, TLV_DB_SCALE_ITEM(0, 0, 0),
  181. };
  182. static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
  183. static const unsigned int spkboost_tlv[] = {
  184. TLV_DB_RANGE_HEAD(7),
  185. 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
  186. 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
  187. };
  188. static const struct snd_kcontrol_new wm9090_controls[] = {
  189. SOC_SINGLE_TLV("IN1A Volume", WM9090_IN1_LINE_INPUT_A_VOLUME, 0, 6, 0,
  190. in_tlv),
  191. SOC_SINGLE("IN1A Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 7, 1, 1),
  192. SOC_SINGLE("IN1A ZC Switch", WM9090_IN1_LINE_INPUT_A_VOLUME, 6, 1, 0),
  193. SOC_SINGLE_TLV("IN2A Volume", WM9090_IN2_LINE_INPUT_A_VOLUME, 0, 6, 0,
  194. in_tlv),
  195. SOC_SINGLE("IN2A Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 7, 1, 1),
  196. SOC_SINGLE("IN2A ZC Switch", WM9090_IN2_LINE_INPUT_A_VOLUME, 6, 1, 0),
  197. SOC_SINGLE("MIXOUTL Switch", WM9090_OUTPUT_MIXER3, 8, 1, 1),
  198. SOC_SINGLE_TLV("MIXOUTL IN1A Volume", WM9090_OUTPUT_MIXER3, 6, 3, 1,
  199. mix_tlv),
  200. SOC_SINGLE_TLV("MIXOUTL IN2A Volume", WM9090_OUTPUT_MIXER3, 2, 3, 1,
  201. mix_tlv),
  202. SOC_SINGLE("MIXOUTR Switch", WM9090_OUTPUT_MIXER4, 8, 1, 1),
  203. SOC_SINGLE_TLV("MIXOUTR IN1A Volume", WM9090_OUTPUT_MIXER4, 6, 3, 1,
  204. mix_tlv),
  205. SOC_SINGLE_TLV("MIXOUTR IN2A Volume", WM9090_OUTPUT_MIXER4, 2, 3, 1,
  206. mix_tlv),
  207. SOC_SINGLE("SPKMIX Switch", WM9090_SPKMIXL_ATTENUATION, 8, 1, 1),
  208. SOC_SINGLE_TLV("SPKMIX IN1A Volume", WM9090_SPKMIXL_ATTENUATION, 6, 3, 1,
  209. mix_tlv),
  210. SOC_SINGLE_TLV("SPKMIX IN2A Volume", WM9090_SPKMIXL_ATTENUATION, 2, 3, 1,
  211. mix_tlv),
  212. SOC_DOUBLE_R_TLV("Headphone Volume", WM9090_LEFT_OUTPUT_VOLUME,
  213. WM9090_RIGHT_OUTPUT_VOLUME, 0, 63, 0, out_tlv),
  214. SOC_DOUBLE_R("Headphone Switch", WM9090_LEFT_OUTPUT_VOLUME,
  215. WM9090_RIGHT_OUTPUT_VOLUME, 6, 1, 1),
  216. SOC_DOUBLE_R("Headphone ZC Switch", WM9090_LEFT_OUTPUT_VOLUME,
  217. WM9090_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
  218. SOC_SINGLE_TLV("Speaker Volume", WM9090_SPEAKER_VOLUME_LEFT, 0, 63, 0,
  219. out_tlv),
  220. SOC_SINGLE("Speaker Switch", WM9090_SPEAKER_VOLUME_LEFT, 6, 1, 1),
  221. SOC_SINGLE("Speaker ZC Switch", WM9090_SPEAKER_VOLUME_LEFT, 7, 1, 0),
  222. SOC_SINGLE_TLV("Speaker Boost Volume", WM9090_CLASSD3, 3, 7, 0, spkboost_tlv),
  223. };
  224. static const struct snd_kcontrol_new wm9090_in1_se_controls[] = {
  225. SOC_SINGLE_TLV("IN1B Volume", WM9090_IN1_LINE_INPUT_B_VOLUME, 0, 6, 0,
  226. in_tlv),
  227. SOC_SINGLE("IN1B Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 7, 1, 1),
  228. SOC_SINGLE("IN1B ZC Switch", WM9090_IN1_LINE_INPUT_B_VOLUME, 6, 1, 0),
  229. SOC_SINGLE_TLV("SPKMIX IN1B Volume", WM9090_SPKMIXL_ATTENUATION, 4, 3, 1,
  230. mix_tlv),
  231. SOC_SINGLE_TLV("MIXOUTL IN1B Volume", WM9090_OUTPUT_MIXER3, 4, 3, 1,
  232. mix_tlv),
  233. SOC_SINGLE_TLV("MIXOUTR IN1B Volume", WM9090_OUTPUT_MIXER4, 4, 3, 1,
  234. mix_tlv),
  235. };
  236. static const struct snd_kcontrol_new wm9090_in2_se_controls[] = {
  237. SOC_SINGLE_TLV("IN2B Volume", WM9090_IN2_LINE_INPUT_B_VOLUME, 0, 6, 0,
  238. in_tlv),
  239. SOC_SINGLE("IN2B Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 7, 1, 1),
  240. SOC_SINGLE("IN2B ZC Switch", WM9090_IN2_LINE_INPUT_B_VOLUME, 6, 1, 0),
  241. SOC_SINGLE_TLV("SPKMIX IN2B Volume", WM9090_SPKMIXL_ATTENUATION, 0, 3, 1,
  242. mix_tlv),
  243. SOC_SINGLE_TLV("MIXOUTL IN2B Volume", WM9090_OUTPUT_MIXER3, 0, 3, 1,
  244. mix_tlv),
  245. SOC_SINGLE_TLV("MIXOUTR IN2B Volume", WM9090_OUTPUT_MIXER4, 0, 3, 1,
  246. mix_tlv),
  247. };
  248. static int hp_ev(struct snd_soc_dapm_widget *w,
  249. struct snd_kcontrol *kcontrol, int event)
  250. {
  251. struct snd_soc_codec *codec = w->codec;
  252. unsigned int reg = snd_soc_read(codec, WM9090_ANALOGUE_HP_0);
  253. switch (event) {
  254. case SND_SOC_DAPM_POST_PMU:
  255. snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
  256. WM9090_CP_ENA, WM9090_CP_ENA);
  257. msleep(5);
  258. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
  259. WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
  260. WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA);
  261. reg |= WM9090_HPOUT1L_DLY | WM9090_HPOUT1R_DLY;
  262. snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
  263. /* Start the DC servo. We don't currently use the
  264. * ability to save the state since we don't have full
  265. * control of the analogue paths and they can change
  266. * DC offsets; see the WM8904 driver for an example of
  267. * doing so.
  268. */
  269. snd_soc_write(codec, WM9090_DC_SERVO_0,
  270. WM9090_DCS_ENA_CHAN_0 |
  271. WM9090_DCS_ENA_CHAN_1 |
  272. WM9090_DCS_TRIG_STARTUP_1 |
  273. WM9090_DCS_TRIG_STARTUP_0);
  274. wait_for_dc_servo(codec);
  275. reg |= WM9090_HPOUT1R_OUTP | WM9090_HPOUT1R_RMV_SHORT |
  276. WM9090_HPOUT1L_OUTP | WM9090_HPOUT1L_RMV_SHORT;
  277. snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
  278. break;
  279. case SND_SOC_DAPM_PRE_PMD:
  280. reg &= ~(WM9090_HPOUT1L_RMV_SHORT |
  281. WM9090_HPOUT1L_DLY |
  282. WM9090_HPOUT1L_OUTP |
  283. WM9090_HPOUT1R_RMV_SHORT |
  284. WM9090_HPOUT1R_DLY |
  285. WM9090_HPOUT1R_OUTP);
  286. snd_soc_write(codec, WM9090_ANALOGUE_HP_0, reg);
  287. snd_soc_write(codec, WM9090_DC_SERVO_0, 0);
  288. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
  289. WM9090_HPOUT1L_ENA | WM9090_HPOUT1R_ENA,
  290. 0);
  291. snd_soc_update_bits(codec, WM9090_CHARGE_PUMP_1,
  292. WM9090_CP_ENA, 0);
  293. break;
  294. }
  295. return 0;
  296. }
  297. static const struct snd_kcontrol_new spkmix[] = {
  298. SOC_DAPM_SINGLE("IN1A Switch", WM9090_SPEAKER_MIXER, 6, 1, 0),
  299. SOC_DAPM_SINGLE("IN1B Switch", WM9090_SPEAKER_MIXER, 4, 1, 0),
  300. SOC_DAPM_SINGLE("IN2A Switch", WM9090_SPEAKER_MIXER, 2, 1, 0),
  301. SOC_DAPM_SINGLE("IN2B Switch", WM9090_SPEAKER_MIXER, 0, 1, 0),
  302. };
  303. static const struct snd_kcontrol_new spkout[] = {
  304. SOC_DAPM_SINGLE("Mixer Switch", WM9090_SPKOUT_MIXERS, 4, 1, 0),
  305. };
  306. static const struct snd_kcontrol_new mixoutl[] = {
  307. SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER1, 6, 1, 0),
  308. SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER1, 4, 1, 0),
  309. SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER1, 2, 1, 0),
  310. SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER1, 0, 1, 0),
  311. };
  312. static const struct snd_kcontrol_new mixoutr[] = {
  313. SOC_DAPM_SINGLE("IN1A Switch", WM9090_OUTPUT_MIXER2, 6, 1, 0),
  314. SOC_DAPM_SINGLE("IN1B Switch", WM9090_OUTPUT_MIXER2, 4, 1, 0),
  315. SOC_DAPM_SINGLE("IN2A Switch", WM9090_OUTPUT_MIXER2, 2, 1, 0),
  316. SOC_DAPM_SINGLE("IN2B Switch", WM9090_OUTPUT_MIXER2, 0, 1, 0),
  317. };
  318. static const struct snd_soc_dapm_widget wm9090_dapm_widgets[] = {
  319. SND_SOC_DAPM_INPUT("IN1+"),
  320. SND_SOC_DAPM_INPUT("IN1-"),
  321. SND_SOC_DAPM_INPUT("IN2+"),
  322. SND_SOC_DAPM_INPUT("IN2-"),
  323. SND_SOC_DAPM_SUPPLY("OSC", WM9090_POWER_MANAGEMENT_1, 3, 0, NULL, 0),
  324. SND_SOC_DAPM_PGA("IN1A PGA", WM9090_POWER_MANAGEMENT_2, 7, 0, NULL, 0),
  325. SND_SOC_DAPM_PGA("IN1B PGA", WM9090_POWER_MANAGEMENT_2, 6, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("IN2A PGA", WM9090_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
  327. SND_SOC_DAPM_PGA("IN2B PGA", WM9090_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
  328. SND_SOC_DAPM_MIXER("SPKMIX", WM9090_POWER_MANAGEMENT_3, 3, 0,
  329. spkmix, ARRAY_SIZE(spkmix)),
  330. SND_SOC_DAPM_MIXER("MIXOUTL", WM9090_POWER_MANAGEMENT_3, 5, 0,
  331. mixoutl, ARRAY_SIZE(mixoutl)),
  332. SND_SOC_DAPM_MIXER("MIXOUTR", WM9090_POWER_MANAGEMENT_3, 4, 0,
  333. mixoutr, ARRAY_SIZE(mixoutr)),
  334. SND_SOC_DAPM_PGA_E("HP PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
  335. hp_ev, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
  336. SND_SOC_DAPM_PGA("SPKPGA", WM9090_POWER_MANAGEMENT_3, 8, 0, NULL, 0),
  337. SND_SOC_DAPM_MIXER("SPKOUT", WM9090_POWER_MANAGEMENT_1, 12, 0,
  338. spkout, ARRAY_SIZE(spkout)),
  339. SND_SOC_DAPM_OUTPUT("HPR"),
  340. SND_SOC_DAPM_OUTPUT("HPL"),
  341. SND_SOC_DAPM_OUTPUT("Speaker"),
  342. };
  343. static const struct snd_soc_dapm_route audio_map[] = {
  344. { "IN1A PGA", NULL, "IN1+" },
  345. { "IN2A PGA", NULL, "IN2+" },
  346. { "SPKMIX", "IN1A Switch", "IN1A PGA" },
  347. { "SPKMIX", "IN2A Switch", "IN2A PGA" },
  348. { "MIXOUTL", "IN1A Switch", "IN1A PGA" },
  349. { "MIXOUTL", "IN2A Switch", "IN2A PGA" },
  350. { "MIXOUTR", "IN1A Switch", "IN1A PGA" },
  351. { "MIXOUTR", "IN2A Switch", "IN2A PGA" },
  352. { "HP PGA", NULL, "OSC" },
  353. { "HP PGA", NULL, "MIXOUTL" },
  354. { "HP PGA", NULL, "MIXOUTR" },
  355. { "HPL", NULL, "HP PGA" },
  356. { "HPR", NULL, "HP PGA" },
  357. { "SPKPGA", NULL, "OSC" },
  358. { "SPKPGA", NULL, "SPKMIX" },
  359. { "SPKOUT", "Mixer Switch", "SPKPGA" },
  360. { "Speaker", NULL, "SPKOUT" },
  361. };
  362. static const struct snd_soc_dapm_route audio_map_in1_se[] = {
  363. { "IN1B PGA", NULL, "IN1-" },
  364. { "SPKMIX", "IN1B Switch", "IN1B PGA" },
  365. { "MIXOUTL", "IN1B Switch", "IN1B PGA" },
  366. { "MIXOUTR", "IN1B Switch", "IN1B PGA" },
  367. };
  368. static const struct snd_soc_dapm_route audio_map_in1_diff[] = {
  369. { "IN1A PGA", NULL, "IN1-" },
  370. };
  371. static const struct snd_soc_dapm_route audio_map_in2_se[] = {
  372. { "IN2B PGA", NULL, "IN2-" },
  373. { "SPKMIX", "IN2B Switch", "IN2B PGA" },
  374. { "MIXOUTL", "IN2B Switch", "IN2B PGA" },
  375. { "MIXOUTR", "IN2B Switch", "IN2B PGA" },
  376. };
  377. static const struct snd_soc_dapm_route audio_map_in2_diff[] = {
  378. { "IN2A PGA", NULL, "IN2-" },
  379. };
  380. static int wm9090_add_controls(struct snd_soc_codec *codec)
  381. {
  382. struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
  383. struct snd_soc_dapm_context *dapm = &codec->dapm;
  384. int i;
  385. snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
  386. ARRAY_SIZE(wm9090_dapm_widgets));
  387. snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
  388. snd_soc_add_controls(codec, wm9090_controls,
  389. ARRAY_SIZE(wm9090_controls));
  390. if (wm9090->pdata.lin1_diff) {
  391. snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
  392. ARRAY_SIZE(audio_map_in1_diff));
  393. } else {
  394. snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
  395. ARRAY_SIZE(audio_map_in1_se));
  396. snd_soc_add_controls(codec, wm9090_in1_se_controls,
  397. ARRAY_SIZE(wm9090_in1_se_controls));
  398. }
  399. if (wm9090->pdata.lin2_diff) {
  400. snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
  401. ARRAY_SIZE(audio_map_in2_diff));
  402. } else {
  403. snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
  404. ARRAY_SIZE(audio_map_in2_se));
  405. snd_soc_add_controls(codec, wm9090_in2_se_controls,
  406. ARRAY_SIZE(wm9090_in2_se_controls));
  407. }
  408. if (wm9090->pdata.agc_ena) {
  409. for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
  410. snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i,
  411. wm9090->pdata.agc[i]);
  412. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
  413. WM9090_AGC_ENA, WM9090_AGC_ENA);
  414. } else {
  415. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
  416. WM9090_AGC_ENA, 0);
  417. }
  418. return 0;
  419. }
  420. /*
  421. * The machine driver should call this from their set_bias_level; if there
  422. * isn't one then this can just be set as the set_bias_level function.
  423. */
  424. static int wm9090_set_bias_level(struct snd_soc_codec *codec,
  425. enum snd_soc_bias_level level)
  426. {
  427. u16 *reg_cache = codec->reg_cache;
  428. int i, ret;
  429. switch (level) {
  430. case SND_SOC_BIAS_ON:
  431. break;
  432. case SND_SOC_BIAS_PREPARE:
  433. snd_soc_update_bits(codec, WM9090_ANTIPOP2, WM9090_VMID_ENA,
  434. WM9090_VMID_ENA);
  435. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
  436. WM9090_BIAS_ENA |
  437. WM9090_VMID_RES_MASK,
  438. WM9090_BIAS_ENA |
  439. 1 << WM9090_VMID_RES_SHIFT);
  440. msleep(1); /* Probably an overestimate */
  441. break;
  442. case SND_SOC_BIAS_STANDBY:
  443. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  444. /* Restore the register cache */
  445. for (i = 1; i < codec->driver->reg_cache_size; i++) {
  446. if (reg_cache[i] == wm9090_reg_defaults[i])
  447. continue;
  448. if (wm9090_volatile(codec, i))
  449. continue;
  450. ret = snd_soc_write(codec, i, reg_cache[i]);
  451. if (ret != 0)
  452. dev_warn(codec->dev,
  453. "Failed to restore register %d: %d\n",
  454. i, ret);
  455. }
  456. }
  457. /* We keep VMID off during standby since the combination of
  458. * ground referenced outputs and class D speaker mean that
  459. * latency is not an issue.
  460. */
  461. snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_1,
  462. WM9090_BIAS_ENA | WM9090_VMID_RES_MASK, 0);
  463. snd_soc_update_bits(codec, WM9090_ANTIPOP2,
  464. WM9090_VMID_ENA, 0);
  465. break;
  466. case SND_SOC_BIAS_OFF:
  467. break;
  468. }
  469. codec->dapm.bias_level = level;
  470. return 0;
  471. }
  472. static int wm9090_probe(struct snd_soc_codec *codec)
  473. {
  474. struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
  475. int ret;
  476. codec->control_data = wm9090->control_data;
  477. ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
  478. if (ret != 0) {
  479. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  480. return ret;
  481. }
  482. ret = snd_soc_read(codec, WM9090_SOFTWARE_RESET);
  483. if (ret < 0)
  484. return ret;
  485. if (ret != wm9090_reg_defaults[WM9090_SOFTWARE_RESET]) {
  486. dev_err(codec->dev, "Device is not a WM9090, ID=%x\n", ret);
  487. return -EINVAL;
  488. }
  489. ret = snd_soc_write(codec, WM9090_SOFTWARE_RESET, 0);
  490. if (ret < 0)
  491. return ret;
  492. /* Configure some defaults; they will be written out when we
  493. * bring the bias up.
  494. */
  495. snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_A_VOLUME,
  496. WM9090_IN1_VU | WM9090_IN1A_ZC,
  497. WM9090_IN1_VU | WM9090_IN1A_ZC);
  498. snd_soc_update_bits(codec, WM9090_IN1_LINE_INPUT_B_VOLUME,
  499. WM9090_IN1_VU | WM9090_IN1B_ZC,
  500. WM9090_IN1_VU | WM9090_IN1B_ZC);
  501. snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_A_VOLUME,
  502. WM9090_IN2_VU | WM9090_IN2A_ZC,
  503. WM9090_IN2_VU | WM9090_IN2A_ZC);
  504. snd_soc_update_bits(codec, WM9090_IN2_LINE_INPUT_B_VOLUME,
  505. WM9090_IN2_VU | WM9090_IN2B_ZC,
  506. WM9090_IN2_VU | WM9090_IN2B_ZC);
  507. snd_soc_update_bits(codec, WM9090_SPEAKER_VOLUME_LEFT,
  508. WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC,
  509. WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC);
  510. snd_soc_update_bits(codec, WM9090_LEFT_OUTPUT_VOLUME,
  511. WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC,
  512. WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC);
  513. snd_soc_update_bits(codec, WM9090_RIGHT_OUTPUT_VOLUME,
  514. WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC,
  515. WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC);
  516. snd_soc_update_bits(codec, WM9090_CLOCKING_1,
  517. WM9090_TOCLK_ENA, WM9090_TOCLK_ENA);
  518. wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  519. wm9090_add_controls(codec);
  520. return 0;
  521. }
  522. #ifdef CONFIG_PM
  523. static int wm9090_suspend(struct snd_soc_codec *codec, pm_message_t state)
  524. {
  525. wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
  526. return 0;
  527. }
  528. static int wm9090_resume(struct snd_soc_codec *codec)
  529. {
  530. wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  531. return 0;
  532. }
  533. #else
  534. #define wm9090_suspend NULL
  535. #define wm9090_resume NULL
  536. #endif
  537. static int wm9090_remove(struct snd_soc_codec *codec)
  538. {
  539. wm9090_set_bias_level(codec, SND_SOC_BIAS_OFF);
  540. return 0;
  541. }
  542. static struct snd_soc_codec_driver soc_codec_dev_wm9090 = {
  543. .probe = wm9090_probe,
  544. .remove = wm9090_remove,
  545. .suspend = wm9090_suspend,
  546. .resume = wm9090_resume,
  547. .set_bias_level = wm9090_set_bias_level,
  548. .reg_cache_size = (WM9090_MAX_REGISTER + 1),
  549. .reg_word_size = sizeof(u16),
  550. .reg_cache_default = wm9090_reg_defaults,
  551. .volatile_register = wm9090_volatile,
  552. };
  553. static int wm9090_i2c_probe(struct i2c_client *i2c,
  554. const struct i2c_device_id *id)
  555. {
  556. struct wm9090_priv *wm9090;
  557. int ret;
  558. wm9090 = kzalloc(sizeof(*wm9090), GFP_KERNEL);
  559. if (wm9090 == NULL) {
  560. dev_err(&i2c->dev, "Can not allocate memory\n");
  561. return -ENOMEM;
  562. }
  563. if (i2c->dev.platform_data)
  564. memcpy(&wm9090->pdata, i2c->dev.platform_data,
  565. sizeof(wm9090->pdata));
  566. i2c_set_clientdata(i2c, wm9090);
  567. wm9090->control_data = i2c;
  568. mutex_init(&wm9090->mutex);
  569. ret = snd_soc_register_codec(&i2c->dev,
  570. &soc_codec_dev_wm9090, NULL, 0);
  571. if (ret < 0)
  572. kfree(wm9090);
  573. return ret;
  574. }
  575. static int __devexit wm9090_i2c_remove(struct i2c_client *i2c)
  576. {
  577. struct wm9090_priv *wm9090 = i2c_get_clientdata(i2c);
  578. snd_soc_unregister_codec(&i2c->dev);
  579. kfree(wm9090);
  580. return 0;
  581. }
  582. static const struct i2c_device_id wm9090_id[] = {
  583. { "wm9090", 0 },
  584. { }
  585. };
  586. MODULE_DEVICE_TABLE(i2c, wm9090_id);
  587. static struct i2c_driver wm9090_i2c_driver = {
  588. .driver = {
  589. .name = "wm9090-codec",
  590. .owner = THIS_MODULE,
  591. },
  592. .probe = wm9090_i2c_probe,
  593. .remove = __devexit_p(wm9090_i2c_remove),
  594. .id_table = wm9090_id,
  595. };
  596. static int __init wm9090_init(void)
  597. {
  598. return i2c_add_driver(&wm9090_i2c_driver);
  599. }
  600. module_init(wm9090_init);
  601. static void __exit wm9090_exit(void)
  602. {
  603. i2c_del_driver(&wm9090_i2c_driver);
  604. }
  605. module_exit(wm9090_exit);
  606. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  607. MODULE_DESCRIPTION("WM9090 ASoC driver");
  608. MODULE_LICENSE("GPL");