wm8988.c 26 KB

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  1. /*
  2. * wm8988.c -- WM8988 ALSA SoC audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/slab.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/tlv.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include "wm8988.h"
  29. /*
  30. * wm8988 register cache
  31. * We can't read the WM8988 register space when we
  32. * are using 2 wire for device control, so we cache them instead.
  33. */
  34. static const u16 wm8988_reg[] = {
  35. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  36. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  37. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  38. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  39. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  40. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  41. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  42. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  43. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  44. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  45. 0x0079, 0x0079, 0x0079, /* 40 */
  46. };
  47. /* codec private data */
  48. struct wm8988_priv {
  49. unsigned int sysclk;
  50. enum snd_soc_control_type control_type;
  51. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  52. };
  53. #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
  54. /*
  55. * WM8988 Controls
  56. */
  57. static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  58. static const struct soc_enum bass_boost =
  59. SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  60. static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  61. static const struct soc_enum bass_filter =
  62. SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  63. static const char *treble_txt[] = {"8kHz", "4kHz"};
  64. static const struct soc_enum treble =
  65. SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  66. static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  67. static const struct soc_enum stereo_3d_lc =
  68. SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  69. static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  70. static const struct soc_enum stereo_3d_uc =
  71. SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  72. static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  73. static const struct soc_enum stereo_3d_func =
  74. SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  75. static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  76. static const struct soc_enum alc_func =
  77. SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  78. static const char *ng_type_txt[] = {"Constant PGA Gain",
  79. "Mute ADC Output"};
  80. static const struct soc_enum ng_type =
  81. SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  82. static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  83. static const struct soc_enum deemph =
  84. SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  85. static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
  86. "L + R Invert"};
  87. static const struct soc_enum adcpol =
  88. SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
  89. static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
  90. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  91. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  92. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  93. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
  94. static const struct snd_kcontrol_new wm8988_snd_controls[] = {
  95. SOC_ENUM("Bass Boost", bass_boost),
  96. SOC_ENUM("Bass Filter", bass_filter),
  97. SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
  98. SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
  99. SOC_ENUM("Treble Cut-off", treble),
  100. SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
  101. SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
  102. SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
  103. SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
  104. SOC_ENUM("3D Mode", stereo_3d_func),
  105. SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
  106. SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
  107. SOC_ENUM("ALC Capture Function", alc_func),
  108. SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
  109. SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
  110. SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
  111. SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
  112. SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
  113. SOC_ENUM("ALC Capture NG Type", ng_type),
  114. SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
  115. SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
  116. SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
  117. 0, 255, 0, adc_tlv),
  118. SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
  119. 0, 63, 0, pga_tlv),
  120. SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
  121. SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
  122. SOC_ENUM("Playback De-emphasis", deemph),
  123. SOC_ENUM("Capture Polarity", adcpol),
  124. SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
  125. SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
  126. SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
  127. SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
  128. bypass_tlv),
  129. SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
  130. bypass_tlv),
  131. SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
  132. bypass_tlv),
  133. SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
  134. bypass_tlv),
  135. SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
  136. WM8988_ROUT1V, 7, 1, 0),
  137. SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
  138. 0, 127, 0, out_tlv),
  139. SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
  140. WM8988_ROUT2V, 7, 1, 0),
  141. SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
  142. 0, 127, 0, out_tlv),
  143. };
  144. /*
  145. * DAPM Controls
  146. */
  147. static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
  148. struct snd_kcontrol *kcontrol, int event)
  149. {
  150. struct snd_soc_codec *codec = w->codec;
  151. u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
  152. /* Use the DAC to gate LRC if active, otherwise use ADC */
  153. if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
  154. adctl2 &= ~0x4;
  155. else
  156. adctl2 |= 0x4;
  157. return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
  158. }
  159. static const char *wm8988_line_texts[] = {
  160. "Line 1", "Line 2", "PGA", "Differential"};
  161. static const unsigned int wm8988_line_values[] = {
  162. 0, 1, 3, 4};
  163. static const struct soc_enum wm8988_lline_enum =
  164. SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
  165. ARRAY_SIZE(wm8988_line_texts),
  166. wm8988_line_texts,
  167. wm8988_line_values);
  168. static const struct snd_kcontrol_new wm8988_left_line_controls =
  169. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  170. static const struct soc_enum wm8988_rline_enum =
  171. SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
  172. ARRAY_SIZE(wm8988_line_texts),
  173. wm8988_line_texts,
  174. wm8988_line_values);
  175. static const struct snd_kcontrol_new wm8988_right_line_controls =
  176. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  177. /* Left Mixer */
  178. static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
  179. SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
  180. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
  181. SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
  182. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
  183. };
  184. /* Right Mixer */
  185. static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
  186. SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
  187. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
  188. SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
  189. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
  190. };
  191. static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
  192. static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
  193. /* Left PGA Mux */
  194. static const struct soc_enum wm8988_lpga_enum =
  195. SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
  196. ARRAY_SIZE(wm8988_pga_sel),
  197. wm8988_pga_sel,
  198. wm8988_pga_val);
  199. static const struct snd_kcontrol_new wm8988_left_pga_controls =
  200. SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
  201. /* Right PGA Mux */
  202. static const struct soc_enum wm8988_rpga_enum =
  203. SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
  204. ARRAY_SIZE(wm8988_pga_sel),
  205. wm8988_pga_sel,
  206. wm8988_pga_val);
  207. static const struct snd_kcontrol_new wm8988_right_pga_controls =
  208. SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
  209. /* Differential Mux */
  210. static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
  211. static const struct soc_enum diffmux =
  212. SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
  213. static const struct snd_kcontrol_new wm8988_diffmux_controls =
  214. SOC_DAPM_ENUM("Route", diffmux);
  215. /* Mono ADC Mux */
  216. static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
  217. "Mono (Right)", "Digital Mono"};
  218. static const struct soc_enum monomux =
  219. SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
  220. static const struct snd_kcontrol_new wm8988_monomux_controls =
  221. SOC_DAPM_ENUM("Route", monomux);
  222. static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
  223. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0),
  224. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  225. &wm8988_diffmux_controls),
  226. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  227. &wm8988_monomux_controls),
  228. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  229. &wm8988_monomux_controls),
  230. SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
  231. &wm8988_left_pga_controls),
  232. SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
  233. &wm8988_right_pga_controls),
  234. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  235. &wm8988_left_line_controls),
  236. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  237. &wm8988_right_line_controls),
  238. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
  239. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
  240. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
  241. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
  242. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  243. &wm8988_left_mixer_controls[0],
  244. ARRAY_SIZE(wm8988_left_mixer_controls)),
  245. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  246. &wm8988_right_mixer_controls[0],
  247. ARRAY_SIZE(wm8988_right_mixer_controls)),
  248. SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
  249. SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
  250. SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
  251. SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
  252. SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
  253. SND_SOC_DAPM_OUTPUT("LOUT1"),
  254. SND_SOC_DAPM_OUTPUT("ROUT1"),
  255. SND_SOC_DAPM_OUTPUT("LOUT2"),
  256. SND_SOC_DAPM_OUTPUT("ROUT2"),
  257. SND_SOC_DAPM_OUTPUT("VREF"),
  258. SND_SOC_DAPM_INPUT("LINPUT1"),
  259. SND_SOC_DAPM_INPUT("LINPUT2"),
  260. SND_SOC_DAPM_INPUT("RINPUT1"),
  261. SND_SOC_DAPM_INPUT("RINPUT2"),
  262. };
  263. static const struct snd_soc_dapm_route audio_map[] = {
  264. { "Left Line Mux", "Line 1", "LINPUT1" },
  265. { "Left Line Mux", "Line 2", "LINPUT2" },
  266. { "Left Line Mux", "PGA", "Left PGA Mux" },
  267. { "Left Line Mux", "Differential", "Differential Mux" },
  268. { "Right Line Mux", "Line 1", "RINPUT1" },
  269. { "Right Line Mux", "Line 2", "RINPUT2" },
  270. { "Right Line Mux", "PGA", "Right PGA Mux" },
  271. { "Right Line Mux", "Differential", "Differential Mux" },
  272. { "Left PGA Mux", "Line 1", "LINPUT1" },
  273. { "Left PGA Mux", "Line 2", "LINPUT2" },
  274. { "Left PGA Mux", "Differential", "Differential Mux" },
  275. { "Right PGA Mux", "Line 1", "RINPUT1" },
  276. { "Right PGA Mux", "Line 2", "RINPUT2" },
  277. { "Right PGA Mux", "Differential", "Differential Mux" },
  278. { "Differential Mux", "Line 1", "LINPUT1" },
  279. { "Differential Mux", "Line 1", "RINPUT1" },
  280. { "Differential Mux", "Line 2", "LINPUT2" },
  281. { "Differential Mux", "Line 2", "RINPUT2" },
  282. { "Left ADC Mux", "Stereo", "Left PGA Mux" },
  283. { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
  284. { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
  285. { "Right ADC Mux", "Stereo", "Right PGA Mux" },
  286. { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
  287. { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
  288. { "Left ADC", NULL, "Left ADC Mux" },
  289. { "Right ADC", NULL, "Right ADC Mux" },
  290. { "Left Line Mux", "Line 1", "LINPUT1" },
  291. { "Left Line Mux", "Line 2", "LINPUT2" },
  292. { "Left Line Mux", "PGA", "Left PGA Mux" },
  293. { "Left Line Mux", "Differential", "Differential Mux" },
  294. { "Right Line Mux", "Line 1", "RINPUT1" },
  295. { "Right Line Mux", "Line 2", "RINPUT2" },
  296. { "Right Line Mux", "PGA", "Right PGA Mux" },
  297. { "Right Line Mux", "Differential", "Differential Mux" },
  298. { "Left Mixer", "Playback Switch", "Left DAC" },
  299. { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
  300. { "Left Mixer", "Right Playback Switch", "Right DAC" },
  301. { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
  302. { "Right Mixer", "Left Playback Switch", "Left DAC" },
  303. { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
  304. { "Right Mixer", "Playback Switch", "Right DAC" },
  305. { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
  306. { "Left Out 1", NULL, "Left Mixer" },
  307. { "LOUT1", NULL, "Left Out 1" },
  308. { "Right Out 1", NULL, "Right Mixer" },
  309. { "ROUT1", NULL, "Right Out 1" },
  310. { "Left Out 2", NULL, "Left Mixer" },
  311. { "LOUT2", NULL, "Left Out 2" },
  312. { "Right Out 2", NULL, "Right Mixer" },
  313. { "ROUT2", NULL, "Right Out 2" },
  314. };
  315. struct _coeff_div {
  316. u32 mclk;
  317. u32 rate;
  318. u16 fs;
  319. u8 sr:5;
  320. u8 usb:1;
  321. };
  322. /* codec hifi mclk clock divider coefficients */
  323. static const struct _coeff_div coeff_div[] = {
  324. /* 8k */
  325. {12288000, 8000, 1536, 0x6, 0x0},
  326. {11289600, 8000, 1408, 0x16, 0x0},
  327. {18432000, 8000, 2304, 0x7, 0x0},
  328. {16934400, 8000, 2112, 0x17, 0x0},
  329. {12000000, 8000, 1500, 0x6, 0x1},
  330. /* 11.025k */
  331. {11289600, 11025, 1024, 0x18, 0x0},
  332. {16934400, 11025, 1536, 0x19, 0x0},
  333. {12000000, 11025, 1088, 0x19, 0x1},
  334. /* 16k */
  335. {12288000, 16000, 768, 0xa, 0x0},
  336. {18432000, 16000, 1152, 0xb, 0x0},
  337. {12000000, 16000, 750, 0xa, 0x1},
  338. /* 22.05k */
  339. {11289600, 22050, 512, 0x1a, 0x0},
  340. {16934400, 22050, 768, 0x1b, 0x0},
  341. {12000000, 22050, 544, 0x1b, 0x1},
  342. /* 32k */
  343. {12288000, 32000, 384, 0xc, 0x0},
  344. {18432000, 32000, 576, 0xd, 0x0},
  345. {12000000, 32000, 375, 0xa, 0x1},
  346. /* 44.1k */
  347. {11289600, 44100, 256, 0x10, 0x0},
  348. {16934400, 44100, 384, 0x11, 0x0},
  349. {12000000, 44100, 272, 0x11, 0x1},
  350. /* 48k */
  351. {12288000, 48000, 256, 0x0, 0x0},
  352. {18432000, 48000, 384, 0x1, 0x0},
  353. {12000000, 48000, 250, 0x0, 0x1},
  354. /* 88.2k */
  355. {11289600, 88200, 128, 0x1e, 0x0},
  356. {16934400, 88200, 192, 0x1f, 0x0},
  357. {12000000, 88200, 136, 0x1f, 0x1},
  358. /* 96k */
  359. {12288000, 96000, 128, 0xe, 0x0},
  360. {18432000, 96000, 192, 0xf, 0x0},
  361. {12000000, 96000, 125, 0xe, 0x1},
  362. };
  363. static inline int get_coeff(int mclk, int rate)
  364. {
  365. int i;
  366. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  367. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  368. return i;
  369. }
  370. return -EINVAL;
  371. }
  372. /* The set of rates we can generate from the above for each SYSCLK */
  373. static unsigned int rates_12288[] = {
  374. 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
  375. };
  376. static struct snd_pcm_hw_constraint_list constraints_12288 = {
  377. .count = ARRAY_SIZE(rates_12288),
  378. .list = rates_12288,
  379. };
  380. static unsigned int rates_112896[] = {
  381. 8000, 11025, 22050, 44100,
  382. };
  383. static struct snd_pcm_hw_constraint_list constraints_112896 = {
  384. .count = ARRAY_SIZE(rates_112896),
  385. .list = rates_112896,
  386. };
  387. static unsigned int rates_12[] = {
  388. 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
  389. 48000, 88235, 96000,
  390. };
  391. static struct snd_pcm_hw_constraint_list constraints_12 = {
  392. .count = ARRAY_SIZE(rates_12),
  393. .list = rates_12,
  394. };
  395. /*
  396. * Note that this should be called from init rather than from hw_params.
  397. */
  398. static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  399. int clk_id, unsigned int freq, int dir)
  400. {
  401. struct snd_soc_codec *codec = codec_dai->codec;
  402. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  403. switch (freq) {
  404. case 11289600:
  405. case 18432000:
  406. case 22579200:
  407. case 36864000:
  408. wm8988->sysclk_constraints = &constraints_112896;
  409. wm8988->sysclk = freq;
  410. return 0;
  411. case 12288000:
  412. case 16934400:
  413. case 24576000:
  414. case 33868800:
  415. wm8988->sysclk_constraints = &constraints_12288;
  416. wm8988->sysclk = freq;
  417. return 0;
  418. case 12000000:
  419. case 24000000:
  420. wm8988->sysclk_constraints = &constraints_12;
  421. wm8988->sysclk = freq;
  422. return 0;
  423. }
  424. return -EINVAL;
  425. }
  426. static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
  427. unsigned int fmt)
  428. {
  429. struct snd_soc_codec *codec = codec_dai->codec;
  430. u16 iface = 0;
  431. /* set master/slave audio interface */
  432. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  433. case SND_SOC_DAIFMT_CBM_CFM:
  434. iface = 0x0040;
  435. break;
  436. case SND_SOC_DAIFMT_CBS_CFS:
  437. break;
  438. default:
  439. return -EINVAL;
  440. }
  441. /* interface format */
  442. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  443. case SND_SOC_DAIFMT_I2S:
  444. iface |= 0x0002;
  445. break;
  446. case SND_SOC_DAIFMT_RIGHT_J:
  447. break;
  448. case SND_SOC_DAIFMT_LEFT_J:
  449. iface |= 0x0001;
  450. break;
  451. case SND_SOC_DAIFMT_DSP_A:
  452. iface |= 0x0003;
  453. break;
  454. case SND_SOC_DAIFMT_DSP_B:
  455. iface |= 0x0013;
  456. break;
  457. default:
  458. return -EINVAL;
  459. }
  460. /* clock inversion */
  461. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  462. case SND_SOC_DAIFMT_NB_NF:
  463. break;
  464. case SND_SOC_DAIFMT_IB_IF:
  465. iface |= 0x0090;
  466. break;
  467. case SND_SOC_DAIFMT_IB_NF:
  468. iface |= 0x0080;
  469. break;
  470. case SND_SOC_DAIFMT_NB_IF:
  471. iface |= 0x0010;
  472. break;
  473. default:
  474. return -EINVAL;
  475. }
  476. snd_soc_write(codec, WM8988_IFACE, iface);
  477. return 0;
  478. }
  479. static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
  480. struct snd_soc_dai *dai)
  481. {
  482. struct snd_soc_codec *codec = dai->codec;
  483. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  484. /* The set of sample rates that can be supported depends on the
  485. * MCLK supplied to the CODEC - enforce this.
  486. */
  487. if (!wm8988->sysclk) {
  488. dev_err(codec->dev,
  489. "No MCLK configured, call set_sysclk() on init\n");
  490. return -EINVAL;
  491. }
  492. snd_pcm_hw_constraint_list(substream->runtime, 0,
  493. SNDRV_PCM_HW_PARAM_RATE,
  494. wm8988->sysclk_constraints);
  495. return 0;
  496. }
  497. static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
  498. struct snd_pcm_hw_params *params,
  499. struct snd_soc_dai *dai)
  500. {
  501. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  502. struct snd_soc_codec *codec = rtd->codec;
  503. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  504. u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
  505. u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
  506. int coeff;
  507. coeff = get_coeff(wm8988->sysclk, params_rate(params));
  508. if (coeff < 0) {
  509. coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
  510. srate |= 0x40;
  511. }
  512. if (coeff < 0) {
  513. dev_err(codec->dev,
  514. "Unable to configure sample rate %dHz with %dHz MCLK\n",
  515. params_rate(params), wm8988->sysclk);
  516. return coeff;
  517. }
  518. /* bit size */
  519. switch (params_format(params)) {
  520. case SNDRV_PCM_FORMAT_S16_LE:
  521. break;
  522. case SNDRV_PCM_FORMAT_S20_3LE:
  523. iface |= 0x0004;
  524. break;
  525. case SNDRV_PCM_FORMAT_S24_LE:
  526. iface |= 0x0008;
  527. break;
  528. case SNDRV_PCM_FORMAT_S32_LE:
  529. iface |= 0x000c;
  530. break;
  531. }
  532. /* set iface & srate */
  533. snd_soc_write(codec, WM8988_IFACE, iface);
  534. if (coeff >= 0)
  535. snd_soc_write(codec, WM8988_SRATE, srate |
  536. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  537. return 0;
  538. }
  539. static int wm8988_mute(struct snd_soc_dai *dai, int mute)
  540. {
  541. struct snd_soc_codec *codec = dai->codec;
  542. u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
  543. if (mute)
  544. snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
  545. else
  546. snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
  547. return 0;
  548. }
  549. static int wm8988_set_bias_level(struct snd_soc_codec *codec,
  550. enum snd_soc_bias_level level)
  551. {
  552. u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
  553. switch (level) {
  554. case SND_SOC_BIAS_ON:
  555. break;
  556. case SND_SOC_BIAS_PREPARE:
  557. /* VREF, VMID=2x50k, digital enabled */
  558. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
  559. break;
  560. case SND_SOC_BIAS_STANDBY:
  561. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  562. /* VREF, VMID=2x5k */
  563. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
  564. /* Charge caps */
  565. msleep(100);
  566. }
  567. /* VREF, VMID=2*500k, digital stopped */
  568. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
  569. break;
  570. case SND_SOC_BIAS_OFF:
  571. snd_soc_write(codec, WM8988_PWR1, 0x0000);
  572. break;
  573. }
  574. codec->dapm.bias_level = level;
  575. return 0;
  576. }
  577. #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
  578. #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  579. SNDRV_PCM_FMTBIT_S24_LE)
  580. static struct snd_soc_dai_ops wm8988_ops = {
  581. .startup = wm8988_pcm_startup,
  582. .hw_params = wm8988_pcm_hw_params,
  583. .set_fmt = wm8988_set_dai_fmt,
  584. .set_sysclk = wm8988_set_dai_sysclk,
  585. .digital_mute = wm8988_mute,
  586. };
  587. static struct snd_soc_dai_driver wm8988_dai = {
  588. .name = "wm8988-hifi",
  589. .playback = {
  590. .stream_name = "Playback",
  591. .channels_min = 1,
  592. .channels_max = 2,
  593. .rates = WM8988_RATES,
  594. .formats = WM8988_FORMATS,
  595. },
  596. .capture = {
  597. .stream_name = "Capture",
  598. .channels_min = 1,
  599. .channels_max = 2,
  600. .rates = WM8988_RATES,
  601. .formats = WM8988_FORMATS,
  602. },
  603. .ops = &wm8988_ops,
  604. .symmetric_rates = 1,
  605. };
  606. static int wm8988_suspend(struct snd_soc_codec *codec, pm_message_t state)
  607. {
  608. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  609. return 0;
  610. }
  611. static int wm8988_resume(struct snd_soc_codec *codec)
  612. {
  613. int i;
  614. u8 data[2];
  615. u16 *cache = codec->reg_cache;
  616. /* Sync reg_cache with the hardware */
  617. for (i = 0; i < WM8988_NUM_REG; i++) {
  618. if (i == WM8988_RESET)
  619. continue;
  620. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  621. data[1] = cache[i] & 0x00ff;
  622. codec->hw_write(codec->control_data, data, 2);
  623. }
  624. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  625. return 0;
  626. }
  627. static int wm8988_probe(struct snd_soc_codec *codec)
  628. {
  629. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  630. struct snd_soc_dapm_context *dapm = &codec->dapm;
  631. int ret = 0;
  632. u16 reg;
  633. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8988->control_type);
  634. if (ret < 0) {
  635. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  636. return ret;
  637. }
  638. ret = wm8988_reset(codec);
  639. if (ret < 0) {
  640. dev_err(codec->dev, "Failed to issue reset\n");
  641. return ret;
  642. }
  643. /* set the update bits (we always update left then right) */
  644. reg = snd_soc_read(codec, WM8988_RADC);
  645. snd_soc_write(codec, WM8988_RADC, reg | 0x100);
  646. reg = snd_soc_read(codec, WM8988_RDAC);
  647. snd_soc_write(codec, WM8988_RDAC, reg | 0x0100);
  648. reg = snd_soc_read(codec, WM8988_ROUT1V);
  649. snd_soc_write(codec, WM8988_ROUT1V, reg | 0x0100);
  650. reg = snd_soc_read(codec, WM8988_ROUT2V);
  651. snd_soc_write(codec, WM8988_ROUT2V, reg | 0x0100);
  652. reg = snd_soc_read(codec, WM8988_RINVOL);
  653. snd_soc_write(codec, WM8988_RINVOL, reg | 0x0100);
  654. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  655. snd_soc_add_controls(codec, wm8988_snd_controls,
  656. ARRAY_SIZE(wm8988_snd_controls));
  657. snd_soc_dapm_new_controls(dapm, wm8988_dapm_widgets,
  658. ARRAY_SIZE(wm8988_dapm_widgets));
  659. snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
  660. return 0;
  661. }
  662. static int wm8988_remove(struct snd_soc_codec *codec)
  663. {
  664. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  665. return 0;
  666. }
  667. static struct snd_soc_codec_driver soc_codec_dev_wm8988 = {
  668. .probe = wm8988_probe,
  669. .remove = wm8988_remove,
  670. .suspend = wm8988_suspend,
  671. .resume = wm8988_resume,
  672. .set_bias_level = wm8988_set_bias_level,
  673. .reg_cache_size = ARRAY_SIZE(wm8988_reg),
  674. .reg_word_size = sizeof(u16),
  675. .reg_cache_default = wm8988_reg,
  676. };
  677. #if defined(CONFIG_SPI_MASTER)
  678. static int __devinit wm8988_spi_probe(struct spi_device *spi)
  679. {
  680. struct wm8988_priv *wm8988;
  681. int ret;
  682. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  683. if (wm8988 == NULL)
  684. return -ENOMEM;
  685. wm8988->control_type = SND_SOC_SPI;
  686. spi_set_drvdata(spi, wm8988);
  687. ret = snd_soc_register_codec(&spi->dev,
  688. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  689. if (ret < 0)
  690. kfree(wm8988);
  691. return ret;
  692. }
  693. static int __devexit wm8988_spi_remove(struct spi_device *spi)
  694. {
  695. snd_soc_unregister_codec(&spi->dev);
  696. kfree(spi_get_drvdata(spi));
  697. return 0;
  698. }
  699. static struct spi_driver wm8988_spi_driver = {
  700. .driver = {
  701. .name = "wm8988-codec",
  702. .owner = THIS_MODULE,
  703. },
  704. .probe = wm8988_spi_probe,
  705. .remove = __devexit_p(wm8988_spi_remove),
  706. };
  707. #endif /* CONFIG_SPI_MASTER */
  708. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  709. static __devinit int wm8988_i2c_probe(struct i2c_client *i2c,
  710. const struct i2c_device_id *id)
  711. {
  712. struct wm8988_priv *wm8988;
  713. int ret;
  714. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  715. if (wm8988 == NULL)
  716. return -ENOMEM;
  717. i2c_set_clientdata(i2c, wm8988);
  718. wm8988->control_type = SND_SOC_I2C;
  719. ret = snd_soc_register_codec(&i2c->dev,
  720. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  721. if (ret < 0)
  722. kfree(wm8988);
  723. return ret;
  724. }
  725. static __devexit int wm8988_i2c_remove(struct i2c_client *client)
  726. {
  727. snd_soc_unregister_codec(&client->dev);
  728. kfree(i2c_get_clientdata(client));
  729. return 0;
  730. }
  731. static const struct i2c_device_id wm8988_i2c_id[] = {
  732. { "wm8988", 0 },
  733. { }
  734. };
  735. MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
  736. static struct i2c_driver wm8988_i2c_driver = {
  737. .driver = {
  738. .name = "wm8988-codec",
  739. .owner = THIS_MODULE,
  740. },
  741. .probe = wm8988_i2c_probe,
  742. .remove = __devexit_p(wm8988_i2c_remove),
  743. .id_table = wm8988_i2c_id,
  744. };
  745. #endif
  746. static int __init wm8988_modinit(void)
  747. {
  748. int ret = 0;
  749. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  750. ret = i2c_add_driver(&wm8988_i2c_driver);
  751. if (ret != 0) {
  752. printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n",
  753. ret);
  754. }
  755. #endif
  756. #if defined(CONFIG_SPI_MASTER)
  757. ret = spi_register_driver(&wm8988_spi_driver);
  758. if (ret != 0) {
  759. printk(KERN_ERR "Failed to register WM8988 SPI driver: %d\n",
  760. ret);
  761. }
  762. #endif
  763. return ret;
  764. }
  765. module_init(wm8988_modinit);
  766. static void __exit wm8988_exit(void)
  767. {
  768. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  769. i2c_del_driver(&wm8988_i2c_driver);
  770. #endif
  771. #if defined(CONFIG_SPI_MASTER)
  772. spi_unregister_driver(&wm8988_spi_driver);
  773. #endif
  774. }
  775. module_exit(wm8988_exit);
  776. MODULE_DESCRIPTION("ASoC WM8988 driver");
  777. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  778. MODULE_LICENSE("GPL");