cs42l51.c 18 KB

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  1. /*
  2. * cs42l51.c
  3. *
  4. * ASoC Driver for Cirrus Logic CS42L51 codecs
  5. *
  6. * Copyright (c) 2010 Arnaud Patard <apatard@mandriva.com>
  7. *
  8. * Based on cs4270.c - Copyright (c) Freescale Semiconductor
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * For now:
  20. * - Only I2C is support. Not SPI
  21. * - master mode *NOT* supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <sound/core.h>
  27. #include <sound/soc.h>
  28. #include <sound/tlv.h>
  29. #include <sound/initval.h>
  30. #include <sound/pcm_params.h>
  31. #include <sound/pcm.h>
  32. #include <linux/i2c.h>
  33. #include "cs42l51.h"
  34. enum master_slave_mode {
  35. MODE_SLAVE,
  36. MODE_SLAVE_AUTO,
  37. MODE_MASTER,
  38. };
  39. struct cs42l51_private {
  40. enum snd_soc_control_type control_type;
  41. void *control_data;
  42. unsigned int mclk;
  43. unsigned int audio_mode; /* The mode (I2S or left-justified) */
  44. enum master_slave_mode func;
  45. };
  46. #define CS42L51_FORMATS ( \
  47. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  48. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  49. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  50. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  51. static int cs42l51_fill_cache(struct snd_soc_codec *codec)
  52. {
  53. u8 *cache = codec->reg_cache + 1;
  54. struct i2c_client *i2c_client = codec->control_data;
  55. s32 length;
  56. length = i2c_smbus_read_i2c_block_data(i2c_client,
  57. CS42L51_FIRSTREG | 0x80, CS42L51_NUMREGS, cache);
  58. if (length != CS42L51_NUMREGS) {
  59. dev_err(&i2c_client->dev,
  60. "I2C read failure, addr=0x%x (ret=%d vs %d)\n",
  61. i2c_client->addr, length, CS42L51_NUMREGS);
  62. return -EIO;
  63. }
  64. return 0;
  65. }
  66. static int cs42l51_get_chan_mix(struct snd_kcontrol *kcontrol,
  67. struct snd_ctl_elem_value *ucontrol)
  68. {
  69. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  70. unsigned long value = snd_soc_read(codec, CS42L51_PCM_MIXER)&3;
  71. switch (value) {
  72. default:
  73. case 0:
  74. ucontrol->value.integer.value[0] = 0;
  75. break;
  76. /* same value : (L+R)/2 and (R+L)/2 */
  77. case 1:
  78. case 2:
  79. ucontrol->value.integer.value[0] = 1;
  80. break;
  81. case 3:
  82. ucontrol->value.integer.value[0] = 2;
  83. break;
  84. }
  85. return 0;
  86. }
  87. #define CHAN_MIX_NORMAL 0x00
  88. #define CHAN_MIX_BOTH 0x55
  89. #define CHAN_MIX_SWAP 0xFF
  90. static int cs42l51_set_chan_mix(struct snd_kcontrol *kcontrol,
  91. struct snd_ctl_elem_value *ucontrol)
  92. {
  93. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  94. unsigned char val;
  95. switch (ucontrol->value.integer.value[0]) {
  96. default:
  97. case 0:
  98. val = CHAN_MIX_NORMAL;
  99. break;
  100. case 1:
  101. val = CHAN_MIX_BOTH;
  102. break;
  103. case 2:
  104. val = CHAN_MIX_SWAP;
  105. break;
  106. }
  107. snd_soc_write(codec, CS42L51_PCM_MIXER, val);
  108. return 1;
  109. }
  110. static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
  111. static const DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
  112. /* This is a lie. after -102 db, it stays at -102 */
  113. /* maybe a range would be better */
  114. static const DECLARE_TLV_DB_SCALE(aout_tlv, -11550, 50, 0);
  115. static const DECLARE_TLV_DB_SCALE(boost_tlv, 1600, 1600, 0);
  116. static const char *chan_mix[] = {
  117. "L R",
  118. "L+R",
  119. "R L",
  120. };
  121. static const struct soc_enum cs42l51_chan_mix =
  122. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(chan_mix), chan_mix);
  123. static const struct snd_kcontrol_new cs42l51_snd_controls[] = {
  124. SOC_DOUBLE_R_SX_TLV("PCM Playback Volume",
  125. CS42L51_PCMA_VOL, CS42L51_PCMB_VOL,
  126. 7, 0xffffff99, 0x18, adc_pcm_tlv),
  127. SOC_DOUBLE_R("PCM Playback Switch",
  128. CS42L51_PCMA_VOL, CS42L51_PCMB_VOL, 7, 1, 1),
  129. SOC_DOUBLE_R_SX_TLV("Analog Playback Volume",
  130. CS42L51_AOUTA_VOL, CS42L51_AOUTB_VOL,
  131. 8, 0xffffff19, 0x18, aout_tlv),
  132. SOC_DOUBLE_R_SX_TLV("ADC Mixer Volume",
  133. CS42L51_ADCA_VOL, CS42L51_ADCB_VOL,
  134. 7, 0xffffff99, 0x18, adc_pcm_tlv),
  135. SOC_DOUBLE_R("ADC Mixer Switch",
  136. CS42L51_ADCA_VOL, CS42L51_ADCB_VOL, 7, 1, 1),
  137. SOC_SINGLE("Playback Deemphasis Switch", CS42L51_DAC_CTL, 3, 1, 0),
  138. SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
  139. SOC_SINGLE("Soft Ramp Switch", CS42L51_DAC_CTL, 1, 1, 0),
  140. SOC_SINGLE("Zero Cross Switch", CS42L51_DAC_CTL, 0, 0, 0),
  141. SOC_DOUBLE_TLV("Mic Boost Volume",
  142. CS42L51_MIC_CTL, 0, 1, 1, 0, boost_tlv),
  143. SOC_SINGLE_TLV("Bass Volume", CS42L51_TONE_CTL, 0, 0xf, 1, tone_tlv),
  144. SOC_SINGLE_TLV("Treble Volume", CS42L51_TONE_CTL, 4, 0xf, 1, tone_tlv),
  145. SOC_ENUM_EXT("PCM channel mixer",
  146. cs42l51_chan_mix,
  147. cs42l51_get_chan_mix, cs42l51_set_chan_mix),
  148. };
  149. /*
  150. * to power down, one must:
  151. * 1.) Enable the PDN bit
  152. * 2.) enable power-down for the select channels
  153. * 3.) disable the PDN bit.
  154. */
  155. static int cs42l51_pdn_event(struct snd_soc_dapm_widget *w,
  156. struct snd_kcontrol *kcontrol, int event)
  157. {
  158. unsigned long value;
  159. value = snd_soc_read(w->codec, CS42L51_POWER_CTL1);
  160. value &= ~CS42L51_POWER_CTL1_PDN;
  161. switch (event) {
  162. case SND_SOC_DAPM_PRE_PMD:
  163. value |= CS42L51_POWER_CTL1_PDN;
  164. break;
  165. default:
  166. case SND_SOC_DAPM_POST_PMD:
  167. break;
  168. }
  169. snd_soc_update_bits(w->codec, CS42L51_POWER_CTL1,
  170. CS42L51_POWER_CTL1_PDN, value);
  171. return 0;
  172. }
  173. static const char *cs42l51_dac_names[] = {"Direct PCM",
  174. "DSP PCM", "ADC"};
  175. static const struct soc_enum cs42l51_dac_mux_enum =
  176. SOC_ENUM_SINGLE(CS42L51_DAC_CTL, 6, 3, cs42l51_dac_names);
  177. static const struct snd_kcontrol_new cs42l51_dac_mux_controls =
  178. SOC_DAPM_ENUM("Route", cs42l51_dac_mux_enum);
  179. static const char *cs42l51_adcl_names[] = {"AIN1 Left", "AIN2 Left",
  180. "MIC Left", "MIC+preamp Left"};
  181. static const struct soc_enum cs42l51_adcl_mux_enum =
  182. SOC_ENUM_SINGLE(CS42L51_ADC_INPUT, 4, 4, cs42l51_adcl_names);
  183. static const struct snd_kcontrol_new cs42l51_adcl_mux_controls =
  184. SOC_DAPM_ENUM("Route", cs42l51_adcl_mux_enum);
  185. static const char *cs42l51_adcr_names[] = {"AIN1 Right", "AIN2 Right",
  186. "MIC Right", "MIC+preamp Right"};
  187. static const struct soc_enum cs42l51_adcr_mux_enum =
  188. SOC_ENUM_SINGLE(CS42L51_ADC_INPUT, 6, 4, cs42l51_adcr_names);
  189. static const struct snd_kcontrol_new cs42l51_adcr_mux_controls =
  190. SOC_DAPM_ENUM("Route", cs42l51_adcr_mux_enum);
  191. static const struct snd_soc_dapm_widget cs42l51_dapm_widgets[] = {
  192. SND_SOC_DAPM_MICBIAS("Mic Bias", CS42L51_MIC_POWER_CTL, 1, 1),
  193. SND_SOC_DAPM_PGA_E("Left PGA", CS42L51_POWER_CTL1, 3, 1, NULL, 0,
  194. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  195. SND_SOC_DAPM_PGA_E("Right PGA", CS42L51_POWER_CTL1, 4, 1, NULL, 0,
  196. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  197. SND_SOC_DAPM_ADC_E("Left ADC", "Left HiFi Capture",
  198. CS42L51_POWER_CTL1, 1, 1,
  199. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  200. SND_SOC_DAPM_ADC_E("Right ADC", "Right HiFi Capture",
  201. CS42L51_POWER_CTL1, 2, 1,
  202. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  203. SND_SOC_DAPM_DAC_E("Left DAC", "Left HiFi Playback",
  204. CS42L51_POWER_CTL1, 5, 1,
  205. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  206. SND_SOC_DAPM_DAC_E("Right DAC", "Right HiFi Playback",
  207. CS42L51_POWER_CTL1, 6, 1,
  208. cs42l51_pdn_event, SND_SOC_DAPM_PRE_POST_PMD),
  209. /* analog/mic */
  210. SND_SOC_DAPM_INPUT("AIN1L"),
  211. SND_SOC_DAPM_INPUT("AIN1R"),
  212. SND_SOC_DAPM_INPUT("AIN2L"),
  213. SND_SOC_DAPM_INPUT("AIN2R"),
  214. SND_SOC_DAPM_INPUT("MICL"),
  215. SND_SOC_DAPM_INPUT("MICR"),
  216. SND_SOC_DAPM_MIXER("Mic Preamp Left",
  217. CS42L51_MIC_POWER_CTL, 2, 1, NULL, 0),
  218. SND_SOC_DAPM_MIXER("Mic Preamp Right",
  219. CS42L51_MIC_POWER_CTL, 3, 1, NULL, 0),
  220. /* HP */
  221. SND_SOC_DAPM_OUTPUT("HPL"),
  222. SND_SOC_DAPM_OUTPUT("HPR"),
  223. /* mux */
  224. SND_SOC_DAPM_MUX("DAC Mux", SND_SOC_NOPM, 0, 0,
  225. &cs42l51_dac_mux_controls),
  226. SND_SOC_DAPM_MUX("PGA-ADC Mux Left", SND_SOC_NOPM, 0, 0,
  227. &cs42l51_adcl_mux_controls),
  228. SND_SOC_DAPM_MUX("PGA-ADC Mux Right", SND_SOC_NOPM, 0, 0,
  229. &cs42l51_adcr_mux_controls),
  230. };
  231. static const struct snd_soc_dapm_route cs42l51_routes[] = {
  232. {"HPL", NULL, "Left DAC"},
  233. {"HPR", NULL, "Right DAC"},
  234. {"Left ADC", NULL, "Left PGA"},
  235. {"Right ADC", NULL, "Right PGA"},
  236. {"Mic Preamp Left", NULL, "MICL"},
  237. {"Mic Preamp Right", NULL, "MICR"},
  238. {"PGA-ADC Mux Left", "AIN1 Left", "AIN1L" },
  239. {"PGA-ADC Mux Left", "AIN2 Left", "AIN2L" },
  240. {"PGA-ADC Mux Left", "MIC Left", "MICL" },
  241. {"PGA-ADC Mux Left", "MIC+preamp Left", "Mic Preamp Left" },
  242. {"PGA-ADC Mux Right", "AIN1 Right", "AIN1R" },
  243. {"PGA-ADC Mux Right", "AIN2 Right", "AIN2R" },
  244. {"PGA-ADC Mux Right", "MIC Right", "MICR" },
  245. {"PGA-ADC Mux Right", "MIC+preamp Right", "Mic Preamp Right" },
  246. {"Left PGA", NULL, "PGA-ADC Mux Left"},
  247. {"Right PGA", NULL, "PGA-ADC Mux Right"},
  248. };
  249. static int cs42l51_set_dai_fmt(struct snd_soc_dai *codec_dai,
  250. unsigned int format)
  251. {
  252. struct snd_soc_codec *codec = codec_dai->codec;
  253. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  254. int ret = 0;
  255. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  256. case SND_SOC_DAIFMT_I2S:
  257. case SND_SOC_DAIFMT_LEFT_J:
  258. case SND_SOC_DAIFMT_RIGHT_J:
  259. cs42l51->audio_mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  260. break;
  261. default:
  262. dev_err(codec->dev, "invalid DAI format\n");
  263. ret = -EINVAL;
  264. }
  265. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  266. case SND_SOC_DAIFMT_CBM_CFM:
  267. cs42l51->func = MODE_MASTER;
  268. break;
  269. case SND_SOC_DAIFMT_CBS_CFS:
  270. cs42l51->func = MODE_SLAVE_AUTO;
  271. break;
  272. default:
  273. ret = -EINVAL;
  274. break;
  275. }
  276. return ret;
  277. }
  278. struct cs42l51_ratios {
  279. unsigned int ratio;
  280. unsigned char speed_mode;
  281. unsigned char mclk;
  282. };
  283. static struct cs42l51_ratios slave_ratios[] = {
  284. { 512, CS42L51_QSM_MODE, 0 }, { 768, CS42L51_QSM_MODE, 0 },
  285. { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
  286. { 2048, CS42L51_QSM_MODE, 0 }, { 3072, CS42L51_QSM_MODE, 0 },
  287. { 256, CS42L51_HSM_MODE, 0 }, { 384, CS42L51_HSM_MODE, 0 },
  288. { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
  289. { 1024, CS42L51_HSM_MODE, 0 }, { 1536, CS42L51_HSM_MODE, 0 },
  290. { 128, CS42L51_SSM_MODE, 0 }, { 192, CS42L51_SSM_MODE, 0 },
  291. { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
  292. { 512, CS42L51_SSM_MODE, 0 }, { 768, CS42L51_SSM_MODE, 0 },
  293. { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
  294. { 256, CS42L51_DSM_MODE, 0 }, { 384, CS42L51_DSM_MODE, 0 },
  295. };
  296. static struct cs42l51_ratios slave_auto_ratios[] = {
  297. { 1024, CS42L51_QSM_MODE, 0 }, { 1536, CS42L51_QSM_MODE, 0 },
  298. { 2048, CS42L51_QSM_MODE, 1 }, { 3072, CS42L51_QSM_MODE, 1 },
  299. { 512, CS42L51_HSM_MODE, 0 }, { 768, CS42L51_HSM_MODE, 0 },
  300. { 1024, CS42L51_HSM_MODE, 1 }, { 1536, CS42L51_HSM_MODE, 1 },
  301. { 256, CS42L51_SSM_MODE, 0 }, { 384, CS42L51_SSM_MODE, 0 },
  302. { 512, CS42L51_SSM_MODE, 1 }, { 768, CS42L51_SSM_MODE, 1 },
  303. { 128, CS42L51_DSM_MODE, 0 }, { 192, CS42L51_DSM_MODE, 0 },
  304. { 256, CS42L51_DSM_MODE, 1 }, { 384, CS42L51_DSM_MODE, 1 },
  305. };
  306. static int cs42l51_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  307. int clk_id, unsigned int freq, int dir)
  308. {
  309. struct snd_soc_codec *codec = codec_dai->codec;
  310. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  311. cs42l51->mclk = freq;
  312. return 0;
  313. }
  314. static int cs42l51_hw_params(struct snd_pcm_substream *substream,
  315. struct snd_pcm_hw_params *params,
  316. struct snd_soc_dai *dai)
  317. {
  318. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  319. struct snd_soc_codec *codec = rtd->codec;
  320. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  321. int ret;
  322. unsigned int i;
  323. unsigned int rate;
  324. unsigned int ratio;
  325. struct cs42l51_ratios *ratios = NULL;
  326. int nr_ratios = 0;
  327. int intf_ctl, power_ctl, fmt;
  328. switch (cs42l51->func) {
  329. case MODE_MASTER:
  330. return -EINVAL;
  331. case MODE_SLAVE:
  332. ratios = slave_ratios;
  333. nr_ratios = ARRAY_SIZE(slave_ratios);
  334. break;
  335. case MODE_SLAVE_AUTO:
  336. ratios = slave_auto_ratios;
  337. nr_ratios = ARRAY_SIZE(slave_auto_ratios);
  338. break;
  339. }
  340. /* Figure out which MCLK/LRCK ratio to use */
  341. rate = params_rate(params); /* Sampling rate, in Hz */
  342. ratio = cs42l51->mclk / rate; /* MCLK/LRCK ratio */
  343. for (i = 0; i < nr_ratios; i++) {
  344. if (ratios[i].ratio == ratio)
  345. break;
  346. }
  347. if (i == nr_ratios) {
  348. /* We did not find a matching ratio */
  349. dev_err(codec->dev, "could not find matching ratio\n");
  350. return -EINVAL;
  351. }
  352. intf_ctl = snd_soc_read(codec, CS42L51_INTF_CTL);
  353. power_ctl = snd_soc_read(codec, CS42L51_MIC_POWER_CTL);
  354. intf_ctl &= ~(CS42L51_INTF_CTL_MASTER | CS42L51_INTF_CTL_ADC_I2S
  355. | CS42L51_INTF_CTL_DAC_FORMAT(7));
  356. power_ctl &= ~(CS42L51_MIC_POWER_CTL_SPEED(3)
  357. | CS42L51_MIC_POWER_CTL_MCLK_DIV2);
  358. switch (cs42l51->func) {
  359. case MODE_MASTER:
  360. intf_ctl |= CS42L51_INTF_CTL_MASTER;
  361. power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
  362. break;
  363. case MODE_SLAVE:
  364. power_ctl |= CS42L51_MIC_POWER_CTL_SPEED(ratios[i].speed_mode);
  365. break;
  366. case MODE_SLAVE_AUTO:
  367. power_ctl |= CS42L51_MIC_POWER_CTL_AUTO;
  368. break;
  369. }
  370. switch (cs42l51->audio_mode) {
  371. case SND_SOC_DAIFMT_I2S:
  372. intf_ctl |= CS42L51_INTF_CTL_ADC_I2S;
  373. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_I2S);
  374. break;
  375. case SND_SOC_DAIFMT_LEFT_J:
  376. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(CS42L51_DAC_DIF_LJ24);
  377. break;
  378. case SND_SOC_DAIFMT_RIGHT_J:
  379. switch (params_format(params)) {
  380. case SNDRV_PCM_FORMAT_S16_LE:
  381. case SNDRV_PCM_FORMAT_S16_BE:
  382. fmt = CS42L51_DAC_DIF_RJ16;
  383. break;
  384. case SNDRV_PCM_FORMAT_S18_3LE:
  385. case SNDRV_PCM_FORMAT_S18_3BE:
  386. fmt = CS42L51_DAC_DIF_RJ18;
  387. break;
  388. case SNDRV_PCM_FORMAT_S20_3LE:
  389. case SNDRV_PCM_FORMAT_S20_3BE:
  390. fmt = CS42L51_DAC_DIF_RJ20;
  391. break;
  392. case SNDRV_PCM_FORMAT_S24_LE:
  393. case SNDRV_PCM_FORMAT_S24_BE:
  394. fmt = CS42L51_DAC_DIF_RJ24;
  395. break;
  396. default:
  397. dev_err(codec->dev, "unknown format\n");
  398. return -EINVAL;
  399. }
  400. intf_ctl |= CS42L51_INTF_CTL_DAC_FORMAT(fmt);
  401. break;
  402. default:
  403. dev_err(codec->dev, "unknown format\n");
  404. return -EINVAL;
  405. }
  406. if (ratios[i].mclk)
  407. power_ctl |= CS42L51_MIC_POWER_CTL_MCLK_DIV2;
  408. ret = snd_soc_write(codec, CS42L51_INTF_CTL, intf_ctl);
  409. if (ret < 0)
  410. return ret;
  411. ret = snd_soc_write(codec, CS42L51_MIC_POWER_CTL, power_ctl);
  412. if (ret < 0)
  413. return ret;
  414. return 0;
  415. }
  416. static int cs42l51_dai_mute(struct snd_soc_dai *dai, int mute)
  417. {
  418. struct snd_soc_codec *codec = dai->codec;
  419. int reg;
  420. int mask = CS42L51_DAC_OUT_CTL_DACA_MUTE|CS42L51_DAC_OUT_CTL_DACB_MUTE;
  421. reg = snd_soc_read(codec, CS42L51_DAC_OUT_CTL);
  422. if (mute)
  423. reg |= mask;
  424. else
  425. reg &= ~mask;
  426. return snd_soc_write(codec, CS42L51_DAC_OUT_CTL, reg);
  427. }
  428. static struct snd_soc_dai_ops cs42l51_dai_ops = {
  429. .hw_params = cs42l51_hw_params,
  430. .set_sysclk = cs42l51_set_dai_sysclk,
  431. .set_fmt = cs42l51_set_dai_fmt,
  432. .digital_mute = cs42l51_dai_mute,
  433. };
  434. static struct snd_soc_dai_driver cs42l51_dai = {
  435. .name = "cs42l51-hifi",
  436. .playback = {
  437. .stream_name = "Playback",
  438. .channels_min = 1,
  439. .channels_max = 2,
  440. .rates = SNDRV_PCM_RATE_8000_96000,
  441. .formats = CS42L51_FORMATS,
  442. },
  443. .capture = {
  444. .stream_name = "Capture",
  445. .channels_min = 1,
  446. .channels_max = 2,
  447. .rates = SNDRV_PCM_RATE_8000_96000,
  448. .formats = CS42L51_FORMATS,
  449. },
  450. .ops = &cs42l51_dai_ops,
  451. };
  452. static int cs42l51_probe(struct snd_soc_codec *codec)
  453. {
  454. struct cs42l51_private *cs42l51 = snd_soc_codec_get_drvdata(codec);
  455. struct snd_soc_dapm_context *dapm = &codec->dapm;
  456. int ret, reg;
  457. codec->control_data = cs42l51->control_data;
  458. ret = cs42l51_fill_cache(codec);
  459. if (ret < 0) {
  460. dev_err(codec->dev, "failed to fill register cache\n");
  461. return ret;
  462. }
  463. ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs42l51->control_type);
  464. if (ret < 0) {
  465. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  466. return ret;
  467. }
  468. /*
  469. * DAC configuration
  470. * - Use signal processor
  471. * - auto mute
  472. * - vol changes immediate
  473. * - no de-emphasize
  474. */
  475. reg = CS42L51_DAC_CTL_DATA_SEL(1)
  476. | CS42L51_DAC_CTL_AMUTE | CS42L51_DAC_CTL_DACSZ(0);
  477. ret = snd_soc_write(codec, CS42L51_DAC_CTL, reg);
  478. if (ret < 0)
  479. return ret;
  480. snd_soc_add_controls(codec, cs42l51_snd_controls,
  481. ARRAY_SIZE(cs42l51_snd_controls));
  482. snd_soc_dapm_new_controls(dapm, cs42l51_dapm_widgets,
  483. ARRAY_SIZE(cs42l51_dapm_widgets));
  484. snd_soc_dapm_add_routes(dapm, cs42l51_routes,
  485. ARRAY_SIZE(cs42l51_routes));
  486. return 0;
  487. }
  488. static struct snd_soc_codec_driver soc_codec_device_cs42l51 = {
  489. .probe = cs42l51_probe,
  490. .reg_cache_size = CS42L51_NUMREGS,
  491. .reg_word_size = sizeof(u8),
  492. };
  493. static int cs42l51_i2c_probe(struct i2c_client *i2c_client,
  494. const struct i2c_device_id *id)
  495. {
  496. struct cs42l51_private *cs42l51;
  497. int ret;
  498. /* Verify that we have a CS42L51 */
  499. ret = i2c_smbus_read_byte_data(i2c_client, CS42L51_CHIP_REV_ID);
  500. if (ret < 0) {
  501. dev_err(&i2c_client->dev, "failed to read I2C\n");
  502. goto error;
  503. }
  504. if ((ret != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
  505. (ret != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B))) {
  506. dev_err(&i2c_client->dev, "Invalid chip id\n");
  507. ret = -ENODEV;
  508. goto error;
  509. }
  510. dev_info(&i2c_client->dev, "found device cs42l51 rev %d\n",
  511. ret & 7);
  512. cs42l51 = kzalloc(sizeof(struct cs42l51_private), GFP_KERNEL);
  513. if (!cs42l51) {
  514. dev_err(&i2c_client->dev, "could not allocate codec\n");
  515. return -ENOMEM;
  516. }
  517. i2c_set_clientdata(i2c_client, cs42l51);
  518. cs42l51->control_data = i2c_client;
  519. cs42l51->control_type = SND_SOC_I2C;
  520. ret = snd_soc_register_codec(&i2c_client->dev,
  521. &soc_codec_device_cs42l51, &cs42l51_dai, 1);
  522. if (ret < 0)
  523. kfree(cs42l51);
  524. error:
  525. return ret;
  526. }
  527. static int cs42l51_i2c_remove(struct i2c_client *client)
  528. {
  529. struct cs42l51_private *cs42l51 = i2c_get_clientdata(client);
  530. snd_soc_unregister_codec(&client->dev);
  531. kfree(cs42l51);
  532. return 0;
  533. }
  534. static const struct i2c_device_id cs42l51_id[] = {
  535. {"cs42l51", 0},
  536. {}
  537. };
  538. MODULE_DEVICE_TABLE(i2c, cs42l51_id);
  539. static struct i2c_driver cs42l51_i2c_driver = {
  540. .driver = {
  541. .name = "cs42l51-codec",
  542. .owner = THIS_MODULE,
  543. },
  544. .id_table = cs42l51_id,
  545. .probe = cs42l51_i2c_probe,
  546. .remove = cs42l51_i2c_remove,
  547. };
  548. static int __init cs42l51_init(void)
  549. {
  550. int ret;
  551. ret = i2c_add_driver(&cs42l51_i2c_driver);
  552. if (ret != 0) {
  553. printk(KERN_ERR "%s: can't add i2c driver\n", __func__);
  554. return ret;
  555. }
  556. return 0;
  557. }
  558. module_init(cs42l51_init);
  559. static void __exit cs42l51_exit(void)
  560. {
  561. i2c_del_driver(&cs42l51_i2c_driver);
  562. }
  563. module_exit(cs42l51_exit);
  564. MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");
  565. MODULE_DESCRIPTION("Cirrus Logic CS42L51 ALSA SoC Codec Driver");
  566. MODULE_LICENSE("GPL");