oxygen_io.c 7.5 KB

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  1. /*
  2. * C-Media CMI8788 driver - helper functions
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <sound/core.h>
  22. #include <sound/mpu401.h>
  23. #include <asm/io.h>
  24. #include "oxygen.h"
  25. u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
  26. {
  27. return inb(chip->addr + reg);
  28. }
  29. EXPORT_SYMBOL(oxygen_read8);
  30. u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
  31. {
  32. return inw(chip->addr + reg);
  33. }
  34. EXPORT_SYMBOL(oxygen_read16);
  35. u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
  36. {
  37. return inl(chip->addr + reg);
  38. }
  39. EXPORT_SYMBOL(oxygen_read32);
  40. void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
  41. {
  42. outb(value, chip->addr + reg);
  43. chip->saved_registers._8[reg] = value;
  44. }
  45. EXPORT_SYMBOL(oxygen_write8);
  46. void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
  47. {
  48. outw(value, chip->addr + reg);
  49. chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
  50. }
  51. EXPORT_SYMBOL(oxygen_write16);
  52. void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
  53. {
  54. outl(value, chip->addr + reg);
  55. chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
  56. }
  57. EXPORT_SYMBOL(oxygen_write32);
  58. void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
  59. u8 value, u8 mask)
  60. {
  61. u8 tmp = inb(chip->addr + reg);
  62. tmp &= ~mask;
  63. tmp |= value & mask;
  64. outb(tmp, chip->addr + reg);
  65. chip->saved_registers._8[reg] = tmp;
  66. }
  67. EXPORT_SYMBOL(oxygen_write8_masked);
  68. void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
  69. u16 value, u16 mask)
  70. {
  71. u16 tmp = inw(chip->addr + reg);
  72. tmp &= ~mask;
  73. tmp |= value & mask;
  74. outw(tmp, chip->addr + reg);
  75. chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
  76. }
  77. EXPORT_SYMBOL(oxygen_write16_masked);
  78. void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
  79. u32 value, u32 mask)
  80. {
  81. u32 tmp = inl(chip->addr + reg);
  82. tmp &= ~mask;
  83. tmp |= value & mask;
  84. outl(tmp, chip->addr + reg);
  85. chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
  86. }
  87. EXPORT_SYMBOL(oxygen_write32_masked);
  88. static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
  89. {
  90. u8 status = 0;
  91. /*
  92. * Reading the status register also clears the bits, so we have to save
  93. * the read bits in status.
  94. */
  95. wait_event_timeout(chip->ac97_waitqueue,
  96. ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
  97. status & mask; }),
  98. msecs_to_jiffies(1) + 1);
  99. /*
  100. * Check even after a timeout because this function should not require
  101. * the AC'97 interrupt to be enabled.
  102. */
  103. status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
  104. return status & mask ? 0 : -EIO;
  105. }
  106. /*
  107. * About 10% of AC'97 register reads or writes fail to complete, but even those
  108. * where the controller indicates completion aren't guaranteed to have actually
  109. * happened.
  110. *
  111. * It's hard to assign blame to either the controller or the codec because both
  112. * were made by C-Media ...
  113. */
  114. void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
  115. unsigned int index, u16 data)
  116. {
  117. unsigned int count, succeeded;
  118. u32 reg;
  119. reg = data;
  120. reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
  121. reg |= OXYGEN_AC97_REG_DIR_WRITE;
  122. reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
  123. succeeded = 0;
  124. for (count = 5; count > 0; --count) {
  125. udelay(5);
  126. oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
  127. /* require two "completed" writes, just to be sure */
  128. if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
  129. ++succeeded >= 2) {
  130. chip->saved_ac97_registers[codec][index / 2] = data;
  131. return;
  132. }
  133. }
  134. snd_printk(KERN_ERR "AC'97 write timeout\n");
  135. }
  136. EXPORT_SYMBOL(oxygen_write_ac97);
  137. u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
  138. unsigned int index)
  139. {
  140. unsigned int count;
  141. unsigned int last_read = UINT_MAX;
  142. u32 reg;
  143. reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
  144. reg |= OXYGEN_AC97_REG_DIR_READ;
  145. reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
  146. for (count = 5; count > 0; --count) {
  147. udelay(5);
  148. oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
  149. udelay(10);
  150. if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) {
  151. u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
  152. /* we require two consecutive reads of the same value */
  153. if (value == last_read)
  154. return value;
  155. last_read = value;
  156. /*
  157. * Invert the register value bits to make sure that two
  158. * consecutive unsuccessful reads do not return the same
  159. * value.
  160. */
  161. reg ^= 0xffff;
  162. }
  163. }
  164. snd_printk(KERN_ERR "AC'97 read timeout on codec %u\n", codec);
  165. return 0;
  166. }
  167. EXPORT_SYMBOL(oxygen_read_ac97);
  168. void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
  169. unsigned int index, u16 data, u16 mask)
  170. {
  171. u16 value = oxygen_read_ac97(chip, codec, index);
  172. value &= ~mask;
  173. value |= data & mask;
  174. oxygen_write_ac97(chip, codec, index, value);
  175. }
  176. EXPORT_SYMBOL(oxygen_write_ac97_masked);
  177. void oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
  178. {
  179. unsigned int count;
  180. /* should not need more than 30.72 us (24 * 1.28 us) */
  181. count = 10;
  182. while ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) & OXYGEN_SPI_BUSY)
  183. && count > 0) {
  184. udelay(4);
  185. --count;
  186. }
  187. oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
  188. oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
  189. if (control & OXYGEN_SPI_DATA_LENGTH_3)
  190. oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
  191. oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
  192. }
  193. EXPORT_SYMBOL(oxygen_write_spi);
  194. void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data)
  195. {
  196. /* should not need more than about 300 us */
  197. msleep(1);
  198. oxygen_write8(chip, OXYGEN_2WIRE_MAP, map);
  199. oxygen_write8(chip, OXYGEN_2WIRE_DATA, data);
  200. oxygen_write8(chip, OXYGEN_2WIRE_CONTROL,
  201. device | OXYGEN_2WIRE_DIR_WRITE);
  202. }
  203. EXPORT_SYMBOL(oxygen_write_i2c);
  204. static void _write_uart(struct oxygen *chip, unsigned int port, u8 data)
  205. {
  206. if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL)
  207. msleep(1);
  208. oxygen_write8(chip, OXYGEN_MPU401 + port, data);
  209. }
  210. void oxygen_reset_uart(struct oxygen *chip)
  211. {
  212. _write_uart(chip, 1, MPU401_RESET);
  213. msleep(1); /* wait for ACK */
  214. _write_uart(chip, 1, MPU401_ENTER_UART);
  215. }
  216. EXPORT_SYMBOL(oxygen_reset_uart);
  217. void oxygen_write_uart(struct oxygen *chip, u8 data)
  218. {
  219. _write_uart(chip, 0, data);
  220. }
  221. EXPORT_SYMBOL(oxygen_write_uart);
  222. u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index)
  223. {
  224. unsigned int timeout;
  225. oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
  226. index | OXYGEN_EEPROM_DIR_READ);
  227. for (timeout = 0; timeout < 100; ++timeout) {
  228. udelay(1);
  229. if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
  230. & OXYGEN_EEPROM_BUSY))
  231. break;
  232. }
  233. return oxygen_read16(chip, OXYGEN_EEPROM_DATA);
  234. }
  235. void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value)
  236. {
  237. unsigned int timeout;
  238. oxygen_write16(chip, OXYGEN_EEPROM_DATA, value);
  239. oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
  240. index | OXYGEN_EEPROM_DIR_WRITE);
  241. for (timeout = 0; timeout < 10; ++timeout) {
  242. msleep(1);
  243. if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
  244. & OXYGEN_EEPROM_BUSY))
  245. return;
  246. }
  247. snd_printk(KERN_ERR "EEPROM write timeout\n");
  248. }