oxygen.c 23 KB

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  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and similar models
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * CMI8788:
  21. *
  22. * SPI 0 -> 1st AK4396 (front)
  23. * SPI 1 -> 2nd AK4396 (surround)
  24. * SPI 2 -> 3rd AK4396 (center/LFE)
  25. * SPI 3 -> WM8785
  26. * SPI 4 -> 4th AK4396 (back)
  27. *
  28. * GPIO 0 -> DFS0 of AK5385
  29. * GPIO 1 -> DFS1 of AK5385
  30. *
  31. * X-Meridian models:
  32. * GPIO 4 -> enable extension S/PDIF input
  33. * GPIO 6 -> enable on-board S/PDIF input
  34. *
  35. * Claro models:
  36. * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
  37. * GPIO 8 -> enable headphone amplifier
  38. *
  39. * CM9780:
  40. *
  41. * LINE_OUT -> input of ADC
  42. *
  43. * AUX_IN <- aux
  44. * CD_IN <- CD
  45. * MIC_IN <- mic
  46. *
  47. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  48. */
  49. #include <linux/delay.h>
  50. #include <linux/mutex.h>
  51. #include <linux/pci.h>
  52. #include <sound/ac97_codec.h>
  53. #include <sound/control.h>
  54. #include <sound/core.h>
  55. #include <sound/info.h>
  56. #include <sound/initval.h>
  57. #include <sound/pcm.h>
  58. #include <sound/pcm_params.h>
  59. #include <sound/tlv.h>
  60. #include "oxygen.h"
  61. #include "xonar_dg.h"
  62. #include "ak4396.h"
  63. #include "wm8785.h"
  64. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  65. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  66. MODULE_LICENSE("GPL v2");
  67. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
  68. ",{C-Media,CMI8787}"
  69. ",{C-Media,CMI8788}}");
  70. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  71. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  72. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  73. module_param_array(index, int, NULL, 0444);
  74. MODULE_PARM_DESC(index, "card index");
  75. module_param_array(id, charp, NULL, 0444);
  76. MODULE_PARM_DESC(id, "ID string");
  77. module_param_array(enable, bool, NULL, 0444);
  78. MODULE_PARM_DESC(enable, "enable card");
  79. enum {
  80. MODEL_CMEDIA_REF,
  81. MODEL_MERIDIAN,
  82. MODEL_MERIDIAN_2G,
  83. MODEL_CLARO,
  84. MODEL_CLARO_HALO,
  85. MODEL_FANTASIA,
  86. MODEL_SERENADE,
  87. MODEL_2CH_OUTPUT,
  88. MODEL_HG2PCI,
  89. MODEL_XONAR_DG,
  90. };
  91. static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
  92. /* C-Media's reference design */
  93. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  94. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  95. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  96. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  97. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  98. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  99. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  100. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  101. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  102. /* Asus Xonar DG */
  103. { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
  104. /* PCI 2.0 HD Audio */
  105. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  106. /* Kuroutoshikou CMI8787-HG2PCI */
  107. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
  108. /* TempoTec HiFier Fantasia */
  109. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  110. /* TempoTec HiFier Serenade */
  111. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
  112. /* AuzenTech X-Meridian */
  113. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  114. /* AuzenTech X-Meridian 2G */
  115. { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
  116. /* HT-Omega Claro */
  117. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  118. /* HT-Omega Claro halo */
  119. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  120. { }
  121. };
  122. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  123. #define GPIO_AK5385_DFS_MASK 0x0003
  124. #define GPIO_AK5385_DFS_NORMAL 0x0000
  125. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  126. #define GPIO_AK5385_DFS_QUAD 0x0002
  127. #define GPIO_MERIDIAN_DIG_MASK 0x0050
  128. #define GPIO_MERIDIAN_DIG_EXT 0x0010
  129. #define GPIO_MERIDIAN_DIG_BOARD 0x0040
  130. #define GPIO_CLARO_DIG_COAX 0x0040
  131. #define GPIO_CLARO_HP 0x0100
  132. struct generic_data {
  133. unsigned int dacs;
  134. u8 ak4396_regs[4][5];
  135. u16 wm8785_regs[3];
  136. };
  137. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  138. u8 reg, u8 value)
  139. {
  140. /* maps ALSA channel pair number to SPI output */
  141. static const u8 codec_spi_map[4] = {
  142. 0, 1, 2, 4
  143. };
  144. struct generic_data *data = chip->model_data;
  145. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  146. OXYGEN_SPI_DATA_LENGTH_2 |
  147. OXYGEN_SPI_CLOCK_160 |
  148. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  149. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  150. AK4396_WRITE | (reg << 8) | value);
  151. data->ak4396_regs[codec][reg] = value;
  152. }
  153. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  154. u8 reg, u8 value)
  155. {
  156. struct generic_data *data = chip->model_data;
  157. if (value != data->ak4396_regs[codec][reg])
  158. ak4396_write(chip, codec, reg, value);
  159. }
  160. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  161. {
  162. struct generic_data *data = chip->model_data;
  163. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  164. OXYGEN_SPI_DATA_LENGTH_2 |
  165. OXYGEN_SPI_CLOCK_160 |
  166. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  167. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  168. (reg << 9) | value);
  169. if (reg < ARRAY_SIZE(data->wm8785_regs))
  170. data->wm8785_regs[reg] = value;
  171. }
  172. static void ak4396_registers_init(struct oxygen *chip)
  173. {
  174. struct generic_data *data = chip->model_data;
  175. unsigned int i;
  176. for (i = 0; i < data->dacs; ++i) {
  177. ak4396_write(chip, i, AK4396_CONTROL_1,
  178. AK4396_DIF_24_MSB | AK4396_RSTN);
  179. ak4396_write(chip, i, AK4396_CONTROL_2,
  180. data->ak4396_regs[0][AK4396_CONTROL_2]);
  181. ak4396_write(chip, i, AK4396_CONTROL_3,
  182. AK4396_PCM);
  183. ak4396_write(chip, i, AK4396_LCH_ATT,
  184. chip->dac_volume[i * 2]);
  185. ak4396_write(chip, i, AK4396_RCH_ATT,
  186. chip->dac_volume[i * 2 + 1]);
  187. }
  188. }
  189. static void ak4396_init(struct oxygen *chip)
  190. {
  191. struct generic_data *data = chip->model_data;
  192. data->dacs = chip->model.dac_channels_pcm / 2;
  193. data->ak4396_regs[0][AK4396_CONTROL_2] =
  194. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  195. ak4396_registers_init(chip);
  196. snd_component_add(chip->card, "AK4396");
  197. }
  198. static void ak5385_init(struct oxygen *chip)
  199. {
  200. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  201. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  202. snd_component_add(chip->card, "AK5385");
  203. }
  204. static void wm8785_registers_init(struct oxygen *chip)
  205. {
  206. struct generic_data *data = chip->model_data;
  207. wm8785_write(chip, WM8785_R7, 0);
  208. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  209. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  210. }
  211. static void wm8785_init(struct oxygen *chip)
  212. {
  213. struct generic_data *data = chip->model_data;
  214. data->wm8785_regs[0] =
  215. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  216. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  217. wm8785_registers_init(chip);
  218. snd_component_add(chip->card, "WM8785");
  219. }
  220. static void generic_init(struct oxygen *chip)
  221. {
  222. ak4396_init(chip);
  223. wm8785_init(chip);
  224. }
  225. static void meridian_init(struct oxygen *chip)
  226. {
  227. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  228. GPIO_MERIDIAN_DIG_MASK);
  229. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  230. GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
  231. ak4396_init(chip);
  232. ak5385_init(chip);
  233. }
  234. static void claro_enable_hp(struct oxygen *chip)
  235. {
  236. msleep(300);
  237. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  238. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  239. }
  240. static void claro_init(struct oxygen *chip)
  241. {
  242. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  243. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  244. ak4396_init(chip);
  245. wm8785_init(chip);
  246. claro_enable_hp(chip);
  247. }
  248. static void claro_halo_init(struct oxygen *chip)
  249. {
  250. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  251. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  252. ak4396_init(chip);
  253. ak5385_init(chip);
  254. claro_enable_hp(chip);
  255. }
  256. static void fantasia_init(struct oxygen *chip)
  257. {
  258. ak4396_init(chip);
  259. snd_component_add(chip->card, "CS5340");
  260. }
  261. static void stereo_output_init(struct oxygen *chip)
  262. {
  263. ak4396_init(chip);
  264. }
  265. static void generic_cleanup(struct oxygen *chip)
  266. {
  267. }
  268. static void claro_disable_hp(struct oxygen *chip)
  269. {
  270. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  271. }
  272. static void claro_cleanup(struct oxygen *chip)
  273. {
  274. claro_disable_hp(chip);
  275. }
  276. static void claro_suspend(struct oxygen *chip)
  277. {
  278. claro_disable_hp(chip);
  279. }
  280. static void generic_resume(struct oxygen *chip)
  281. {
  282. ak4396_registers_init(chip);
  283. wm8785_registers_init(chip);
  284. }
  285. static void meridian_resume(struct oxygen *chip)
  286. {
  287. ak4396_registers_init(chip);
  288. }
  289. static void claro_resume(struct oxygen *chip)
  290. {
  291. ak4396_registers_init(chip);
  292. claro_enable_hp(chip);
  293. }
  294. static void stereo_resume(struct oxygen *chip)
  295. {
  296. ak4396_registers_init(chip);
  297. }
  298. static void set_ak4396_params(struct oxygen *chip,
  299. struct snd_pcm_hw_params *params)
  300. {
  301. struct generic_data *data = chip->model_data;
  302. unsigned int i;
  303. u8 value;
  304. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  305. if (params_rate(params) <= 54000)
  306. value |= AK4396_DFS_NORMAL;
  307. else if (params_rate(params) <= 108000)
  308. value |= AK4396_DFS_DOUBLE;
  309. else
  310. value |= AK4396_DFS_QUAD;
  311. msleep(1); /* wait for the new MCLK to become stable */
  312. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  313. for (i = 0; i < data->dacs; ++i) {
  314. ak4396_write(chip, i, AK4396_CONTROL_1,
  315. AK4396_DIF_24_MSB);
  316. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  317. ak4396_write(chip, i, AK4396_CONTROL_1,
  318. AK4396_DIF_24_MSB | AK4396_RSTN);
  319. }
  320. }
  321. }
  322. static void update_ak4396_volume(struct oxygen *chip)
  323. {
  324. struct generic_data *data = chip->model_data;
  325. unsigned int i;
  326. for (i = 0; i < data->dacs; ++i) {
  327. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  328. chip->dac_volume[i * 2]);
  329. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  330. chip->dac_volume[i * 2 + 1]);
  331. }
  332. }
  333. static void update_ak4396_mute(struct oxygen *chip)
  334. {
  335. struct generic_data *data = chip->model_data;
  336. unsigned int i;
  337. u8 value;
  338. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  339. if (chip->dac_mute)
  340. value |= AK4396_SMUTE;
  341. for (i = 0; i < data->dacs; ++i)
  342. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  343. }
  344. static void set_wm8785_params(struct oxygen *chip,
  345. struct snd_pcm_hw_params *params)
  346. {
  347. struct generic_data *data = chip->model_data;
  348. unsigned int value;
  349. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  350. if (params_rate(params) <= 48000)
  351. value |= WM8785_OSR_SINGLE;
  352. else if (params_rate(params) <= 96000)
  353. value |= WM8785_OSR_DOUBLE;
  354. else
  355. value |= WM8785_OSR_QUAD;
  356. if (value != data->wm8785_regs[0]) {
  357. wm8785_write(chip, WM8785_R7, 0);
  358. wm8785_write(chip, WM8785_R0, value);
  359. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  360. }
  361. }
  362. static void set_ak5385_params(struct oxygen *chip,
  363. struct snd_pcm_hw_params *params)
  364. {
  365. unsigned int value;
  366. if (params_rate(params) <= 54000)
  367. value = GPIO_AK5385_DFS_NORMAL;
  368. else if (params_rate(params) <= 108000)
  369. value = GPIO_AK5385_DFS_DOUBLE;
  370. else
  371. value = GPIO_AK5385_DFS_QUAD;
  372. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  373. value, GPIO_AK5385_DFS_MASK);
  374. }
  375. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  376. {
  377. }
  378. static int rolloff_info(struct snd_kcontrol *ctl,
  379. struct snd_ctl_elem_info *info)
  380. {
  381. static const char *const names[2] = {
  382. "Sharp Roll-off", "Slow Roll-off"
  383. };
  384. return snd_ctl_enum_info(info, 1, 2, names);
  385. }
  386. static int rolloff_get(struct snd_kcontrol *ctl,
  387. struct snd_ctl_elem_value *value)
  388. {
  389. struct oxygen *chip = ctl->private_data;
  390. struct generic_data *data = chip->model_data;
  391. value->value.enumerated.item[0] =
  392. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  393. return 0;
  394. }
  395. static int rolloff_put(struct snd_kcontrol *ctl,
  396. struct snd_ctl_elem_value *value)
  397. {
  398. struct oxygen *chip = ctl->private_data;
  399. struct generic_data *data = chip->model_data;
  400. unsigned int i;
  401. int changed;
  402. u8 reg;
  403. mutex_lock(&chip->mutex);
  404. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  405. if (value->value.enumerated.item[0])
  406. reg |= AK4396_SLOW;
  407. else
  408. reg &= ~AK4396_SLOW;
  409. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  410. if (changed) {
  411. for (i = 0; i < data->dacs; ++i)
  412. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  413. }
  414. mutex_unlock(&chip->mutex);
  415. return changed;
  416. }
  417. static const struct snd_kcontrol_new rolloff_control = {
  418. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  419. .name = "DAC Filter Playback Enum",
  420. .info = rolloff_info,
  421. .get = rolloff_get,
  422. .put = rolloff_put,
  423. };
  424. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  425. {
  426. static const char *const names[2] = {
  427. "None", "High-pass Filter"
  428. };
  429. return snd_ctl_enum_info(info, 1, 2, names);
  430. }
  431. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  432. {
  433. struct oxygen *chip = ctl->private_data;
  434. struct generic_data *data = chip->model_data;
  435. value->value.enumerated.item[0] =
  436. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  437. return 0;
  438. }
  439. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  440. {
  441. struct oxygen *chip = ctl->private_data;
  442. struct generic_data *data = chip->model_data;
  443. unsigned int reg;
  444. int changed;
  445. mutex_lock(&chip->mutex);
  446. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  447. if (value->value.enumerated.item[0])
  448. reg |= WM8785_HPFR | WM8785_HPFL;
  449. changed = reg != data->wm8785_regs[WM8785_R2];
  450. if (changed)
  451. wm8785_write(chip, WM8785_R2, reg);
  452. mutex_unlock(&chip->mutex);
  453. return changed;
  454. }
  455. static const struct snd_kcontrol_new hpf_control = {
  456. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  457. .name = "ADC Filter Capture Enum",
  458. .info = hpf_info,
  459. .get = hpf_get,
  460. .put = hpf_put,
  461. };
  462. static int meridian_dig_source_info(struct snd_kcontrol *ctl,
  463. struct snd_ctl_elem_info *info)
  464. {
  465. static const char *const names[2] = { "On-board", "Extension" };
  466. return snd_ctl_enum_info(info, 1, 2, names);
  467. }
  468. static int claro_dig_source_info(struct snd_kcontrol *ctl,
  469. struct snd_ctl_elem_info *info)
  470. {
  471. static const char *const names[2] = { "Optical", "Coaxial" };
  472. return snd_ctl_enum_info(info, 1, 2, names);
  473. }
  474. static int meridian_dig_source_get(struct snd_kcontrol *ctl,
  475. struct snd_ctl_elem_value *value)
  476. {
  477. struct oxygen *chip = ctl->private_data;
  478. value->value.enumerated.item[0] =
  479. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  480. GPIO_MERIDIAN_DIG_EXT);
  481. return 0;
  482. }
  483. static int claro_dig_source_get(struct snd_kcontrol *ctl,
  484. struct snd_ctl_elem_value *value)
  485. {
  486. struct oxygen *chip = ctl->private_data;
  487. value->value.enumerated.item[0] =
  488. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  489. GPIO_CLARO_DIG_COAX);
  490. return 0;
  491. }
  492. static int meridian_dig_source_put(struct snd_kcontrol *ctl,
  493. struct snd_ctl_elem_value *value)
  494. {
  495. struct oxygen *chip = ctl->private_data;
  496. u16 old_reg, new_reg;
  497. int changed;
  498. mutex_lock(&chip->mutex);
  499. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  500. new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
  501. if (value->value.enumerated.item[0] == 0)
  502. new_reg |= GPIO_MERIDIAN_DIG_BOARD;
  503. else
  504. new_reg |= GPIO_MERIDIAN_DIG_EXT;
  505. changed = new_reg != old_reg;
  506. if (changed)
  507. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  508. mutex_unlock(&chip->mutex);
  509. return changed;
  510. }
  511. static int claro_dig_source_put(struct snd_kcontrol *ctl,
  512. struct snd_ctl_elem_value *value)
  513. {
  514. struct oxygen *chip = ctl->private_data;
  515. u16 old_reg, new_reg;
  516. int changed;
  517. mutex_lock(&chip->mutex);
  518. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  519. new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
  520. if (value->value.enumerated.item[0])
  521. new_reg |= GPIO_CLARO_DIG_COAX;
  522. changed = new_reg != old_reg;
  523. if (changed)
  524. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  525. mutex_unlock(&chip->mutex);
  526. return changed;
  527. }
  528. static const struct snd_kcontrol_new meridian_dig_source_control = {
  529. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  530. .name = "IEC958 Source Capture Enum",
  531. .info = meridian_dig_source_info,
  532. .get = meridian_dig_source_get,
  533. .put = meridian_dig_source_put,
  534. };
  535. static const struct snd_kcontrol_new claro_dig_source_control = {
  536. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  537. .name = "IEC958 Source Capture Enum",
  538. .info = claro_dig_source_info,
  539. .get = claro_dig_source_get,
  540. .put = claro_dig_source_put,
  541. };
  542. static int generic_mixer_init(struct oxygen *chip)
  543. {
  544. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  545. }
  546. static int generic_wm8785_mixer_init(struct oxygen *chip)
  547. {
  548. int err;
  549. err = generic_mixer_init(chip);
  550. if (err < 0)
  551. return err;
  552. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  553. if (err < 0)
  554. return err;
  555. return 0;
  556. }
  557. static int meridian_mixer_init(struct oxygen *chip)
  558. {
  559. int err;
  560. err = generic_mixer_init(chip);
  561. if (err < 0)
  562. return err;
  563. err = snd_ctl_add(chip->card,
  564. snd_ctl_new1(&meridian_dig_source_control, chip));
  565. if (err < 0)
  566. return err;
  567. return 0;
  568. }
  569. static int claro_mixer_init(struct oxygen *chip)
  570. {
  571. int err;
  572. err = generic_wm8785_mixer_init(chip);
  573. if (err < 0)
  574. return err;
  575. err = snd_ctl_add(chip->card,
  576. snd_ctl_new1(&claro_dig_source_control, chip));
  577. if (err < 0)
  578. return err;
  579. return 0;
  580. }
  581. static int claro_halo_mixer_init(struct oxygen *chip)
  582. {
  583. int err;
  584. err = generic_mixer_init(chip);
  585. if (err < 0)
  586. return err;
  587. err = snd_ctl_add(chip->card,
  588. snd_ctl_new1(&claro_dig_source_control, chip));
  589. if (err < 0)
  590. return err;
  591. return 0;
  592. }
  593. static void dump_ak4396_registers(struct oxygen *chip,
  594. struct snd_info_buffer *buffer)
  595. {
  596. struct generic_data *data = chip->model_data;
  597. unsigned int dac, i;
  598. for (dac = 0; dac < data->dacs; ++dac) {
  599. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  600. for (i = 0; i < 5; ++i)
  601. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  602. }
  603. snd_iprintf(buffer, "\n");
  604. }
  605. static void dump_wm8785_registers(struct oxygen *chip,
  606. struct snd_info_buffer *buffer)
  607. {
  608. struct generic_data *data = chip->model_data;
  609. unsigned int i;
  610. snd_iprintf(buffer, "\nWM8785:");
  611. for (i = 0; i < 3; ++i)
  612. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  613. snd_iprintf(buffer, "\n");
  614. }
  615. static void dump_oxygen_registers(struct oxygen *chip,
  616. struct snd_info_buffer *buffer)
  617. {
  618. dump_ak4396_registers(chip, buffer);
  619. dump_wm8785_registers(chip, buffer);
  620. }
  621. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  622. static const struct oxygen_model model_generic = {
  623. .shortname = "C-Media CMI8788",
  624. .longname = "C-Media Oxygen HD Audio",
  625. .chip = "CMI8788",
  626. .init = generic_init,
  627. .mixer_init = generic_wm8785_mixer_init,
  628. .cleanup = generic_cleanup,
  629. .resume = generic_resume,
  630. .set_dac_params = set_ak4396_params,
  631. .set_adc_params = set_wm8785_params,
  632. .update_dac_volume = update_ak4396_volume,
  633. .update_dac_mute = update_ak4396_mute,
  634. .dump_registers = dump_oxygen_registers,
  635. .dac_tlv = ak4396_db_scale,
  636. .model_data_size = sizeof(struct generic_data),
  637. .device_config = PLAYBACK_0_TO_I2S |
  638. PLAYBACK_1_TO_SPDIF |
  639. PLAYBACK_2_TO_AC97_1 |
  640. CAPTURE_0_FROM_I2S_1 |
  641. CAPTURE_1_FROM_SPDIF |
  642. CAPTURE_2_FROM_AC97_1 |
  643. AC97_CD_INPUT,
  644. .dac_channels_pcm = 8,
  645. .dac_channels_mixer = 8,
  646. .dac_volume_min = 0,
  647. .dac_volume_max = 255,
  648. .function_flags = OXYGEN_FUNCTION_SPI |
  649. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  650. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  651. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  652. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  653. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  654. };
  655. static int __devinit get_oxygen_model(struct oxygen *chip,
  656. const struct pci_device_id *id)
  657. {
  658. static const char *const names[] = {
  659. [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
  660. [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
  661. [MODEL_CLARO] = "HT-Omega Claro",
  662. [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
  663. [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
  664. [MODEL_SERENADE] = "TempoTec HiFier Serenade",
  665. [MODEL_HG2PCI] = "CMI8787-HG2PCI",
  666. };
  667. chip->model = model_generic;
  668. switch (id->driver_data) {
  669. case MODEL_MERIDIAN:
  670. case MODEL_MERIDIAN_2G:
  671. chip->model.init = meridian_init;
  672. chip->model.mixer_init = meridian_mixer_init;
  673. chip->model.resume = meridian_resume;
  674. chip->model.set_adc_params = set_ak5385_params;
  675. chip->model.dump_registers = dump_ak4396_registers;
  676. chip->model.device_config = PLAYBACK_0_TO_I2S |
  677. PLAYBACK_1_TO_SPDIF |
  678. CAPTURE_0_FROM_I2S_2 |
  679. CAPTURE_1_FROM_SPDIF;
  680. if (id->driver_data == MODEL_MERIDIAN)
  681. chip->model.device_config |= AC97_CD_INPUT;
  682. break;
  683. case MODEL_CLARO:
  684. chip->model.init = claro_init;
  685. chip->model.mixer_init = claro_mixer_init;
  686. chip->model.cleanup = claro_cleanup;
  687. chip->model.suspend = claro_suspend;
  688. chip->model.resume = claro_resume;
  689. break;
  690. case MODEL_CLARO_HALO:
  691. chip->model.init = claro_halo_init;
  692. chip->model.mixer_init = claro_halo_mixer_init;
  693. chip->model.cleanup = claro_cleanup;
  694. chip->model.suspend = claro_suspend;
  695. chip->model.resume = claro_resume;
  696. chip->model.set_adc_params = set_ak5385_params;
  697. chip->model.dump_registers = dump_ak4396_registers;
  698. chip->model.device_config = PLAYBACK_0_TO_I2S |
  699. PLAYBACK_1_TO_SPDIF |
  700. CAPTURE_0_FROM_I2S_2 |
  701. CAPTURE_1_FROM_SPDIF;
  702. break;
  703. case MODEL_FANTASIA:
  704. case MODEL_SERENADE:
  705. case MODEL_2CH_OUTPUT:
  706. case MODEL_HG2PCI:
  707. chip->model.shortname = "C-Media CMI8787";
  708. chip->model.chip = "CMI8787";
  709. if (id->driver_data == MODEL_FANTASIA)
  710. chip->model.init = fantasia_init;
  711. else
  712. chip->model.init = stereo_output_init;
  713. chip->model.resume = stereo_resume;
  714. chip->model.mixer_init = generic_mixer_init;
  715. chip->model.set_adc_params = set_no_params;
  716. chip->model.dump_registers = dump_ak4396_registers;
  717. chip->model.device_config = PLAYBACK_0_TO_I2S |
  718. PLAYBACK_1_TO_SPDIF;
  719. if (id->driver_data == MODEL_FANTASIA) {
  720. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  721. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  722. }
  723. chip->model.dac_channels_pcm = 2;
  724. chip->model.dac_channels_mixer = 2;
  725. break;
  726. case MODEL_XONAR_DG:
  727. chip->model = model_xonar_dg;
  728. break;
  729. }
  730. if (id->driver_data == MODEL_MERIDIAN ||
  731. id->driver_data == MODEL_MERIDIAN_2G ||
  732. id->driver_data == MODEL_CLARO_HALO) {
  733. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  734. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  735. }
  736. if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
  737. chip->model.shortname = names[id->driver_data];
  738. return 0;
  739. }
  740. static int __devinit generic_oxygen_probe(struct pci_dev *pci,
  741. const struct pci_device_id *pci_id)
  742. {
  743. static int dev;
  744. int err;
  745. if (dev >= SNDRV_CARDS)
  746. return -ENODEV;
  747. if (!enable[dev]) {
  748. ++dev;
  749. return -ENOENT;
  750. }
  751. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  752. oxygen_ids, get_oxygen_model);
  753. if (err >= 0)
  754. ++dev;
  755. return err;
  756. }
  757. static struct pci_driver oxygen_driver = {
  758. .name = "CMI8788",
  759. .id_table = oxygen_ids,
  760. .probe = generic_oxygen_probe,
  761. .remove = __devexit_p(oxygen_pci_remove),
  762. #ifdef CONFIG_PM
  763. .suspend = oxygen_pci_suspend,
  764. .resume = oxygen_pci_resume,
  765. #endif
  766. };
  767. static int __init alsa_card_oxygen_init(void)
  768. {
  769. return pci_register_driver(&oxygen_driver);
  770. }
  771. static void __exit alsa_card_oxygen_exit(void)
  772. {
  773. pci_unregister_driver(&oxygen_driver);
  774. }
  775. module_init(alsa_card_oxygen_init)
  776. module_exit(alsa_card_oxygen_exit)