io.c 16 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for control of EMU10K1 chips
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/time.h>
  28. #include <sound/core.h>
  29. #include <sound/emu10k1.h>
  30. #include <linux/delay.h>
  31. #include "p17v.h"
  32. unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
  33. {
  34. unsigned long flags;
  35. unsigned int regptr, val;
  36. unsigned int mask;
  37. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  38. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  39. if (reg & 0xff000000) {
  40. unsigned char size, offset;
  41. size = (reg >> 24) & 0x3f;
  42. offset = (reg >> 16) & 0x1f;
  43. mask = ((1 << size) - 1) << offset;
  44. spin_lock_irqsave(&emu->emu_lock, flags);
  45. outl(regptr, emu->port + PTR);
  46. val = inl(emu->port + DATA);
  47. spin_unlock_irqrestore(&emu->emu_lock, flags);
  48. return (val & mask) >> offset;
  49. } else {
  50. spin_lock_irqsave(&emu->emu_lock, flags);
  51. outl(regptr, emu->port + PTR);
  52. val = inl(emu->port + DATA);
  53. spin_unlock_irqrestore(&emu->emu_lock, flags);
  54. return val;
  55. }
  56. }
  57. EXPORT_SYMBOL(snd_emu10k1_ptr_read);
  58. void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
  59. {
  60. unsigned int regptr;
  61. unsigned long flags;
  62. unsigned int mask;
  63. if (!emu) {
  64. snd_printk(KERN_ERR "ptr_write: emu is null!\n");
  65. dump_stack();
  66. return;
  67. }
  68. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  69. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  70. if (reg & 0xff000000) {
  71. unsigned char size, offset;
  72. size = (reg >> 24) & 0x3f;
  73. offset = (reg >> 16) & 0x1f;
  74. mask = ((1 << size) - 1) << offset;
  75. data = (data << offset) & mask;
  76. spin_lock_irqsave(&emu->emu_lock, flags);
  77. outl(regptr, emu->port + PTR);
  78. data |= inl(emu->port + DATA) & ~mask;
  79. outl(data, emu->port + DATA);
  80. spin_unlock_irqrestore(&emu->emu_lock, flags);
  81. } else {
  82. spin_lock_irqsave(&emu->emu_lock, flags);
  83. outl(regptr, emu->port + PTR);
  84. outl(data, emu->port + DATA);
  85. spin_unlock_irqrestore(&emu->emu_lock, flags);
  86. }
  87. }
  88. EXPORT_SYMBOL(snd_emu10k1_ptr_write);
  89. unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
  90. unsigned int reg,
  91. unsigned int chn)
  92. {
  93. unsigned long flags;
  94. unsigned int regptr, val;
  95. regptr = (reg << 16) | chn;
  96. spin_lock_irqsave(&emu->emu_lock, flags);
  97. outl(regptr, emu->port + 0x20 + PTR);
  98. val = inl(emu->port + 0x20 + DATA);
  99. spin_unlock_irqrestore(&emu->emu_lock, flags);
  100. return val;
  101. }
  102. void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
  103. unsigned int reg,
  104. unsigned int chn,
  105. unsigned int data)
  106. {
  107. unsigned int regptr;
  108. unsigned long flags;
  109. regptr = (reg << 16) | chn;
  110. spin_lock_irqsave(&emu->emu_lock, flags);
  111. outl(regptr, emu->port + 0x20 + PTR);
  112. outl(data, emu->port + 0x20 + DATA);
  113. spin_unlock_irqrestore(&emu->emu_lock, flags);
  114. }
  115. int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
  116. unsigned int data)
  117. {
  118. unsigned int reset, set;
  119. unsigned int reg, tmp;
  120. int n, result;
  121. int err = 0;
  122. /* This function is not re-entrant, so protect against it. */
  123. spin_lock(&emu->spi_lock);
  124. if (emu->card_capabilities->ca0108_chip)
  125. reg = 0x3c; /* PTR20, reg 0x3c */
  126. else {
  127. /* For other chip types the SPI register
  128. * is currently unknown. */
  129. err = 1;
  130. goto spi_write_exit;
  131. }
  132. if (data > 0xffff) {
  133. /* Only 16bit values allowed */
  134. err = 1;
  135. goto spi_write_exit;
  136. }
  137. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  138. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  139. set = reset | 0x10000; /* Set xxx1xxxx */
  140. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  141. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
  142. snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
  143. result = 1;
  144. /* Wait for status bit to return to 0 */
  145. for (n = 0; n < 100; n++) {
  146. udelay(10);
  147. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  148. if (!(tmp & 0x10000)) {
  149. result = 0;
  150. break;
  151. }
  152. }
  153. if (result) {
  154. /* Timed out */
  155. err = 1;
  156. goto spi_write_exit;
  157. }
  158. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  159. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
  160. err = 0;
  161. spi_write_exit:
  162. spin_unlock(&emu->spi_lock);
  163. return err;
  164. }
  165. /* The ADC does not support i2c read, so only write is implemented */
  166. int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
  167. u32 reg,
  168. u32 value)
  169. {
  170. u32 tmp;
  171. int timeout = 0;
  172. int status;
  173. int retry;
  174. int err = 0;
  175. if ((reg > 0x7f) || (value > 0x1ff)) {
  176. snd_printk(KERN_ERR "i2c_write: invalid values.\n");
  177. return -EINVAL;
  178. }
  179. /* This function is not re-entrant, so protect against it. */
  180. spin_lock(&emu->i2c_lock);
  181. tmp = reg << 25 | value << 16;
  182. /* This controls the I2C connected to the WM8775 ADC Codec */
  183. snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
  184. tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
  185. for (retry = 0; retry < 10; retry++) {
  186. /* Send the data to i2c */
  187. tmp = 0;
  188. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  189. snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
  190. /* Wait till the transaction ends */
  191. while (1) {
  192. mdelay(1);
  193. status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
  194. timeout++;
  195. if ((status & I2C_A_ADC_START) == 0)
  196. break;
  197. if (timeout > 1000) {
  198. snd_printk(KERN_WARNING
  199. "emu10k1:I2C:timeout status=0x%x\n",
  200. status);
  201. break;
  202. }
  203. }
  204. //Read back and see if the transaction is successful
  205. if ((status & I2C_A_ADC_ABORT) == 0)
  206. break;
  207. }
  208. if (retry == 10) {
  209. snd_printk(KERN_ERR "Writing to ADC failed!\n");
  210. snd_printk(KERN_ERR "status=0x%x, reg=%d, value=%d\n",
  211. status, reg, value);
  212. /* dump_stack(); */
  213. err = -EINVAL;
  214. }
  215. spin_unlock(&emu->i2c_lock);
  216. return err;
  217. }
  218. int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value)
  219. {
  220. unsigned long flags;
  221. if (reg > 0x3f)
  222. return 1;
  223. reg += 0x40; /* 0x40 upwards are registers. */
  224. if (value > 0x3f) /* 0 to 0x3f are values */
  225. return 1;
  226. spin_lock_irqsave(&emu->emu_lock, flags);
  227. outl(reg, emu->port + A_IOCFG);
  228. udelay(10);
  229. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  230. udelay(10);
  231. outl(value, emu->port + A_IOCFG);
  232. udelay(10);
  233. outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  234. spin_unlock_irqrestore(&emu->emu_lock, flags);
  235. return 0;
  236. }
  237. int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value)
  238. {
  239. unsigned long flags;
  240. if (reg > 0x3f)
  241. return 1;
  242. reg += 0x40; /* 0x40 upwards are registers. */
  243. spin_lock_irqsave(&emu->emu_lock, flags);
  244. outl(reg, emu->port + A_IOCFG);
  245. udelay(10);
  246. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  247. udelay(10);
  248. *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f);
  249. spin_unlock_irqrestore(&emu->emu_lock, flags);
  250. return 0;
  251. }
  252. /* Each Destination has one and only one Source,
  253. * but one Source can feed any number of Destinations simultaneously.
  254. */
  255. int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src)
  256. {
  257. snd_emu1010_fpga_write(emu, 0x00, ((dst >> 8) & 0x3f) );
  258. snd_emu1010_fpga_write(emu, 0x01, (dst & 0x3f) );
  259. snd_emu1010_fpga_write(emu, 0x02, ((src >> 8) & 0x3f) );
  260. snd_emu1010_fpga_write(emu, 0x03, (src & 0x3f) );
  261. return 0;
  262. }
  263. void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
  264. {
  265. unsigned long flags;
  266. unsigned int enable;
  267. spin_lock_irqsave(&emu->emu_lock, flags);
  268. enable = inl(emu->port + INTE) | intrenb;
  269. outl(enable, emu->port + INTE);
  270. spin_unlock_irqrestore(&emu->emu_lock, flags);
  271. }
  272. void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
  273. {
  274. unsigned long flags;
  275. unsigned int enable;
  276. spin_lock_irqsave(&emu->emu_lock, flags);
  277. enable = inl(emu->port + INTE) & ~intrenb;
  278. outl(enable, emu->port + INTE);
  279. spin_unlock_irqrestore(&emu->emu_lock, flags);
  280. }
  281. void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  282. {
  283. unsigned long flags;
  284. unsigned int val;
  285. spin_lock_irqsave(&emu->emu_lock, flags);
  286. /* voice interrupt */
  287. if (voicenum >= 32) {
  288. outl(CLIEH << 16, emu->port + PTR);
  289. val = inl(emu->port + DATA);
  290. val |= 1 << (voicenum - 32);
  291. } else {
  292. outl(CLIEL << 16, emu->port + PTR);
  293. val = inl(emu->port + DATA);
  294. val |= 1 << voicenum;
  295. }
  296. outl(val, emu->port + DATA);
  297. spin_unlock_irqrestore(&emu->emu_lock, flags);
  298. }
  299. void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  300. {
  301. unsigned long flags;
  302. unsigned int val;
  303. spin_lock_irqsave(&emu->emu_lock, flags);
  304. /* voice interrupt */
  305. if (voicenum >= 32) {
  306. outl(CLIEH << 16, emu->port + PTR);
  307. val = inl(emu->port + DATA);
  308. val &= ~(1 << (voicenum - 32));
  309. } else {
  310. outl(CLIEL << 16, emu->port + PTR);
  311. val = inl(emu->port + DATA);
  312. val &= ~(1 << voicenum);
  313. }
  314. outl(val, emu->port + DATA);
  315. spin_unlock_irqrestore(&emu->emu_lock, flags);
  316. }
  317. void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  318. {
  319. unsigned long flags;
  320. spin_lock_irqsave(&emu->emu_lock, flags);
  321. /* voice interrupt */
  322. if (voicenum >= 32) {
  323. outl(CLIPH << 16, emu->port + PTR);
  324. voicenum = 1 << (voicenum - 32);
  325. } else {
  326. outl(CLIPL << 16, emu->port + PTR);
  327. voicenum = 1 << voicenum;
  328. }
  329. outl(voicenum, emu->port + DATA);
  330. spin_unlock_irqrestore(&emu->emu_lock, flags);
  331. }
  332. void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  333. {
  334. unsigned long flags;
  335. unsigned int val;
  336. spin_lock_irqsave(&emu->emu_lock, flags);
  337. /* voice interrupt */
  338. if (voicenum >= 32) {
  339. outl(HLIEH << 16, emu->port + PTR);
  340. val = inl(emu->port + DATA);
  341. val |= 1 << (voicenum - 32);
  342. } else {
  343. outl(HLIEL << 16, emu->port + PTR);
  344. val = inl(emu->port + DATA);
  345. val |= 1 << voicenum;
  346. }
  347. outl(val, emu->port + DATA);
  348. spin_unlock_irqrestore(&emu->emu_lock, flags);
  349. }
  350. void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  351. {
  352. unsigned long flags;
  353. unsigned int val;
  354. spin_lock_irqsave(&emu->emu_lock, flags);
  355. /* voice interrupt */
  356. if (voicenum >= 32) {
  357. outl(HLIEH << 16, emu->port + PTR);
  358. val = inl(emu->port + DATA);
  359. val &= ~(1 << (voicenum - 32));
  360. } else {
  361. outl(HLIEL << 16, emu->port + PTR);
  362. val = inl(emu->port + DATA);
  363. val &= ~(1 << voicenum);
  364. }
  365. outl(val, emu->port + DATA);
  366. spin_unlock_irqrestore(&emu->emu_lock, flags);
  367. }
  368. void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  369. {
  370. unsigned long flags;
  371. spin_lock_irqsave(&emu->emu_lock, flags);
  372. /* voice interrupt */
  373. if (voicenum >= 32) {
  374. outl(HLIPH << 16, emu->port + PTR);
  375. voicenum = 1 << (voicenum - 32);
  376. } else {
  377. outl(HLIPL << 16, emu->port + PTR);
  378. voicenum = 1 << voicenum;
  379. }
  380. outl(voicenum, emu->port + DATA);
  381. spin_unlock_irqrestore(&emu->emu_lock, flags);
  382. }
  383. void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  384. {
  385. unsigned long flags;
  386. unsigned int sol;
  387. spin_lock_irqsave(&emu->emu_lock, flags);
  388. /* voice interrupt */
  389. if (voicenum >= 32) {
  390. outl(SOLEH << 16, emu->port + PTR);
  391. sol = inl(emu->port + DATA);
  392. sol |= 1 << (voicenum - 32);
  393. } else {
  394. outl(SOLEL << 16, emu->port + PTR);
  395. sol = inl(emu->port + DATA);
  396. sol |= 1 << voicenum;
  397. }
  398. outl(sol, emu->port + DATA);
  399. spin_unlock_irqrestore(&emu->emu_lock, flags);
  400. }
  401. void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  402. {
  403. unsigned long flags;
  404. unsigned int sol;
  405. spin_lock_irqsave(&emu->emu_lock, flags);
  406. /* voice interrupt */
  407. if (voicenum >= 32) {
  408. outl(SOLEH << 16, emu->port + PTR);
  409. sol = inl(emu->port + DATA);
  410. sol &= ~(1 << (voicenum - 32));
  411. } else {
  412. outl(SOLEL << 16, emu->port + PTR);
  413. sol = inl(emu->port + DATA);
  414. sol &= ~(1 << voicenum);
  415. }
  416. outl(sol, emu->port + DATA);
  417. spin_unlock_irqrestore(&emu->emu_lock, flags);
  418. }
  419. void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
  420. {
  421. volatile unsigned count;
  422. unsigned int newtime = 0, curtime;
  423. curtime = inl(emu->port + WC) >> 6;
  424. while (wait-- > 0) {
  425. count = 0;
  426. while (count++ < 16384) {
  427. newtime = inl(emu->port + WC) >> 6;
  428. if (newtime != curtime)
  429. break;
  430. }
  431. if (count > 16384)
  432. break;
  433. curtime = newtime;
  434. }
  435. }
  436. unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  437. {
  438. struct snd_emu10k1 *emu = ac97->private_data;
  439. unsigned long flags;
  440. unsigned short val;
  441. spin_lock_irqsave(&emu->emu_lock, flags);
  442. outb(reg, emu->port + AC97ADDRESS);
  443. val = inw(emu->port + AC97DATA);
  444. spin_unlock_irqrestore(&emu->emu_lock, flags);
  445. return val;
  446. }
  447. void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data)
  448. {
  449. struct snd_emu10k1 *emu = ac97->private_data;
  450. unsigned long flags;
  451. spin_lock_irqsave(&emu->emu_lock, flags);
  452. outb(reg, emu->port + AC97ADDRESS);
  453. outw(data, emu->port + AC97DATA);
  454. spin_unlock_irqrestore(&emu->emu_lock, flags);
  455. }
  456. /*
  457. * convert rate to pitch
  458. */
  459. unsigned int snd_emu10k1_rate_to_pitch(unsigned int rate)
  460. {
  461. static u32 logMagTable[128] = {
  462. 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
  463. 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
  464. 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
  465. 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
  466. 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
  467. 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
  468. 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
  469. 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
  470. 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
  471. 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
  472. 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
  473. 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
  474. 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
  475. 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
  476. 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
  477. 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
  478. };
  479. static char logSlopeTable[128] = {
  480. 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
  481. 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
  482. 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
  483. 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
  484. 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
  485. 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
  486. 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
  487. 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
  488. 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
  489. 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
  490. 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
  491. 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
  492. 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
  493. 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
  494. 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
  495. 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
  496. };
  497. int i;
  498. if (rate == 0)
  499. return 0; /* Bail out if no leading "1" */
  500. rate *= 11185; /* Scale 48000 to 0x20002380 */
  501. for (i = 31; i > 0; i--) {
  502. if (rate & 0x80000000) { /* Detect leading "1" */
  503. return (((unsigned int) (i - 15) << 20) +
  504. logMagTable[0x7f & (rate >> 24)] +
  505. (0x7f & (rate >> 17)) *
  506. logSlopeTable[0x7f & (rate >> 24)]);
  507. }
  508. rate <<= 1;
  509. }
  510. return 0; /* Should never reach this point */
  511. }