vx_core.c 20 KB

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  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * Hardware core part
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/device.h>
  27. #include <linux/firmware.h>
  28. #include <sound/core.h>
  29. #include <sound/pcm.h>
  30. #include <sound/asoundef.h>
  31. #include <sound/info.h>
  32. #include <asm/io.h>
  33. #include <sound/vx_core.h>
  34. #include "vx_cmd.h"
  35. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  36. MODULE_DESCRIPTION("Common routines for Digigram VX drivers");
  37. MODULE_LICENSE("GPL");
  38. /*
  39. * vx_check_reg_bit - wait for the specified bit is set/reset on a register
  40. * @reg: register to check
  41. * @mask: bit mask
  42. * @bit: resultant bit to be checked
  43. * @time: time-out of loop in msec
  44. *
  45. * returns zero if a bit matches, or a negative error code.
  46. */
  47. int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time)
  48. {
  49. unsigned long end_time = jiffies + (time * HZ + 999) / 1000;
  50. #ifdef CONFIG_SND_DEBUG
  51. static char *reg_names[VX_REG_MAX] = {
  52. "ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL",
  53. "DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ",
  54. "ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2",
  55. "MIC3", "INTCSR", "CNTRL", "GPIOC",
  56. "LOFREQ", "HIFREQ", "CSUER", "RUER"
  57. };
  58. #endif
  59. do {
  60. if ((snd_vx_inb(chip, reg) & mask) == bit)
  61. return 0;
  62. //msleep(10);
  63. } while (time_after_eq(end_time, jiffies));
  64. snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg));
  65. return -EIO;
  66. }
  67. EXPORT_SYMBOL(snd_vx_check_reg_bit);
  68. /*
  69. * vx_send_irq_dsp - set command irq bit
  70. * @num: the requested IRQ type, IRQ_XXX
  71. *
  72. * this triggers the specified IRQ request
  73. * returns 0 if successful, or a negative error code.
  74. *
  75. */
  76. static int vx_send_irq_dsp(struct vx_core *chip, int num)
  77. {
  78. int nirq;
  79. /* wait for Hc = 0 */
  80. if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0)
  81. return -EIO;
  82. nirq = num;
  83. if (vx_has_new_dsp(chip))
  84. nirq += VXP_IRQ_OFFSET;
  85. vx_outb(chip, CVR, (nirq >> 1) | CVR_HC);
  86. return 0;
  87. }
  88. /*
  89. * vx_reset_chk - reset CHK bit on ISR
  90. *
  91. * returns 0 if successful, or a negative error code.
  92. */
  93. static int vx_reset_chk(struct vx_core *chip)
  94. {
  95. /* Reset irq CHK */
  96. if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0)
  97. return -EIO;
  98. /* Wait until CHK = 0 */
  99. if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0)
  100. return -EIO;
  101. return 0;
  102. }
  103. /*
  104. * vx_transfer_end - terminate message transfer
  105. * @cmd: IRQ message to send (IRQ_MESS_XXX_END)
  106. *
  107. * returns 0 if successful, or a negative error code.
  108. * the error code can be VX-specific, retrieved via vx_get_error().
  109. * NB: call with spinlock held!
  110. */
  111. static int vx_transfer_end(struct vx_core *chip, int cmd)
  112. {
  113. int err;
  114. if ((err = vx_reset_chk(chip)) < 0)
  115. return err;
  116. /* irq MESS_READ/WRITE_END */
  117. if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
  118. return err;
  119. /* Wait CHK = 1 */
  120. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  121. return err;
  122. /* If error, Read RX */
  123. if ((err = vx_inb(chip, ISR)) & ISR_ERR) {
  124. if ((err = vx_wait_for_rx_full(chip)) < 0) {
  125. snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n");
  126. return err;
  127. }
  128. err = vx_inb(chip, RXH) << 16;
  129. err |= vx_inb(chip, RXM) << 8;
  130. err |= vx_inb(chip, RXL);
  131. snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err);
  132. return -(VX_ERR_MASK | err);
  133. }
  134. return 0;
  135. }
  136. /*
  137. * vx_read_status - return the status rmh
  138. * @rmh: rmh record to store the status
  139. *
  140. * returns 0 if successful, or a negative error code.
  141. * the error code can be VX-specific, retrieved via vx_get_error().
  142. * NB: call with spinlock held!
  143. */
  144. static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh)
  145. {
  146. int i, err, val, size;
  147. /* no read necessary? */
  148. if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0)
  149. return 0;
  150. /* Wait for RX full (with timeout protection)
  151. * The first word of status is in RX
  152. */
  153. err = vx_wait_for_rx_full(chip);
  154. if (err < 0)
  155. return err;
  156. /* Read RX */
  157. val = vx_inb(chip, RXH) << 16;
  158. val |= vx_inb(chip, RXM) << 8;
  159. val |= vx_inb(chip, RXL);
  160. /* If status given by DSP, let's decode its size */
  161. switch (rmh->DspStat) {
  162. case RMH_SSIZE_ARG:
  163. size = val & 0xff;
  164. rmh->Stat[0] = val & 0xffff00;
  165. rmh->LgStat = size + 1;
  166. break;
  167. case RMH_SSIZE_MASK:
  168. /* Let's count the arg numbers from a mask */
  169. rmh->Stat[0] = val;
  170. size = 0;
  171. while (val) {
  172. if (val & 0x01)
  173. size++;
  174. val >>= 1;
  175. }
  176. rmh->LgStat = size + 1;
  177. break;
  178. default:
  179. /* else retrieve the status length given by the driver */
  180. size = rmh->LgStat;
  181. rmh->Stat[0] = val; /* Val is the status 1st word */
  182. size--; /* hence adjust remaining length */
  183. break;
  184. }
  185. if (size < 1)
  186. return 0;
  187. if (snd_BUG_ON(size > SIZE_MAX_STATUS))
  188. return -EINVAL;
  189. for (i = 1; i <= size; i++) {
  190. /* trigger an irq MESS_WRITE_NEXT */
  191. err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT);
  192. if (err < 0)
  193. return err;
  194. /* Wait for RX full (with timeout protection) */
  195. err = vx_wait_for_rx_full(chip);
  196. if (err < 0)
  197. return err;
  198. rmh->Stat[i] = vx_inb(chip, RXH) << 16;
  199. rmh->Stat[i] |= vx_inb(chip, RXM) << 8;
  200. rmh->Stat[i] |= vx_inb(chip, RXL);
  201. }
  202. return vx_transfer_end(chip, IRQ_MESS_WRITE_END);
  203. }
  204. #define MASK_MORE_THAN_1_WORD_COMMAND 0x00008000
  205. #define MASK_1_WORD_COMMAND 0x00ff7fff
  206. /*
  207. * vx_send_msg_nolock - send a DSP message and read back the status
  208. * @rmh: the rmh record to send and receive
  209. *
  210. * returns 0 if successful, or a negative error code.
  211. * the error code can be VX-specific, retrieved via vx_get_error().
  212. *
  213. * this function doesn't call spinlock at all.
  214. */
  215. int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh)
  216. {
  217. int i, err;
  218. if (chip->chip_status & VX_STAT_IS_STALE)
  219. return -EBUSY;
  220. if ((err = vx_reset_chk(chip)) < 0) {
  221. snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n");
  222. return err;
  223. }
  224. #if 0
  225. printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n",
  226. rmh->Cmd[0], rmh->LgCmd, rmh->DspStat);
  227. if (rmh->LgCmd > 1) {
  228. printk(KERN_DEBUG " ");
  229. for (i = 1; i < rmh->LgCmd; i++)
  230. printk("0x%06x ", rmh->Cmd[i]);
  231. printk("\n");
  232. }
  233. #endif
  234. /* Check bit M is set according to length of the command */
  235. if (rmh->LgCmd > 1)
  236. rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND;
  237. else
  238. rmh->Cmd[0] &= MASK_1_WORD_COMMAND;
  239. /* Wait for TX empty */
  240. if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
  241. snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n");
  242. return err;
  243. }
  244. /* Write Cmd[0] */
  245. vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff);
  246. vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff);
  247. vx_outb(chip, TXL, rmh->Cmd[0] & 0xff);
  248. /* Trigger irq MESSAGE */
  249. if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) {
  250. snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n");
  251. return err;
  252. }
  253. /* Wait for CHK = 1 */
  254. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  255. return err;
  256. /* If error, get error value from RX */
  257. if (vx_inb(chip, ISR) & ISR_ERR) {
  258. if ((err = vx_wait_for_rx_full(chip)) < 0) {
  259. snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n");
  260. return err;
  261. }
  262. err = vx_inb(chip, RXH) << 16;
  263. err |= vx_inb(chip, RXM) << 8;
  264. err |= vx_inb(chip, RXL);
  265. snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err);
  266. err = -(VX_ERR_MASK | err);
  267. return err;
  268. }
  269. /* Send the other words */
  270. if (rmh->LgCmd > 1) {
  271. for (i = 1; i < rmh->LgCmd; i++) {
  272. /* Wait for TX ready */
  273. if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
  274. snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n");
  275. return err;
  276. }
  277. /* Write Cmd[i] */
  278. vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff);
  279. vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff);
  280. vx_outb(chip, TXL, rmh->Cmd[i] & 0xff);
  281. /* Trigger irq MESS_READ_NEXT */
  282. if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) {
  283. snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n");
  284. return err;
  285. }
  286. }
  287. /* Wait for TX empty */
  288. if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
  289. snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n");
  290. return err;
  291. }
  292. /* End of transfer */
  293. err = vx_transfer_end(chip, IRQ_MESS_READ_END);
  294. if (err < 0)
  295. return err;
  296. }
  297. return vx_read_status(chip, rmh);
  298. }
  299. /*
  300. * vx_send_msg - send a DSP message with spinlock
  301. * @rmh: the rmh record to send and receive
  302. *
  303. * returns 0 if successful, or a negative error code.
  304. * see vx_send_msg_nolock().
  305. */
  306. int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh)
  307. {
  308. unsigned long flags;
  309. int err;
  310. spin_lock_irqsave(&chip->lock, flags);
  311. err = vx_send_msg_nolock(chip, rmh);
  312. spin_unlock_irqrestore(&chip->lock, flags);
  313. return err;
  314. }
  315. /*
  316. * vx_send_rih_nolock - send an RIH to xilinx
  317. * @cmd: the command to send
  318. *
  319. * returns 0 if successful, or a negative error code.
  320. * the error code can be VX-specific, retrieved via vx_get_error().
  321. *
  322. * this function doesn't call spinlock at all.
  323. *
  324. * unlike RMH, no command is sent to DSP.
  325. */
  326. int vx_send_rih_nolock(struct vx_core *chip, int cmd)
  327. {
  328. int err;
  329. if (chip->chip_status & VX_STAT_IS_STALE)
  330. return -EBUSY;
  331. #if 0
  332. printk(KERN_DEBUG "send_rih: cmd = 0x%x\n", cmd);
  333. #endif
  334. if ((err = vx_reset_chk(chip)) < 0)
  335. return err;
  336. /* send the IRQ */
  337. if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
  338. return err;
  339. /* Wait CHK = 1 */
  340. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  341. return err;
  342. /* If error, read RX */
  343. if (vx_inb(chip, ISR) & ISR_ERR) {
  344. if ((err = vx_wait_for_rx_full(chip)) < 0)
  345. return err;
  346. err = vx_inb(chip, RXH) << 16;
  347. err |= vx_inb(chip, RXM) << 8;
  348. err |= vx_inb(chip, RXL);
  349. return -(VX_ERR_MASK | err);
  350. }
  351. return 0;
  352. }
  353. /*
  354. * vx_send_rih - send an RIH with spinlock
  355. * @cmd: the command to send
  356. *
  357. * see vx_send_rih_nolock().
  358. */
  359. int vx_send_rih(struct vx_core *chip, int cmd)
  360. {
  361. unsigned long flags;
  362. int err;
  363. spin_lock_irqsave(&chip->lock, flags);
  364. err = vx_send_rih_nolock(chip, cmd);
  365. spin_unlock_irqrestore(&chip->lock, flags);
  366. return err;
  367. }
  368. #define END_OF_RESET_WAIT_TIME 500 /* us */
  369. /**
  370. * snd_vx_boot_xilinx - boot up the xilinx interface
  371. * @boot: the boot record to load
  372. */
  373. int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot)
  374. {
  375. unsigned int i;
  376. int no_fillup = vx_has_new_dsp(chip);
  377. /* check the length of boot image */
  378. if (boot->size <= 0)
  379. return -EINVAL;
  380. if (boot->size % 3)
  381. return -EINVAL;
  382. #if 0
  383. {
  384. /* more strict check */
  385. unsigned int c = ((u32)boot->data[0] << 16) | ((u32)boot->data[1] << 8) | boot->data[2];
  386. if (boot->size != (c + 2) * 3)
  387. return -EINVAL;
  388. }
  389. #endif
  390. /* reset dsp */
  391. vx_reset_dsp(chip);
  392. udelay(END_OF_RESET_WAIT_TIME); /* another wait? */
  393. /* download boot strap */
  394. for (i = 0; i < 0x600; i += 3) {
  395. if (i >= boot->size) {
  396. if (no_fillup)
  397. break;
  398. if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
  399. snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
  400. return -EIO;
  401. }
  402. vx_outb(chip, TXH, 0);
  403. vx_outb(chip, TXM, 0);
  404. vx_outb(chip, TXL, 0);
  405. } else {
  406. const unsigned char *image = boot->data + i;
  407. if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
  408. snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
  409. return -EIO;
  410. }
  411. vx_outb(chip, TXH, image[0]);
  412. vx_outb(chip, TXM, image[1]);
  413. vx_outb(chip, TXL, image[2]);
  414. }
  415. }
  416. return 0;
  417. }
  418. EXPORT_SYMBOL(snd_vx_load_boot_image);
  419. /*
  420. * vx_test_irq_src - query the source of interrupts
  421. *
  422. * called from irq handler only
  423. */
  424. static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret)
  425. {
  426. int err;
  427. vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT);
  428. spin_lock(&chip->lock);
  429. err = vx_send_msg_nolock(chip, &chip->irq_rmh);
  430. if (err < 0)
  431. *ret = 0;
  432. else
  433. *ret = chip->irq_rmh.Stat[0];
  434. spin_unlock(&chip->lock);
  435. return err;
  436. }
  437. /*
  438. * vx_interrupt - soft irq handler
  439. */
  440. static void vx_interrupt(unsigned long private_data)
  441. {
  442. struct vx_core *chip = (struct vx_core *) private_data;
  443. unsigned int events;
  444. if (chip->chip_status & VX_STAT_IS_STALE)
  445. return;
  446. if (vx_test_irq_src(chip, &events) < 0)
  447. return;
  448. #if 0
  449. if (events & 0x000800)
  450. printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events);
  451. #endif
  452. // printk(KERN_DEBUG "IRQ events = 0x%x\n", events);
  453. /* We must prevent any application using this DSP
  454. * and block any further request until the application
  455. * either unregisters or reloads the DSP
  456. */
  457. if (events & FATAL_DSP_ERROR) {
  458. snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n");
  459. return;
  460. }
  461. /* The start on time code conditions are filled (ie the time code
  462. * received by the board is equal to one of those given to it).
  463. */
  464. if (events & TIME_CODE_EVENT_PENDING)
  465. ; /* so far, nothing to do yet */
  466. /* The frequency has changed on the board (UER mode). */
  467. if (events & FREQUENCY_CHANGE_EVENT_PENDING)
  468. vx_change_frequency(chip);
  469. /* update the pcm streams */
  470. vx_pcm_update_intr(chip, events);
  471. }
  472. /**
  473. * snd_vx_irq_handler - interrupt handler
  474. */
  475. irqreturn_t snd_vx_irq_handler(int irq, void *dev)
  476. {
  477. struct vx_core *chip = dev;
  478. if (! (chip->chip_status & VX_STAT_CHIP_INIT) ||
  479. (chip->chip_status & VX_STAT_IS_STALE))
  480. return IRQ_NONE;
  481. if (! vx_test_and_ack(chip))
  482. tasklet_schedule(&chip->tq);
  483. return IRQ_HANDLED;
  484. }
  485. EXPORT_SYMBOL(snd_vx_irq_handler);
  486. /*
  487. */
  488. static void vx_reset_board(struct vx_core *chip, int cold_reset)
  489. {
  490. if (snd_BUG_ON(!chip->ops->reset_board))
  491. return;
  492. /* current source, later sync'ed with target */
  493. chip->audio_source = VX_AUDIO_SRC_LINE;
  494. if (cold_reset) {
  495. chip->audio_source_target = chip->audio_source;
  496. chip->clock_source = INTERNAL_QUARTZ;
  497. chip->clock_mode = VX_CLOCK_MODE_AUTO;
  498. chip->freq = 48000;
  499. chip->uer_detected = VX_UER_MODE_NOT_PRESENT;
  500. chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
  501. }
  502. chip->ops->reset_board(chip, cold_reset);
  503. vx_reset_codec(chip, cold_reset);
  504. vx_set_internal_clock(chip, chip->freq);
  505. /* Reset the DSP */
  506. vx_reset_dsp(chip);
  507. if (vx_is_pcmcia(chip)) {
  508. /* Acknowledge any pending IRQ and reset the MEMIRQ flag. */
  509. vx_test_and_ack(chip);
  510. vx_validate_irq(chip, 1);
  511. }
  512. /* init CBits */
  513. vx_set_iec958_status(chip, chip->uer_bits);
  514. }
  515. /*
  516. * proc interface
  517. */
  518. static void vx_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  519. {
  520. struct vx_core *chip = entry->private_data;
  521. static char *audio_src_vxp[] = { "Line", "Mic", "Digital" };
  522. static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" };
  523. static char *clock_mode[] = { "Auto", "Internal", "External" };
  524. static char *clock_src[] = { "Internal", "External" };
  525. static char *uer_type[] = { "Consumer", "Professional", "Not Present" };
  526. snd_iprintf(buffer, "%s\n", chip->card->longname);
  527. snd_iprintf(buffer, "Xilinx Firmware: %s\n",
  528. chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No");
  529. snd_iprintf(buffer, "Device Initialized: %s\n",
  530. chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No");
  531. snd_iprintf(buffer, "DSP audio info:");
  532. if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME)
  533. snd_iprintf(buffer, " realtime");
  534. if (chip->audio_info & VX_AUDIO_INFO_OFFLINE)
  535. snd_iprintf(buffer, " offline");
  536. if (chip->audio_info & VX_AUDIO_INFO_MPEG1)
  537. snd_iprintf(buffer, " mpeg1");
  538. if (chip->audio_info & VX_AUDIO_INFO_MPEG2)
  539. snd_iprintf(buffer, " mpeg2");
  540. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8)
  541. snd_iprintf(buffer, " linear8");
  542. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16)
  543. snd_iprintf(buffer, " linear16");
  544. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24)
  545. snd_iprintf(buffer, " linear24");
  546. snd_iprintf(buffer, "\n");
  547. snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ?
  548. audio_src_vxp[chip->audio_source] :
  549. audio_src_vx2[chip->audio_source]);
  550. snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]);
  551. snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]);
  552. snd_iprintf(buffer, "Frequency: %d\n", chip->freq);
  553. snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected);
  554. snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]);
  555. snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n",
  556. chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size,
  557. chip->ibl.granularity);
  558. }
  559. static void vx_proc_init(struct vx_core *chip)
  560. {
  561. struct snd_info_entry *entry;
  562. if (! snd_card_proc_new(chip->card, "vx-status", &entry))
  563. snd_info_set_text_ops(entry, chip, vx_proc_read);
  564. }
  565. /**
  566. * snd_vx_dsp_boot - load the DSP boot
  567. */
  568. int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot)
  569. {
  570. int err;
  571. int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT);
  572. vx_reset_board(chip, cold_reset);
  573. vx_validate_irq(chip, 0);
  574. if ((err = snd_vx_load_boot_image(chip, boot)) < 0)
  575. return err;
  576. msleep(10);
  577. return 0;
  578. }
  579. EXPORT_SYMBOL(snd_vx_dsp_boot);
  580. /**
  581. * snd_vx_dsp_load - load the DSP image
  582. */
  583. int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp)
  584. {
  585. unsigned int i;
  586. int err;
  587. unsigned int csum = 0;
  588. const unsigned char *image, *cptr;
  589. if (dsp->size % 3)
  590. return -EINVAL;
  591. vx_toggle_dac_mute(chip, 1);
  592. /* Transfert data buffer from PC to DSP */
  593. for (i = 0; i < dsp->size; i += 3) {
  594. image = dsp->data + i;
  595. /* Wait DSP ready for a new read */
  596. if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
  597. printk(KERN_ERR
  598. "dsp loading error at position %d\n", i);
  599. return err;
  600. }
  601. cptr = image;
  602. csum ^= *cptr;
  603. csum = (csum >> 24) | (csum << 8);
  604. vx_outb(chip, TXH, *cptr++);
  605. csum ^= *cptr;
  606. csum = (csum >> 24) | (csum << 8);
  607. vx_outb(chip, TXM, *cptr++);
  608. csum ^= *cptr;
  609. csum = (csum >> 24) | (csum << 8);
  610. vx_outb(chip, TXL, *cptr++);
  611. }
  612. snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum);
  613. msleep(200);
  614. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  615. return err;
  616. vx_toggle_dac_mute(chip, 0);
  617. vx_test_and_ack(chip);
  618. vx_validate_irq(chip, 1);
  619. return 0;
  620. }
  621. EXPORT_SYMBOL(snd_vx_dsp_load);
  622. #ifdef CONFIG_PM
  623. /*
  624. * suspend
  625. */
  626. int snd_vx_suspend(struct vx_core *chip, pm_message_t state)
  627. {
  628. unsigned int i;
  629. snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
  630. chip->chip_status |= VX_STAT_IN_SUSPEND;
  631. for (i = 0; i < chip->hw->num_codecs; i++)
  632. snd_pcm_suspend_all(chip->pcm[i]);
  633. return 0;
  634. }
  635. EXPORT_SYMBOL(snd_vx_suspend);
  636. /*
  637. * resume
  638. */
  639. int snd_vx_resume(struct vx_core *chip)
  640. {
  641. int i, err;
  642. chip->chip_status &= ~VX_STAT_CHIP_INIT;
  643. for (i = 0; i < 4; i++) {
  644. if (! chip->firmware[i])
  645. continue;
  646. err = chip->ops->load_dsp(chip, i, chip->firmware[i]);
  647. if (err < 0) {
  648. snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i);
  649. return -EIO;
  650. }
  651. }
  652. chip->chip_status |= VX_STAT_CHIP_INIT;
  653. chip->chip_status &= ~VX_STAT_IN_SUSPEND;
  654. snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
  655. return 0;
  656. }
  657. EXPORT_SYMBOL(snd_vx_resume);
  658. #endif
  659. /**
  660. * snd_vx_create - constructor for struct vx_core
  661. * @hw: hardware specific record
  662. *
  663. * this function allocates the instance and prepare for the hardware
  664. * initialization.
  665. *
  666. * return the instance pointer if successful, NULL in error.
  667. */
  668. struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
  669. struct snd_vx_ops *ops,
  670. int extra_size)
  671. {
  672. struct vx_core *chip;
  673. if (snd_BUG_ON(!card || !hw || !ops))
  674. return NULL;
  675. chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL);
  676. if (! chip) {
  677. snd_printk(KERN_ERR "vx_core: no memory\n");
  678. return NULL;
  679. }
  680. spin_lock_init(&chip->lock);
  681. spin_lock_init(&chip->irq_lock);
  682. chip->irq = -1;
  683. chip->hw = hw;
  684. chip->type = hw->type;
  685. chip->ops = ops;
  686. tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip);
  687. mutex_init(&chip->mixer_mutex);
  688. chip->card = card;
  689. card->private_data = chip;
  690. strcpy(card->driver, hw->name);
  691. sprintf(card->shortname, "Digigram %s", hw->name);
  692. vx_proc_init(chip);
  693. return chip;
  694. }
  695. EXPORT_SYMBOL(snd_vx_create);
  696. /*
  697. * module entries
  698. */
  699. static int __init alsa_vx_core_init(void)
  700. {
  701. return 0;
  702. }
  703. static void __exit alsa_vx_core_exit(void)
  704. {
  705. }
  706. module_init(alsa_vx_core_init)
  707. module_exit(alsa_vx_core_exit)