Makefile.build 15 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. src := $(obj)
  5. PHONY := __build
  6. __build:
  7. # Init all relevant variables used in kbuild files so
  8. # 1) they have correct type
  9. # 2) they do not inherit any value from the environment
  10. obj-y :=
  11. obj-m :=
  12. lib-y :=
  13. lib-m :=
  14. always :=
  15. targets :=
  16. subdir-y :=
  17. subdir-m :=
  18. EXTRA_AFLAGS :=
  19. EXTRA_CFLAGS :=
  20. EXTRA_CPPFLAGS :=
  21. EXTRA_LDFLAGS :=
  22. asflags-y :=
  23. ccflags-y :=
  24. cppflags-y :=
  25. ldflags-y :=
  26. subdir-asflags-y :=
  27. subdir-ccflags-y :=
  28. # Read auto.conf if it exists, otherwise ignore
  29. -include include/config/auto.conf
  30. include scripts/Kbuild.include
  31. # For backward compatibility check that these variables do not change
  32. save-cflags := $(CFLAGS)
  33. # The filename Kbuild has precedence over Makefile
  34. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  35. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  36. include $(kbuild-file)
  37. # If the save-* variables changed error out
  38. ifeq ($(KBUILD_NOPEDANTIC),)
  39. ifneq ("$(save-cflags)","$(CFLAGS)")
  40. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
  41. endif
  42. endif
  43. #
  44. # make W=... settings
  45. #
  46. # W=1 - warnings that may be relevant and does not occur too often
  47. # W=2 - warnings that occur quite often but may still be relevant
  48. # W=3 - the more obscure warnings, can most likely be ignored
  49. #
  50. # $(call cc-option, -W...) handles gcc -W.. options which
  51. # are not supported by all versions of the compiler
  52. ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
  53. warning- := $(empty)
  54. warning-1 := -Wextra -Wunused -Wno-unused-parameter
  55. warning-1 += -Wmissing-declarations
  56. warning-1 += -Wmissing-format-attribute
  57. warning-1 += -Wmissing-prototypes
  58. warning-1 += -Wold-style-definition
  59. warning-1 += $(call cc-option, -Wmissing-include-dirs)
  60. warning-1 += $(call cc-option, -Wunused-but-set-variable)
  61. warning-2 := -Waggregate-return
  62. warning-2 += -Wcast-align
  63. warning-2 += -Wdisabled-optimization
  64. warning-2 += -Wnested-externs
  65. warning-2 += -Wshadow
  66. warning-2 += $(call cc-option, -Wlogical-op)
  67. warning-3 := -Wbad-function-cast
  68. warning-3 += -Wcast-qual
  69. warning-3 += -Wconversion
  70. warning-3 += -Wpacked
  71. warning-3 += -Wpadded
  72. warning-3 += -Wpointer-arith
  73. warning-3 += -Wredundant-decls
  74. warning-3 += -Wswitch-default
  75. warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
  76. warning-3 += $(call cc-option, -Wvla)
  77. warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  78. warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  79. warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
  80. ifeq ("$(strip $(warning))","")
  81. $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
  82. endif
  83. KBUILD_CFLAGS += $(warning)
  84. endif
  85. include scripts/Makefile.lib
  86. ifdef host-progs
  87. ifneq ($(hostprogs-y),$(host-progs))
  88. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  89. hostprogs-y += $(host-progs)
  90. endif
  91. endif
  92. # Do not include host rules unless needed
  93. ifneq ($(hostprogs-y)$(hostprogs-m),)
  94. include scripts/Makefile.host
  95. endif
  96. ifneq ($(KBUILD_SRC),)
  97. # Create output directory if not already present
  98. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  99. # Create directories for object files if directory does not exist
  100. # Needed when obj-y := dir/file.o syntax is used
  101. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  102. endif
  103. ifndef obj
  104. $(warning kbuild: Makefile.build is included improperly)
  105. endif
  106. # ===========================================================================
  107. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  108. lib-target := $(obj)/lib.a
  109. endif
  110. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
  111. builtin-target := $(obj)/built-in.o
  112. endif
  113. modorder-target := $(obj)/modules.order
  114. # We keep a list of all modules in $(MODVERDIR)
  115. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  116. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  117. $(subdir-ym) $(always)
  118. @:
  119. # Linus' kernel sanity checking tool
  120. ifneq ($(KBUILD_CHECKSRC),0)
  121. ifeq ($(KBUILD_CHECKSRC),2)
  122. quiet_cmd_force_checksrc = CHECK $<
  123. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  124. else
  125. quiet_cmd_checksrc = CHECK $<
  126. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  127. endif
  128. endif
  129. # Do section mismatch analysis for each module/built-in.o
  130. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  131. cmd_secanalysis = ; scripts/mod/modpost $@
  132. endif
  133. # Compile C sources (.c)
  134. # ---------------------------------------------------------------------------
  135. # Default is built-in, unless we know otherwise
  136. modkern_cflags = \
  137. $(if $(part-of-module), \
  138. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  139. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  140. quiet_modtag := $(empty) $(empty)
  141. $(real-objs-m) : part-of-module := y
  142. $(real-objs-m:.o=.i) : part-of-module := y
  143. $(real-objs-m:.o=.s) : part-of-module := y
  144. $(real-objs-m:.o=.lst): part-of-module := y
  145. $(real-objs-m) : quiet_modtag := [M]
  146. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  147. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  148. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  149. $(obj-m) : quiet_modtag := [M]
  150. # Default for not multi-part modules
  151. modname = $(basetarget)
  152. $(multi-objs-m) : modname = $(modname-multi)
  153. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  154. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  155. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  156. $(multi-objs-y) : modname = $(modname-multi)
  157. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  158. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  159. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  160. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  161. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  162. $(obj)/%.s: $(src)/%.c FORCE
  163. $(call if_changed_dep,cc_s_c)
  164. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  165. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  166. $(obj)/%.i: $(src)/%.c FORCE
  167. $(call if_changed_dep,cc_i_c)
  168. cmd_gensymtypes = \
  169. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  170. $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
  171. $(if $(KBUILD_PRESERVE),-p) \
  172. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  173. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  174. cmd_cc_symtypes_c = \
  175. set -e; \
  176. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  177. test -s $@ || rm -f $@
  178. $(obj)/%.symtypes : $(src)/%.c FORCE
  179. $(call cmd,cc_symtypes_c)
  180. # C (.c) files
  181. # The C file is compiled and updated dependency information is generated.
  182. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  183. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  184. ifndef CONFIG_MODVERSIONS
  185. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  186. else
  187. # When module versioning is enabled the following steps are executed:
  188. # o compile a .tmp_<file>.o from <file>.c
  189. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  190. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  191. # are done.
  192. # o otherwise, we calculate symbol versions using the good old
  193. # genksyms on the preprocessed source and postprocess them in a way
  194. # that they are usable as a linker script
  195. # o generate <file>.o from .tmp_<file>.o using the linker to
  196. # replace the unresolved symbols __crc_exported_symbol with
  197. # the actual value of the checksum generated by genksyms
  198. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  199. cmd_modversions = \
  200. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  201. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  202. > $(@D)/.tmp_$(@F:.o=.ver); \
  203. \
  204. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  205. -T $(@D)/.tmp_$(@F:.o=.ver); \
  206. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  207. else \
  208. mv -f $(@D)/.tmp_$(@F) $@; \
  209. fi;
  210. endif
  211. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  212. ifdef BUILD_C_RECORDMCOUNT
  213. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  214. RECORDMCOUNT_FLAGS = -w
  215. endif
  216. # Due to recursion, we must skip empty.o.
  217. # The empty.o file is created in the make process in order to determine
  218. # the target endianness and word size. It is made before all other C
  219. # files, including recordmcount.
  220. sub_cmd_record_mcount = \
  221. if [ $(@) != "scripts/mod/empty.o" ]; then \
  222. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  223. fi;
  224. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  225. $(srctree)/scripts/recordmcount.h
  226. else
  227. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  228. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  229. "$(if $(CONFIG_64BIT),64,32)" \
  230. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
  231. "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
  232. "$(if $(part-of-module),1,0)" "$(@)";
  233. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  234. endif
  235. cmd_record_mcount = \
  236. if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
  237. $(sub_cmd_record_mcount) \
  238. fi;
  239. endif
  240. define rule_cc_o_c
  241. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  242. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  243. $(cmd_modversions) \
  244. $(call echo-cmd,record_mcount) \
  245. $(cmd_record_mcount) \
  246. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  247. $(dot-target).tmp; \
  248. rm -f $(depfile); \
  249. mv -f $(dot-target).tmp $(dot-target).cmd
  250. endef
  251. # Built-in and composite module parts
  252. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  253. $(call cmd,force_checksrc)
  254. $(call if_changed_rule,cc_o_c)
  255. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  256. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  257. $(call cmd,force_checksrc)
  258. $(call if_changed_rule,cc_o_c)
  259. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  260. quiet_cmd_cc_lst_c = MKLST $@
  261. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  262. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  263. System.map $(OBJDUMP) > $@
  264. $(obj)/%.lst: $(src)/%.c FORCE
  265. $(call if_changed_dep,cc_lst_c)
  266. # Compile assembler sources (.S)
  267. # ---------------------------------------------------------------------------
  268. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  269. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  270. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  271. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  272. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  273. $(obj)/%.s: $(src)/%.S FORCE
  274. $(call if_changed_dep,as_s_S)
  275. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  276. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  277. $(obj)/%.o: $(src)/%.S FORCE
  278. $(call if_changed_dep,as_o_S)
  279. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  280. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  281. # Linker scripts preprocessor (.lds.S -> .lds)
  282. # ---------------------------------------------------------------------------
  283. quiet_cmd_cpp_lds_S = LDS $@
  284. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  285. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  286. $(obj)/%.lds: $(src)/%.lds.S FORCE
  287. $(call if_changed_dep,cpp_lds_S)
  288. # Build the compiled-in targets
  289. # ---------------------------------------------------------------------------
  290. # To build objects in subdirs, we need to descend into the directories
  291. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  292. #
  293. # Rule to compile a set of .o files into one .o file
  294. #
  295. ifdef builtin-target
  296. quiet_cmd_link_o_target = LD $@
  297. # If the list of objects to link is empty, just create an empty built-in.o
  298. cmd_link_o_target = $(if $(strip $(obj-y)),\
  299. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
  300. $(cmd_secanalysis),\
  301. rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
  302. $(builtin-target): $(obj-y) FORCE
  303. $(call if_changed,link_o_target)
  304. targets += $(builtin-target)
  305. endif # builtin-target
  306. #
  307. # Rule to create modules.order file
  308. #
  309. # Create commands to either record .ko file or cat modules.order from
  310. # a subdirectory
  311. modorder-cmds = \
  312. $(foreach m, $(modorder), \
  313. $(if $(filter %/modules.order, $m), \
  314. cat $m;, echo kernel/$m;))
  315. $(modorder-target): $(subdir-ym) FORCE
  316. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  317. #
  318. # Rule to compile a set of .o files into one .a file
  319. #
  320. ifdef lib-target
  321. quiet_cmd_link_l_target = AR $@
  322. cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
  323. $(lib-target): $(lib-y) FORCE
  324. $(call if_changed,link_l_target)
  325. targets += $(lib-target)
  326. endif
  327. #
  328. # Rule to link composite objects
  329. #
  330. # Composite objects are specified in kbuild makefile as follows:
  331. # <composite-object>-objs := <list of .o files>
  332. # or
  333. # <composite-object>-y := <list of .o files>
  334. link_multi_deps = \
  335. $(filter $(addprefix $(obj)/, \
  336. $($(subst $(obj)/,,$(@:.o=-objs))) \
  337. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  338. quiet_cmd_link_multi-y = LD $@
  339. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
  340. quiet_cmd_link_multi-m = LD [M] $@
  341. cmd_link_multi-m = $(cmd_link_multi-y)
  342. # We would rather have a list of rules like
  343. # foo.o: $(foo-objs)
  344. # but that's not so easy, so we rather make all composite objects depend
  345. # on the set of all their parts
  346. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  347. $(call if_changed,link_multi-y)
  348. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  349. $(call if_changed,link_multi-m)
  350. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  351. targets += $(multi-used-y) $(multi-used-m)
  352. # Descending
  353. # ---------------------------------------------------------------------------
  354. PHONY += $(subdir-ym)
  355. $(subdir-ym):
  356. $(Q)$(MAKE) $(build)=$@
  357. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  358. # ---------------------------------------------------------------------------
  359. PHONY += FORCE
  360. FORCE:
  361. # Read all saved command lines and dependencies for the $(targets) we
  362. # may be building above, using $(if_changed{,_dep}). As an
  363. # optimization, we don't need to read them if the target does not
  364. # exist, we will rebuild anyway in that case.
  365. targets := $(wildcard $(sort $(targets)))
  366. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  367. ifneq ($(cmd_files),)
  368. include $(cmd_files)
  369. endif
  370. # Declare the contents of the .PHONY variable as phony. We keep that
  371. # information in a variable se we can use it in if_changed and friends.
  372. .PHONY: $(PHONY)