rdc321x_wdt.c 7.5 KB

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  1. /*
  2. * RDC321x watchdog driver
  3. *
  4. * Copyright (C) 2007-2010 Florian Fainelli <florian@openwrt.org>
  5. *
  6. * This driver is highly inspired from the cpu5_wdt driver
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/fs.h>
  29. #include <linux/init.h>
  30. #include <linux/ioport.h>
  31. #include <linux/timer.h>
  32. #include <linux/completion.h>
  33. #include <linux/jiffies.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/io.h>
  37. #include <linux/uaccess.h>
  38. #include <linux/mfd/rdc321x.h>
  39. #define RDC_WDT_MASK 0x80000000 /* Mask */
  40. #define RDC_WDT_EN 0x00800000 /* Enable bit */
  41. #define RDC_WDT_WTI 0x00200000 /* Generate CPU reset/NMI/WDT on timeout */
  42. #define RDC_WDT_RST 0x00100000 /* Reset bit */
  43. #define RDC_WDT_WIF 0x00040000 /* WDT IRQ Flag */
  44. #define RDC_WDT_IRT 0x00000100 /* IRQ Routing table */
  45. #define RDC_WDT_CNT 0x00000001 /* WDT count */
  46. #define RDC_CLS_TMR 0x80003844 /* Clear timer */
  47. #define RDC_WDT_INTERVAL (HZ/10+1)
  48. static int ticks = 1000;
  49. /* some device data */
  50. static struct {
  51. struct completion stop;
  52. int running;
  53. struct timer_list timer;
  54. int queue;
  55. int default_ticks;
  56. unsigned long inuse;
  57. spinlock_t lock;
  58. struct pci_dev *sb_pdev;
  59. int base_reg;
  60. } rdc321x_wdt_device;
  61. /* generic helper functions */
  62. static void rdc321x_wdt_trigger(unsigned long unused)
  63. {
  64. unsigned long flags;
  65. u32 val;
  66. if (rdc321x_wdt_device.running)
  67. ticks--;
  68. /* keep watchdog alive */
  69. spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
  70. pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
  71. rdc321x_wdt_device.base_reg, &val);
  72. val |= RDC_WDT_EN;
  73. pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
  74. rdc321x_wdt_device.base_reg, val);
  75. spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
  76. /* requeue?? */
  77. if (rdc321x_wdt_device.queue && ticks)
  78. mod_timer(&rdc321x_wdt_device.timer,
  79. jiffies + RDC_WDT_INTERVAL);
  80. else {
  81. /* ticks doesn't matter anyway */
  82. complete(&rdc321x_wdt_device.stop);
  83. }
  84. }
  85. static void rdc321x_wdt_reset(void)
  86. {
  87. ticks = rdc321x_wdt_device.default_ticks;
  88. }
  89. static void rdc321x_wdt_start(void)
  90. {
  91. unsigned long flags;
  92. if (!rdc321x_wdt_device.queue) {
  93. rdc321x_wdt_device.queue = 1;
  94. /* Clear the timer */
  95. spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
  96. pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
  97. rdc321x_wdt_device.base_reg, RDC_CLS_TMR);
  98. /* Enable watchdog and set the timeout to 81.92 us */
  99. pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
  100. rdc321x_wdt_device.base_reg,
  101. RDC_WDT_EN | RDC_WDT_CNT);
  102. spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
  103. mod_timer(&rdc321x_wdt_device.timer,
  104. jiffies + RDC_WDT_INTERVAL);
  105. }
  106. /* if process dies, counter is not decremented */
  107. rdc321x_wdt_device.running++;
  108. }
  109. static int rdc321x_wdt_stop(void)
  110. {
  111. if (rdc321x_wdt_device.running)
  112. rdc321x_wdt_device.running = 0;
  113. ticks = rdc321x_wdt_device.default_ticks;
  114. return -EIO;
  115. }
  116. /* filesystem operations */
  117. static int rdc321x_wdt_open(struct inode *inode, struct file *file)
  118. {
  119. if (test_and_set_bit(0, &rdc321x_wdt_device.inuse))
  120. return -EBUSY;
  121. return nonseekable_open(inode, file);
  122. }
  123. static int rdc321x_wdt_release(struct inode *inode, struct file *file)
  124. {
  125. clear_bit(0, &rdc321x_wdt_device.inuse);
  126. return 0;
  127. }
  128. static long rdc321x_wdt_ioctl(struct file *file, unsigned int cmd,
  129. unsigned long arg)
  130. {
  131. void __user *argp = (void __user *)arg;
  132. u32 value;
  133. static const struct watchdog_info ident = {
  134. .options = WDIOF_CARDRESET,
  135. .identity = "RDC321x WDT",
  136. };
  137. unsigned long flags;
  138. switch (cmd) {
  139. case WDIOC_KEEPALIVE:
  140. rdc321x_wdt_reset();
  141. break;
  142. case WDIOC_GETSTATUS:
  143. /* Read the value from the DATA register */
  144. spin_lock_irqsave(&rdc321x_wdt_device.lock, flags);
  145. pci_read_config_dword(rdc321x_wdt_device.sb_pdev,
  146. rdc321x_wdt_device.base_reg, &value);
  147. spin_unlock_irqrestore(&rdc321x_wdt_device.lock, flags);
  148. if (copy_to_user(argp, &value, sizeof(u32)))
  149. return -EFAULT;
  150. break;
  151. case WDIOC_GETSUPPORT:
  152. if (copy_to_user(argp, &ident, sizeof(ident)))
  153. return -EFAULT;
  154. break;
  155. case WDIOC_SETOPTIONS:
  156. if (copy_from_user(&value, argp, sizeof(int)))
  157. return -EFAULT;
  158. switch (value) {
  159. case WDIOS_ENABLECARD:
  160. rdc321x_wdt_start();
  161. break;
  162. case WDIOS_DISABLECARD:
  163. return rdc321x_wdt_stop();
  164. default:
  165. return -EINVAL;
  166. }
  167. break;
  168. default:
  169. return -ENOTTY;
  170. }
  171. return 0;
  172. }
  173. static ssize_t rdc321x_wdt_write(struct file *file, const char __user *buf,
  174. size_t count, loff_t *ppos)
  175. {
  176. if (!count)
  177. return -EIO;
  178. rdc321x_wdt_reset();
  179. return count;
  180. }
  181. static const struct file_operations rdc321x_wdt_fops = {
  182. .owner = THIS_MODULE,
  183. .llseek = no_llseek,
  184. .unlocked_ioctl = rdc321x_wdt_ioctl,
  185. .open = rdc321x_wdt_open,
  186. .write = rdc321x_wdt_write,
  187. .release = rdc321x_wdt_release,
  188. };
  189. static struct miscdevice rdc321x_wdt_misc = {
  190. .minor = WATCHDOG_MINOR,
  191. .name = "watchdog",
  192. .fops = &rdc321x_wdt_fops,
  193. };
  194. static int __devinit rdc321x_wdt_probe(struct platform_device *pdev)
  195. {
  196. int err;
  197. struct resource *r;
  198. struct rdc321x_wdt_pdata *pdata;
  199. pdata = pdev->dev.platform_data;
  200. if (!pdata) {
  201. dev_err(&pdev->dev, "no platform data supplied\n");
  202. return -ENODEV;
  203. }
  204. r = platform_get_resource_byname(pdev, IORESOURCE_IO, "wdt-reg");
  205. if (!r) {
  206. dev_err(&pdev->dev, "failed to get wdt-reg resource\n");
  207. return -ENODEV;
  208. }
  209. rdc321x_wdt_device.sb_pdev = pdata->sb_pdev;
  210. rdc321x_wdt_device.base_reg = r->start;
  211. err = misc_register(&rdc321x_wdt_misc);
  212. if (err < 0) {
  213. dev_err(&pdev->dev, "misc_register failed\n");
  214. return err;
  215. }
  216. spin_lock_init(&rdc321x_wdt_device.lock);
  217. /* Reset the watchdog */
  218. pci_write_config_dword(rdc321x_wdt_device.sb_pdev,
  219. rdc321x_wdt_device.base_reg, RDC_WDT_RST);
  220. init_completion(&rdc321x_wdt_device.stop);
  221. rdc321x_wdt_device.queue = 0;
  222. clear_bit(0, &rdc321x_wdt_device.inuse);
  223. setup_timer(&rdc321x_wdt_device.timer, rdc321x_wdt_trigger, 0);
  224. rdc321x_wdt_device.default_ticks = ticks;
  225. dev_info(&pdev->dev, "watchdog init success\n");
  226. return 0;
  227. }
  228. static int __devexit rdc321x_wdt_remove(struct platform_device *pdev)
  229. {
  230. if (rdc321x_wdt_device.queue) {
  231. rdc321x_wdt_device.queue = 0;
  232. wait_for_completion(&rdc321x_wdt_device.stop);
  233. }
  234. misc_deregister(&rdc321x_wdt_misc);
  235. return 0;
  236. }
  237. static struct platform_driver rdc321x_wdt_driver = {
  238. .probe = rdc321x_wdt_probe,
  239. .remove = __devexit_p(rdc321x_wdt_remove),
  240. .driver = {
  241. .owner = THIS_MODULE,
  242. .name = "rdc321x-wdt",
  243. },
  244. };
  245. static int __init rdc321x_wdt_init(void)
  246. {
  247. return platform_driver_register(&rdc321x_wdt_driver);
  248. }
  249. static void __exit rdc321x_wdt_exit(void)
  250. {
  251. platform_driver_unregister(&rdc321x_wdt_driver);
  252. }
  253. module_init(rdc321x_wdt_init);
  254. module_exit(rdc321x_wdt_exit);
  255. MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
  256. MODULE_DESCRIPTION("RDC321x watchdog driver");
  257. MODULE_LICENSE("GPL");
  258. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);