iop_wdt.c 6.0 KB

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  1. /*
  2. * drivers/char/watchdog/iop_wdt.c
  3. *
  4. * WDT driver for Intel I/O Processors
  5. * Copyright (C) 2005, Intel Corporation.
  6. *
  7. * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms and conditions of the GNU General Public License,
  11. * version 2, as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. *
  18. * You should have received a copy of the GNU General Public License along with
  19. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  20. * Place - Suite 330, Boston, MA 02111-1307 USA.
  21. *
  22. * Curt E Bruns <curt.e.bruns@intel.com>
  23. * Peter Milne <peter.milne@d-tacq.com>
  24. * Dan Williams <dan.j.williams@intel.com>
  25. */
  26. #include <linux/module.h>
  27. #include <linux/kernel.h>
  28. #include <linux/fs.h>
  29. #include <linux/init.h>
  30. #include <linux/device.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/watchdog.h>
  33. #include <linux/uaccess.h>
  34. #include <mach/hardware.h>
  35. static int nowayout = WATCHDOG_NOWAYOUT;
  36. static unsigned long wdt_status;
  37. static unsigned long boot_status;
  38. static spinlock_t wdt_lock;
  39. #define WDT_IN_USE 0
  40. #define WDT_OK_TO_CLOSE 1
  41. #define WDT_ENABLED 2
  42. static unsigned long iop_watchdog_timeout(void)
  43. {
  44. return (0xffffffffUL / get_iop_tick_rate());
  45. }
  46. /**
  47. * wdt_supports_disable - determine if we are accessing a iop13xx watchdog
  48. * or iop3xx by whether it has a disable command
  49. */
  50. static int wdt_supports_disable(void)
  51. {
  52. int can_disable;
  53. if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM)
  54. can_disable = 1;
  55. else
  56. can_disable = 0;
  57. return can_disable;
  58. }
  59. static void wdt_enable(void)
  60. {
  61. /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
  62. * Takes approx. 10.7s to timeout
  63. */
  64. spin_lock(&wdt_lock);
  65. write_wdtcr(IOP_WDTCR_EN_ARM);
  66. write_wdtcr(IOP_WDTCR_EN);
  67. spin_unlock(&wdt_lock);
  68. }
  69. /* returns 0 if the timer was successfully disabled */
  70. static int wdt_disable(void)
  71. {
  72. /* Stop Counting */
  73. if (wdt_supports_disable()) {
  74. spin_lock(&wdt_lock);
  75. write_wdtcr(IOP_WDTCR_DIS_ARM);
  76. write_wdtcr(IOP_WDTCR_DIS);
  77. clear_bit(WDT_ENABLED, &wdt_status);
  78. spin_unlock(&wdt_lock);
  79. printk(KERN_INFO "WATCHDOG: Disabled\n");
  80. return 0;
  81. } else
  82. return 1;
  83. }
  84. static int iop_wdt_open(struct inode *inode, struct file *file)
  85. {
  86. if (test_and_set_bit(WDT_IN_USE, &wdt_status))
  87. return -EBUSY;
  88. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  89. wdt_enable();
  90. set_bit(WDT_ENABLED, &wdt_status);
  91. return nonseekable_open(inode, file);
  92. }
  93. static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len,
  94. loff_t *ppos)
  95. {
  96. if (len) {
  97. if (!nowayout) {
  98. size_t i;
  99. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  100. for (i = 0; i != len; i++) {
  101. char c;
  102. if (get_user(c, data + i))
  103. return -EFAULT;
  104. if (c == 'V')
  105. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  106. }
  107. }
  108. wdt_enable();
  109. }
  110. return len;
  111. }
  112. static const struct watchdog_info ident = {
  113. .options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  114. .identity = "iop watchdog",
  115. };
  116. static long iop_wdt_ioctl(struct file *file,
  117. unsigned int cmd, unsigned long arg)
  118. {
  119. int options;
  120. int ret = -ENOTTY;
  121. int __user *argp = (int __user *)arg;
  122. switch (cmd) {
  123. case WDIOC_GETSUPPORT:
  124. if (copy_to_user(argp, &ident, sizeof(ident)))
  125. ret = -EFAULT;
  126. else
  127. ret = 0;
  128. break;
  129. case WDIOC_GETSTATUS:
  130. ret = put_user(0, argp);
  131. break;
  132. case WDIOC_GETBOOTSTATUS:
  133. ret = put_user(boot_status, argp);
  134. break;
  135. case WDIOC_SETOPTIONS:
  136. if (get_user(options, (int *)arg))
  137. return -EFAULT;
  138. if (options & WDIOS_DISABLECARD) {
  139. if (!nowayout) {
  140. if (wdt_disable() == 0) {
  141. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  142. ret = 0;
  143. } else
  144. ret = -ENXIO;
  145. } else
  146. ret = 0;
  147. }
  148. if (options & WDIOS_ENABLECARD) {
  149. wdt_enable();
  150. ret = 0;
  151. }
  152. break;
  153. case WDIOC_KEEPALIVE:
  154. wdt_enable();
  155. ret = 0;
  156. break;
  157. case WDIOC_GETTIMEOUT:
  158. ret = put_user(iop_watchdog_timeout(), argp);
  159. break;
  160. }
  161. return ret;
  162. }
  163. static int iop_wdt_release(struct inode *inode, struct file *file)
  164. {
  165. int state = 1;
  166. if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
  167. if (test_bit(WDT_ENABLED, &wdt_status))
  168. state = wdt_disable();
  169. /* if the timer is not disabled reload and notify that we are still
  170. * going down
  171. */
  172. if (state != 0) {
  173. wdt_enable();
  174. printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - "
  175. "reset in %lu seconds\n", iop_watchdog_timeout());
  176. }
  177. clear_bit(WDT_IN_USE, &wdt_status);
  178. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  179. return 0;
  180. }
  181. static const struct file_operations iop_wdt_fops = {
  182. .owner = THIS_MODULE,
  183. .llseek = no_llseek,
  184. .write = iop_wdt_write,
  185. .unlocked_ioctl = iop_wdt_ioctl,
  186. .open = iop_wdt_open,
  187. .release = iop_wdt_release,
  188. };
  189. static struct miscdevice iop_wdt_miscdev = {
  190. .minor = WATCHDOG_MINOR,
  191. .name = "watchdog",
  192. .fops = &iop_wdt_fops,
  193. };
  194. static int __init iop_wdt_init(void)
  195. {
  196. int ret;
  197. spin_lock_init(&wdt_lock);
  198. /* check if the reset was caused by the watchdog timer */
  199. boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0;
  200. /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
  201. * NOTE: An IB Reset will Reset both cores in the IOP342
  202. */
  203. write_wdtsr(IOP13XX_WDTCR_IB_RESET);
  204. /* Register after we have the device set up so we cannot race
  205. with an open */
  206. ret = misc_register(&iop_wdt_miscdev);
  207. if (ret == 0)
  208. printk(KERN_INFO "iop watchdog timer: timeout %lu sec\n",
  209. iop_watchdog_timeout());
  210. return ret;
  211. }
  212. static void __exit iop_wdt_exit(void)
  213. {
  214. misc_deregister(&iop_wdt_miscdev);
  215. }
  216. module_init(iop_wdt_init);
  217. module_exit(iop_wdt_exit);
  218. module_param(nowayout, int, 0);
  219. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
  220. MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
  221. MODULE_DESCRIPTION("iop watchdog timer driver");
  222. MODULE_LICENSE("GPL");
  223. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);