f71808e_wdt.c 21 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
  4. * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
  5. * *
  6. * This program is free software; you can redistribute it and/or modify *
  7. * it under the terms of the GNU General Public License as published by *
  8. * the Free Software Foundation; either version 2 of the License, or *
  9. * (at your option) any later version. *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  20. ***************************************************************************/
  21. #include <linux/err.h>
  22. #include <linux/fs.h>
  23. #include <linux/init.h>
  24. #include <linux/io.h>
  25. #include <linux/ioport.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/module.h>
  28. #include <linux/mutex.h>
  29. #include <linux/notifier.h>
  30. #include <linux/reboot.h>
  31. #include <linux/uaccess.h>
  32. #include <linux/watchdog.h>
  33. #define DRVNAME "f71808e_wdt"
  34. #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
  35. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  36. #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
  37. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  38. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  39. #define SIO_REG_DEVREV 0x22 /* Device revision */
  40. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  41. #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
  42. #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
  43. #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
  44. #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
  45. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  46. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  47. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  48. #define SIO_F71808_ID 0x0901 /* Chipset ID */
  49. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  50. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  51. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  52. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  53. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  54. #define F71808FG_REG_WDO_CONF 0xf0
  55. #define F71808FG_REG_WDT_CONF 0xf5
  56. #define F71808FG_REG_WD_TIME 0xf6
  57. #define F71808FG_FLAG_WDOUT_EN 7
  58. #define F71808FG_FLAG_WDTMOUT_STS 5
  59. #define F71808FG_FLAG_WD_EN 5
  60. #define F71808FG_FLAG_WD_PULSE 4
  61. #define F71808FG_FLAG_WD_UNIT 3
  62. /* Default values */
  63. #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
  64. #define WATCHDOG_MAX_TIMEOUT (60 * 255)
  65. #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
  66. watchdog signal */
  67. #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
  68. pin number 63 */
  69. static unsigned short force_id;
  70. module_param(force_id, ushort, 0);
  71. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  72. static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
  73. static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
  74. module_param(timeout, int, 0);
  75. MODULE_PARM_DESC(timeout,
  76. "Watchdog timeout in seconds. 1<= timeout <="
  77. __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
  78. __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  79. static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
  80. module_param(pulse_width, uint, 0);
  81. MODULE_PARM_DESC(pulse_width,
  82. "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
  83. " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
  84. static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
  85. module_param(f71862fg_pin, uint, 0);
  86. MODULE_PARM_DESC(f71862fg_pin,
  87. "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
  88. " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
  89. static int nowayout = WATCHDOG_NOWAYOUT;
  90. module_param(nowayout, bool, 0444);
  91. MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
  92. static unsigned int start_withtimeout;
  93. module_param(start_withtimeout, uint, 0);
  94. MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
  95. " given initial timeout. Zero (default) disables this feature.");
  96. enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
  97. static const char *f71808e_names[] = {
  98. "f71808fg",
  99. "f71858fg",
  100. "f71862fg",
  101. "f71869",
  102. "f71882fg",
  103. "f71889fg",
  104. };
  105. /* Super-I/O Function prototypes */
  106. static inline int superio_inb(int base, int reg);
  107. static inline int superio_inw(int base, int reg);
  108. static inline void superio_outb(int base, int reg, u8 val);
  109. static inline void superio_set_bit(int base, int reg, int bit);
  110. static inline void superio_clear_bit(int base, int reg, int bit);
  111. static inline int superio_enter(int base);
  112. static inline void superio_select(int base, int ld);
  113. static inline void superio_exit(int base);
  114. struct watchdog_data {
  115. unsigned short sioaddr;
  116. enum chips type;
  117. unsigned long opened;
  118. struct mutex lock;
  119. char expect_close;
  120. struct watchdog_info ident;
  121. unsigned short timeout;
  122. u8 timer_val; /* content for the wd_time register */
  123. char minutes_mode;
  124. u8 pulse_val; /* pulse width flag */
  125. char pulse_mode; /* enable pulse output mode? */
  126. char caused_reboot; /* last reboot was by the watchdog */
  127. };
  128. static struct watchdog_data watchdog = {
  129. .lock = __MUTEX_INITIALIZER(watchdog.lock),
  130. };
  131. /* Super I/O functions */
  132. static inline int superio_inb(int base, int reg)
  133. {
  134. outb(reg, base);
  135. return inb(base + 1);
  136. }
  137. static int superio_inw(int base, int reg)
  138. {
  139. int val;
  140. val = superio_inb(base, reg) << 8;
  141. val |= superio_inb(base, reg + 1);
  142. return val;
  143. }
  144. static inline void superio_outb(int base, int reg, u8 val)
  145. {
  146. outb(reg, base);
  147. outb(val, base + 1);
  148. }
  149. static inline void superio_set_bit(int base, int reg, int bit)
  150. {
  151. unsigned long val = superio_inb(base, reg);
  152. __set_bit(bit, &val);
  153. superio_outb(base, reg, val);
  154. }
  155. static inline void superio_clear_bit(int base, int reg, int bit)
  156. {
  157. unsigned long val = superio_inb(base, reg);
  158. __clear_bit(bit, &val);
  159. superio_outb(base, reg, val);
  160. }
  161. static inline int superio_enter(int base)
  162. {
  163. /* Don't step on other drivers' I/O space by accident */
  164. if (!request_muxed_region(base, 2, DRVNAME)) {
  165. printk(KERN_ERR DRVNAME ": I/O address 0x%04x already in use\n",
  166. (int)base);
  167. return -EBUSY;
  168. }
  169. /* according to the datasheet the key must be send twice! */
  170. outb(SIO_UNLOCK_KEY, base);
  171. outb(SIO_UNLOCK_KEY, base);
  172. return 0;
  173. }
  174. static inline void superio_select(int base, int ld)
  175. {
  176. outb(SIO_REG_LDSEL, base);
  177. outb(ld, base + 1);
  178. }
  179. static inline void superio_exit(int base)
  180. {
  181. outb(SIO_LOCK_KEY, base);
  182. release_region(base, 2);
  183. }
  184. static int watchdog_set_timeout(int timeout)
  185. {
  186. if (timeout <= 0
  187. || timeout > max_timeout) {
  188. printk(KERN_ERR DRVNAME ": watchdog timeout out of range\n");
  189. return -EINVAL;
  190. }
  191. mutex_lock(&watchdog.lock);
  192. watchdog.timeout = timeout;
  193. if (timeout > 0xff) {
  194. watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
  195. watchdog.minutes_mode = true;
  196. } else {
  197. watchdog.timer_val = timeout;
  198. watchdog.minutes_mode = false;
  199. }
  200. mutex_unlock(&watchdog.lock);
  201. return 0;
  202. }
  203. static int watchdog_set_pulse_width(unsigned int pw)
  204. {
  205. int err = 0;
  206. mutex_lock(&watchdog.lock);
  207. if (pw <= 1) {
  208. watchdog.pulse_val = 0;
  209. } else if (pw <= 25) {
  210. watchdog.pulse_val = 1;
  211. } else if (pw <= 125) {
  212. watchdog.pulse_val = 2;
  213. } else if (pw <= 5000) {
  214. watchdog.pulse_val = 3;
  215. } else {
  216. printk(KERN_ERR DRVNAME ": pulse width out of range\n");
  217. err = -EINVAL;
  218. goto exit_unlock;
  219. }
  220. watchdog.pulse_mode = pw;
  221. exit_unlock:
  222. mutex_unlock(&watchdog.lock);
  223. return err;
  224. }
  225. static int watchdog_keepalive(void)
  226. {
  227. int err = 0;
  228. mutex_lock(&watchdog.lock);
  229. err = superio_enter(watchdog.sioaddr);
  230. if (err)
  231. goto exit_unlock;
  232. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  233. if (watchdog.minutes_mode)
  234. /* select minutes for timer units */
  235. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  236. F71808FG_FLAG_WD_UNIT);
  237. else
  238. /* select seconds for timer units */
  239. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  240. F71808FG_FLAG_WD_UNIT);
  241. /* Set timer value */
  242. superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
  243. watchdog.timer_val);
  244. superio_exit(watchdog.sioaddr);
  245. exit_unlock:
  246. mutex_unlock(&watchdog.lock);
  247. return err;
  248. }
  249. static int f71862fg_pin_configure(unsigned short ioaddr)
  250. {
  251. /* When ioaddr is non-zero the calling function has to take care of
  252. mutex handling and superio preparation! */
  253. if (f71862fg_pin == 63) {
  254. if (ioaddr) {
  255. /* SPI must be disabled first to use this pin! */
  256. superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
  257. superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
  258. }
  259. } else if (f71862fg_pin == 56) {
  260. if (ioaddr)
  261. superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
  262. } else {
  263. printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",
  264. f71862fg_pin);
  265. return -EINVAL;
  266. }
  267. return 0;
  268. }
  269. static int watchdog_start(void)
  270. {
  271. /* Make sure we don't die as soon as the watchdog is enabled below */
  272. int err = watchdog_keepalive();
  273. if (err)
  274. return err;
  275. mutex_lock(&watchdog.lock);
  276. err = superio_enter(watchdog.sioaddr);
  277. if (err)
  278. goto exit_unlock;
  279. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  280. /* Watchdog pin configuration */
  281. switch (watchdog.type) {
  282. case f71808fg:
  283. /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
  284. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
  285. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
  286. break;
  287. case f71862fg:
  288. err = f71862fg_pin_configure(watchdog.sioaddr);
  289. if (err)
  290. goto exit_superio;
  291. break;
  292. case f71869:
  293. /* GPIO14 --> WDTRST# */
  294. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
  295. break;
  296. case f71882fg:
  297. /* Set pin 56 to WDTRST# */
  298. superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
  299. break;
  300. case f71889fg:
  301. /* set pin 40 to WDTRST# */
  302. superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
  303. superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
  304. break;
  305. default:
  306. /*
  307. * 'default' label to shut up the compiler and catch
  308. * programmer errors
  309. */
  310. err = -ENODEV;
  311. goto exit_superio;
  312. }
  313. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  314. superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
  315. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
  316. F71808FG_FLAG_WDOUT_EN);
  317. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  318. F71808FG_FLAG_WD_EN);
  319. if (watchdog.pulse_mode) {
  320. /* Select "pulse" output mode with given duration */
  321. u8 wdt_conf = superio_inb(watchdog.sioaddr,
  322. F71808FG_REG_WDT_CONF);
  323. /* Set WD_PSWIDTH bits (1:0) */
  324. wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
  325. /* Set WD_PULSE to "pulse" mode */
  326. wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
  327. superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  328. wdt_conf);
  329. } else {
  330. /* Select "level" output mode */
  331. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  332. F71808FG_FLAG_WD_PULSE);
  333. }
  334. exit_superio:
  335. superio_exit(watchdog.sioaddr);
  336. exit_unlock:
  337. mutex_unlock(&watchdog.lock);
  338. return err;
  339. }
  340. static int watchdog_stop(void)
  341. {
  342. int err = 0;
  343. mutex_lock(&watchdog.lock);
  344. err = superio_enter(watchdog.sioaddr);
  345. if (err)
  346. goto exit_unlock;
  347. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  348. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  349. F71808FG_FLAG_WD_EN);
  350. superio_exit(watchdog.sioaddr);
  351. exit_unlock:
  352. mutex_unlock(&watchdog.lock);
  353. return err;
  354. }
  355. static int watchdog_get_status(void)
  356. {
  357. int status = 0;
  358. mutex_lock(&watchdog.lock);
  359. status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
  360. mutex_unlock(&watchdog.lock);
  361. return status;
  362. }
  363. static bool watchdog_is_running(void)
  364. {
  365. /*
  366. * if we fail to determine the watchdog's status assume it to be
  367. * running to be on the safe side
  368. */
  369. bool is_running = true;
  370. mutex_lock(&watchdog.lock);
  371. if (superio_enter(watchdog.sioaddr))
  372. goto exit_unlock;
  373. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  374. is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
  375. && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
  376. & F71808FG_FLAG_WD_EN);
  377. superio_exit(watchdog.sioaddr);
  378. exit_unlock:
  379. mutex_unlock(&watchdog.lock);
  380. return is_running;
  381. }
  382. /* /dev/watchdog api */
  383. static int watchdog_open(struct inode *inode, struct file *file)
  384. {
  385. int err;
  386. /* If the watchdog is alive we don't need to start it again */
  387. if (test_and_set_bit(0, &watchdog.opened))
  388. return -EBUSY;
  389. err = watchdog_start();
  390. if (err) {
  391. clear_bit(0, &watchdog.opened);
  392. return err;
  393. }
  394. if (nowayout)
  395. __module_get(THIS_MODULE);
  396. watchdog.expect_close = 0;
  397. return nonseekable_open(inode, file);
  398. }
  399. static int watchdog_release(struct inode *inode, struct file *file)
  400. {
  401. clear_bit(0, &watchdog.opened);
  402. if (!watchdog.expect_close) {
  403. watchdog_keepalive();
  404. printk(KERN_CRIT DRVNAME
  405. ": Unexpected close, not stopping watchdog!\n");
  406. } else if (!nowayout) {
  407. watchdog_stop();
  408. }
  409. return 0;
  410. }
  411. /*
  412. * watchdog_write:
  413. * @file: file handle to the watchdog
  414. * @buf: buffer to write
  415. * @count: count of bytes
  416. * @ppos: pointer to the position to write. No seeks allowed
  417. *
  418. * A write to a watchdog device is defined as a keepalive signal. Any
  419. * write of data will do, as we we don't define content meaning.
  420. */
  421. static ssize_t watchdog_write(struct file *file, const char __user *buf,
  422. size_t count, loff_t *ppos)
  423. {
  424. if (count) {
  425. if (!nowayout) {
  426. size_t i;
  427. /* In case it was set long ago */
  428. bool expect_close = false;
  429. for (i = 0; i != count; i++) {
  430. char c;
  431. if (get_user(c, buf + i))
  432. return -EFAULT;
  433. expect_close = (c == 'V');
  434. }
  435. /* Properly order writes across fork()ed processes */
  436. mutex_lock(&watchdog.lock);
  437. watchdog.expect_close = expect_close;
  438. mutex_unlock(&watchdog.lock);
  439. }
  440. /* someone wrote to us, we should restart timer */
  441. watchdog_keepalive();
  442. }
  443. return count;
  444. }
  445. /*
  446. * watchdog_ioctl:
  447. * @inode: inode of the device
  448. * @file: file handle to the device
  449. * @cmd: watchdog command
  450. * @arg: argument pointer
  451. *
  452. * The watchdog API defines a common set of functions for all watchdogs
  453. * according to their available features.
  454. */
  455. static long watchdog_ioctl(struct file *file, unsigned int cmd,
  456. unsigned long arg)
  457. {
  458. int status;
  459. int new_options;
  460. int new_timeout;
  461. union {
  462. struct watchdog_info __user *ident;
  463. int __user *i;
  464. } uarg;
  465. uarg.i = (int __user *)arg;
  466. switch (cmd) {
  467. case WDIOC_GETSUPPORT:
  468. return copy_to_user(uarg.ident, &watchdog.ident,
  469. sizeof(watchdog.ident)) ? -EFAULT : 0;
  470. case WDIOC_GETSTATUS:
  471. status = watchdog_get_status();
  472. if (status < 0)
  473. return status;
  474. return put_user(status, uarg.i);
  475. case WDIOC_GETBOOTSTATUS:
  476. return put_user(0, uarg.i);
  477. case WDIOC_SETOPTIONS:
  478. if (get_user(new_options, uarg.i))
  479. return -EFAULT;
  480. if (new_options & WDIOS_DISABLECARD)
  481. watchdog_stop();
  482. if (new_options & WDIOS_ENABLECARD)
  483. return watchdog_start();
  484. case WDIOC_KEEPALIVE:
  485. watchdog_keepalive();
  486. return 0;
  487. case WDIOC_SETTIMEOUT:
  488. if (get_user(new_timeout, uarg.i))
  489. return -EFAULT;
  490. if (watchdog_set_timeout(new_timeout))
  491. return -EINVAL;
  492. watchdog_keepalive();
  493. /* Fall */
  494. case WDIOC_GETTIMEOUT:
  495. return put_user(watchdog.timeout, uarg.i);
  496. default:
  497. return -ENOTTY;
  498. }
  499. }
  500. static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
  501. void *unused)
  502. {
  503. if (code == SYS_DOWN || code == SYS_HALT)
  504. watchdog_stop();
  505. return NOTIFY_DONE;
  506. }
  507. static const struct file_operations watchdog_fops = {
  508. .owner = THIS_MODULE,
  509. .llseek = no_llseek,
  510. .open = watchdog_open,
  511. .release = watchdog_release,
  512. .write = watchdog_write,
  513. .unlocked_ioctl = watchdog_ioctl,
  514. };
  515. static struct miscdevice watchdog_miscdev = {
  516. .minor = WATCHDOG_MINOR,
  517. .name = "watchdog",
  518. .fops = &watchdog_fops,
  519. };
  520. static struct notifier_block watchdog_notifier = {
  521. .notifier_call = watchdog_notify_sys,
  522. };
  523. static int __init watchdog_init(int sioaddr)
  524. {
  525. int wdt_conf, err = 0;
  526. /* No need to lock watchdog.lock here because no entry points
  527. * into the module have been registered yet.
  528. */
  529. watchdog.sioaddr = sioaddr;
  530. watchdog.ident.options = WDIOC_SETTIMEOUT
  531. | WDIOF_MAGICCLOSE
  532. | WDIOF_KEEPALIVEPING;
  533. snprintf(watchdog.ident.identity,
  534. sizeof(watchdog.ident.identity), "%s watchdog",
  535. f71808e_names[watchdog.type]);
  536. err = superio_enter(sioaddr);
  537. if (err)
  538. return err;
  539. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  540. wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
  541. watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
  542. superio_exit(sioaddr);
  543. err = watchdog_set_timeout(timeout);
  544. if (err)
  545. return err;
  546. err = watchdog_set_pulse_width(pulse_width);
  547. if (err)
  548. return err;
  549. err = register_reboot_notifier(&watchdog_notifier);
  550. if (err)
  551. return err;
  552. err = misc_register(&watchdog_miscdev);
  553. if (err) {
  554. printk(KERN_ERR DRVNAME
  555. ": cannot register miscdev on minor=%d\n",
  556. watchdog_miscdev.minor);
  557. goto exit_reboot;
  558. }
  559. if (start_withtimeout) {
  560. if (start_withtimeout <= 0
  561. || start_withtimeout > max_timeout) {
  562. printk(KERN_ERR DRVNAME
  563. ": starting timeout out of range\n");
  564. err = -EINVAL;
  565. goto exit_miscdev;
  566. }
  567. err = watchdog_start();
  568. if (err) {
  569. printk(KERN_ERR DRVNAME
  570. ": cannot start watchdog timer\n");
  571. goto exit_miscdev;
  572. }
  573. mutex_lock(&watchdog.lock);
  574. err = superio_enter(sioaddr);
  575. if (err)
  576. goto exit_unlock;
  577. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  578. if (start_withtimeout > 0xff) {
  579. /* select minutes for timer units */
  580. superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
  581. F71808FG_FLAG_WD_UNIT);
  582. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  583. DIV_ROUND_UP(start_withtimeout, 60));
  584. } else {
  585. /* select seconds for timer units */
  586. superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
  587. F71808FG_FLAG_WD_UNIT);
  588. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  589. start_withtimeout);
  590. }
  591. superio_exit(sioaddr);
  592. mutex_unlock(&watchdog.lock);
  593. if (nowayout)
  594. __module_get(THIS_MODULE);
  595. printk(KERN_INFO DRVNAME
  596. ": watchdog started with initial timeout of %u sec\n",
  597. start_withtimeout);
  598. }
  599. return 0;
  600. exit_unlock:
  601. mutex_unlock(&watchdog.lock);
  602. exit_miscdev:
  603. misc_deregister(&watchdog_miscdev);
  604. exit_reboot:
  605. unregister_reboot_notifier(&watchdog_notifier);
  606. return err;
  607. }
  608. static int __init f71808e_find(int sioaddr)
  609. {
  610. u16 devid;
  611. int err = superio_enter(sioaddr);
  612. if (err)
  613. return err;
  614. devid = superio_inw(sioaddr, SIO_REG_MANID);
  615. if (devid != SIO_FINTEK_ID) {
  616. pr_debug(DRVNAME ": Not a Fintek device\n");
  617. err = -ENODEV;
  618. goto exit;
  619. }
  620. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  621. switch (devid) {
  622. case SIO_F71808_ID:
  623. watchdog.type = f71808fg;
  624. break;
  625. case SIO_F71862_ID:
  626. watchdog.type = f71862fg;
  627. err = f71862fg_pin_configure(0); /* validate module parameter */
  628. break;
  629. case SIO_F71869_ID:
  630. watchdog.type = f71869;
  631. break;
  632. case SIO_F71882_ID:
  633. watchdog.type = f71882fg;
  634. break;
  635. case SIO_F71889_ID:
  636. watchdog.type = f71889fg;
  637. break;
  638. case SIO_F71858_ID:
  639. /* Confirmed (by datasheet) not to have a watchdog. */
  640. err = -ENODEV;
  641. goto exit;
  642. default:
  643. printk(KERN_INFO DRVNAME ": Unrecognized Fintek device: %04x\n",
  644. (unsigned int)devid);
  645. err = -ENODEV;
  646. goto exit;
  647. }
  648. printk(KERN_INFO DRVNAME ": Found %s watchdog chip, revision %d\n",
  649. f71808e_names[watchdog.type],
  650. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  651. exit:
  652. superio_exit(sioaddr);
  653. return err;
  654. }
  655. static int __init f71808e_init(void)
  656. {
  657. static const unsigned short addrs[] = { 0x2e, 0x4e };
  658. int err = -ENODEV;
  659. int i;
  660. for (i = 0; i < ARRAY_SIZE(addrs); i++) {
  661. err = f71808e_find(addrs[i]);
  662. if (err == 0)
  663. break;
  664. }
  665. if (i == ARRAY_SIZE(addrs))
  666. return err;
  667. return watchdog_init(addrs[i]);
  668. }
  669. static void __exit f71808e_exit(void)
  670. {
  671. if (watchdog_is_running()) {
  672. printk(KERN_WARNING DRVNAME
  673. ": Watchdog timer still running, stopping it\n");
  674. watchdog_stop();
  675. }
  676. misc_deregister(&watchdog_miscdev);
  677. unregister_reboot_notifier(&watchdog_notifier);
  678. }
  679. MODULE_DESCRIPTION("F71808E Watchdog Driver");
  680. MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
  681. MODULE_LICENSE("GPL");
  682. module_init(f71808e_init);
  683. module_exit(f71808e_exit);