at91_udc.h 6.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183
  1. /*
  2. * Copyright (C) 2004 by Thomas Rathbone, HP Labs
  3. * Copyright (C) 2005 by Ivan Kokshaysky
  4. * Copyright (C) 2006 by SAN People
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the
  18. * Free Software Foundation, Inc.,
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #ifndef AT91_UDC_H
  22. #define AT91_UDC_H
  23. /*
  24. * USB Device Port (UDP) registers.
  25. * Based on AT91RM9200 datasheet revision E.
  26. */
  27. #define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
  28. #define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
  29. #define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
  30. #define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
  31. #define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
  32. #define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
  33. #define AT91_UDP_CONFG (1 << 1) /* Configured */
  34. #define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
  35. #define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
  36. #define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
  37. #define AT91_UDP_FADDR 0x08 /* Function Address Register */
  38. #define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
  39. #define AT91_UDP_FEN (1 << 8) /* Function Enable */
  40. #define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
  41. #define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
  42. #define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
  43. #define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
  44. #define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
  45. #define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
  46. #define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
  47. #define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status [AT91RM9200 only] */
  48. #define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
  49. #define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrupt Status */
  50. #define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status [AT91RM9200 only] */
  51. #define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
  52. #define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
  53. #define AT91_UDP_CSR(n) (0x30+((n)*4)) /* Endpoint Control/Status Registers 0-7 */
  54. #define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
  55. #define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
  56. #define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
  57. #define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
  58. #define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
  59. #define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
  60. #define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
  61. #define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
  62. #define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
  63. #define AT91_UDP_EPTYPE_CTRL (0 << 8)
  64. #define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
  65. #define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
  66. #define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
  67. #define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
  68. #define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
  69. #define AT91_UDP_EPTYPE_INT_IN (7 << 8)
  70. #define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
  71. #define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
  72. #define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
  73. #define AT91_UDP_FDR(n) (0x50+((n)*4)) /* Endpoint FIFO Data Registers 0-7 */
  74. #define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
  75. #define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
  76. #define AT91_UDP_TXVC_PUON (1 << 9) /* PullUp On [AT91SAM9260 only] */
  77. /*-------------------------------------------------------------------------*/
  78. /*
  79. * controller driver data structures
  80. */
  81. #define NUM_ENDPOINTS 6
  82. /*
  83. * hardware won't disable bus reset, or resume while the controller
  84. * is suspended ... watching suspend helps keep the logic symmetric.
  85. */
  86. #define MINIMUS_INTERRUPTUS \
  87. (AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)
  88. struct at91_ep {
  89. struct usb_ep ep;
  90. struct list_head queue;
  91. struct at91_udc *udc;
  92. void __iomem *creg;
  93. unsigned maxpacket:16;
  94. u8 int_mask;
  95. unsigned is_pingpong:1;
  96. unsigned stopped:1;
  97. unsigned is_in:1;
  98. unsigned is_iso:1;
  99. unsigned fifo_bank:1;
  100. const struct usb_endpoint_descriptor
  101. *desc;
  102. };
  103. /*
  104. * driver is non-SMP, and just blocks IRQs whenever it needs
  105. * access protection for chip registers or driver state
  106. */
  107. struct at91_udc {
  108. struct usb_gadget gadget;
  109. struct at91_ep ep[NUM_ENDPOINTS];
  110. struct usb_gadget_driver *driver;
  111. unsigned vbus:1;
  112. unsigned enabled:1;
  113. unsigned clocked:1;
  114. unsigned suspended:1;
  115. unsigned req_pending:1;
  116. unsigned wait_for_addr_ack:1;
  117. unsigned wait_for_config_ack:1;
  118. unsigned selfpowered:1;
  119. unsigned active_suspend:1;
  120. u8 addr;
  121. struct at91_udc_data board;
  122. struct clk *iclk, *fclk;
  123. struct platform_device *pdev;
  124. struct proc_dir_entry *pde;
  125. void __iomem *udp_baseaddr;
  126. int udp_irq;
  127. spinlock_t lock;
  128. struct timer_list vbus_timer;
  129. struct work_struct vbus_timer_work;
  130. };
  131. static inline struct at91_udc *to_udc(struct usb_gadget *g)
  132. {
  133. return container_of(g, struct at91_udc, gadget);
  134. }
  135. struct at91_request {
  136. struct usb_request req;
  137. struct list_head queue;
  138. };
  139. /*-------------------------------------------------------------------------*/
  140. #ifdef VERBOSE_DEBUG
  141. # define VDBG DBG
  142. #else
  143. # define VDBG(stuff...) do{}while(0)
  144. #endif
  145. #ifdef PACKET_TRACE
  146. # define PACKET VDBG
  147. #else
  148. # define PACKET(stuff...) do{}while(0)
  149. #endif
  150. #define ERR(stuff...) pr_err("udc: " stuff)
  151. #define WARNING(stuff...) pr_warning("udc: " stuff)
  152. #define INFO(stuff...) pr_info("udc: " stuff)
  153. #define DBG(stuff...) pr_debug("udc: " stuff)
  154. #endif