ti-ssp-spi.c 9.3 KB

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  1. /*
  2. * Sequencer Serial Port (SSP) based SPI master driver
  3. *
  4. * Copyright (C) 2010 Texas Instruments Inc
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/err.h>
  22. #include <linux/completion.h>
  23. #include <linux/delay.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/spi/spi.h>
  26. #include <linux/mfd/ti_ssp.h>
  27. #define MODE_BITS (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH)
  28. struct ti_ssp_spi {
  29. struct spi_master *master;
  30. struct device *dev;
  31. spinlock_t lock;
  32. struct list_head msg_queue;
  33. struct completion complete;
  34. bool shutdown;
  35. struct workqueue_struct *workqueue;
  36. struct work_struct work;
  37. u8 mode, bpw;
  38. int cs_active;
  39. u32 pc_en, pc_dis, pc_wr, pc_rd;
  40. void (*select)(int cs);
  41. };
  42. static u32 ti_ssp_spi_rx(struct ti_ssp_spi *hw)
  43. {
  44. u32 ret;
  45. ti_ssp_run(hw->dev, hw->pc_rd, 0, &ret);
  46. return ret;
  47. }
  48. static void ti_ssp_spi_tx(struct ti_ssp_spi *hw, u32 data)
  49. {
  50. ti_ssp_run(hw->dev, hw->pc_wr, data << (32 - hw->bpw), NULL);
  51. }
  52. static int ti_ssp_spi_txrx(struct ti_ssp_spi *hw, struct spi_message *msg,
  53. struct spi_transfer *t)
  54. {
  55. int count;
  56. if (hw->bpw <= 8) {
  57. u8 *rx = t->rx_buf;
  58. const u8 *tx = t->tx_buf;
  59. for (count = 0; count < t->len; count += 1) {
  60. if (t->tx_buf)
  61. ti_ssp_spi_tx(hw, *tx++);
  62. if (t->rx_buf)
  63. *rx++ = ti_ssp_spi_rx(hw);
  64. }
  65. } else if (hw->bpw <= 16) {
  66. u16 *rx = t->rx_buf;
  67. const u16 *tx = t->tx_buf;
  68. for (count = 0; count < t->len; count += 2) {
  69. if (t->tx_buf)
  70. ti_ssp_spi_tx(hw, *tx++);
  71. if (t->rx_buf)
  72. *rx++ = ti_ssp_spi_rx(hw);
  73. }
  74. } else {
  75. u32 *rx = t->rx_buf;
  76. const u32 *tx = t->tx_buf;
  77. for (count = 0; count < t->len; count += 4) {
  78. if (t->tx_buf)
  79. ti_ssp_spi_tx(hw, *tx++);
  80. if (t->rx_buf)
  81. *rx++ = ti_ssp_spi_rx(hw);
  82. }
  83. }
  84. msg->actual_length += count; /* bytes transferred */
  85. dev_dbg(&msg->spi->dev, "xfer %s%s, %d bytes, %d bpw, count %d%s\n",
  86. t->tx_buf ? "tx" : "", t->rx_buf ? "rx" : "", t->len,
  87. hw->bpw, count, (count < t->len) ? " (under)" : "");
  88. return (count < t->len) ? -EIO : 0; /* left over data */
  89. }
  90. static void ti_ssp_spi_chip_select(struct ti_ssp_spi *hw, int cs_active)
  91. {
  92. cs_active = !!cs_active;
  93. if (cs_active == hw->cs_active)
  94. return;
  95. ti_ssp_run(hw->dev, cs_active ? hw->pc_en : hw->pc_dis, 0, NULL);
  96. hw->cs_active = cs_active;
  97. }
  98. #define __SHIFT_OUT(bits) (SSP_OPCODE_SHIFT | SSP_OUT_MODE | \
  99. cs_en | clk | SSP_COUNT((bits) * 2 - 1))
  100. #define __SHIFT_IN(bits) (SSP_OPCODE_SHIFT | SSP_IN_MODE | \
  101. cs_en | clk | SSP_COUNT((bits) * 2 - 1))
  102. static int ti_ssp_spi_setup_transfer(struct ti_ssp_spi *hw, u8 bpw, u8 mode)
  103. {
  104. int error, idx = 0;
  105. u32 seqram[16];
  106. u32 cs_en, cs_dis, clk;
  107. u32 topbits, botbits;
  108. mode &= MODE_BITS;
  109. if (mode == hw->mode && bpw == hw->bpw)
  110. return 0;
  111. cs_en = (mode & SPI_CS_HIGH) ? SSP_CS_HIGH : SSP_CS_LOW;
  112. cs_dis = (mode & SPI_CS_HIGH) ? SSP_CS_LOW : SSP_CS_HIGH;
  113. clk = (mode & SPI_CPOL) ? SSP_CLK_HIGH : SSP_CLK_LOW;
  114. /* Construct instructions */
  115. /* Disable Chip Select */
  116. hw->pc_dis = idx;
  117. seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_dis | clk;
  118. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_dis | clk;
  119. /* Enable Chip Select */
  120. hw->pc_en = idx;
  121. seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_en | clk;
  122. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  123. /* Reads and writes need to be split for bpw > 16 */
  124. topbits = (bpw > 16) ? 16 : bpw;
  125. botbits = bpw - topbits;
  126. /* Write */
  127. hw->pc_wr = idx;
  128. seqram[idx++] = __SHIFT_OUT(topbits) | SSP_ADDR_REG;
  129. if (botbits)
  130. seqram[idx++] = __SHIFT_OUT(botbits) | SSP_DATA_REG;
  131. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  132. /* Read */
  133. hw->pc_rd = idx;
  134. if (botbits)
  135. seqram[idx++] = __SHIFT_IN(botbits) | SSP_ADDR_REG;
  136. seqram[idx++] = __SHIFT_IN(topbits) | SSP_DATA_REG;
  137. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  138. error = ti_ssp_load(hw->dev, 0, seqram, idx);
  139. if (error < 0)
  140. return error;
  141. error = ti_ssp_set_mode(hw->dev, ((mode & SPI_CPHA) ?
  142. 0 : SSP_EARLY_DIN));
  143. if (error < 0)
  144. return error;
  145. hw->bpw = bpw;
  146. hw->mode = mode;
  147. return error;
  148. }
  149. static void ti_ssp_spi_work(struct work_struct *work)
  150. {
  151. struct ti_ssp_spi *hw = container_of(work, struct ti_ssp_spi, work);
  152. spin_lock(&hw->lock);
  153. while (!list_empty(&hw->msg_queue)) {
  154. struct spi_message *m;
  155. struct spi_device *spi;
  156. struct spi_transfer *t = NULL;
  157. int status = 0;
  158. m = container_of(hw->msg_queue.next, struct spi_message,
  159. queue);
  160. list_del_init(&m->queue);
  161. spin_unlock(&hw->lock);
  162. spi = m->spi;
  163. if (hw->select)
  164. hw->select(spi->chip_select);
  165. list_for_each_entry(t, &m->transfers, transfer_list) {
  166. int bpw = spi->bits_per_word;
  167. int xfer_status;
  168. if (t->bits_per_word)
  169. bpw = t->bits_per_word;
  170. if (ti_ssp_spi_setup_transfer(hw, bpw, spi->mode) < 0)
  171. break;
  172. ti_ssp_spi_chip_select(hw, 1);
  173. xfer_status = ti_ssp_spi_txrx(hw, m, t);
  174. if (xfer_status < 0)
  175. status = xfer_status;
  176. if (t->delay_usecs)
  177. udelay(t->delay_usecs);
  178. if (t->cs_change)
  179. ti_ssp_spi_chip_select(hw, 0);
  180. }
  181. ti_ssp_spi_chip_select(hw, 0);
  182. m->status = status;
  183. m->complete(m->context);
  184. spin_lock(&hw->lock);
  185. }
  186. if (hw->shutdown)
  187. complete(&hw->complete);
  188. spin_unlock(&hw->lock);
  189. }
  190. static int ti_ssp_spi_setup(struct spi_device *spi)
  191. {
  192. if (spi->bits_per_word > 32)
  193. return -EINVAL;
  194. return 0;
  195. }
  196. static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
  197. {
  198. struct ti_ssp_spi *hw;
  199. struct spi_transfer *t;
  200. int error = 0;
  201. m->actual_length = 0;
  202. m->status = -EINPROGRESS;
  203. hw = spi_master_get_devdata(spi->master);
  204. if (list_empty(&m->transfers) || !m->complete)
  205. return -EINVAL;
  206. list_for_each_entry(t, &m->transfers, transfer_list) {
  207. if (t->len && !(t->rx_buf || t->tx_buf)) {
  208. dev_err(&spi->dev, "invalid xfer, no buffer\n");
  209. return -EINVAL;
  210. }
  211. if (t->len && t->rx_buf && t->tx_buf) {
  212. dev_err(&spi->dev, "invalid xfer, full duplex\n");
  213. return -EINVAL;
  214. }
  215. if (t->bits_per_word > 32) {
  216. dev_err(&spi->dev, "invalid xfer width %d\n",
  217. t->bits_per_word);
  218. return -EINVAL;
  219. }
  220. }
  221. spin_lock(&hw->lock);
  222. if (hw->shutdown) {
  223. error = -ESHUTDOWN;
  224. goto error_unlock;
  225. }
  226. list_add_tail(&m->queue, &hw->msg_queue);
  227. queue_work(hw->workqueue, &hw->work);
  228. error_unlock:
  229. spin_unlock(&hw->lock);
  230. return error;
  231. }
  232. static int __devinit ti_ssp_spi_probe(struct platform_device *pdev)
  233. {
  234. const struct ti_ssp_spi_data *pdata;
  235. struct ti_ssp_spi *hw;
  236. struct spi_master *master;
  237. struct device *dev = &pdev->dev;
  238. int error = 0;
  239. pdata = dev->platform_data;
  240. if (!pdata) {
  241. dev_err(dev, "platform data not found\n");
  242. return -EINVAL;
  243. }
  244. master = spi_alloc_master(dev, sizeof(struct ti_ssp_spi));
  245. if (!master) {
  246. dev_err(dev, "cannot allocate SPI master\n");
  247. return -ENOMEM;
  248. }
  249. hw = spi_master_get_devdata(master);
  250. platform_set_drvdata(pdev, hw);
  251. hw->master = master;
  252. hw->dev = dev;
  253. hw->select = pdata->select;
  254. spin_lock_init(&hw->lock);
  255. init_completion(&hw->complete);
  256. INIT_LIST_HEAD(&hw->msg_queue);
  257. INIT_WORK(&hw->work, ti_ssp_spi_work);
  258. hw->workqueue = create_singlethread_workqueue(dev_name(dev));
  259. if (!hw->workqueue) {
  260. error = -ENOMEM;
  261. dev_err(dev, "work queue creation failed\n");
  262. goto error_wq;
  263. }
  264. error = ti_ssp_set_iosel(hw->dev, pdata->iosel);
  265. if (error < 0) {
  266. dev_err(dev, "io setup failed\n");
  267. goto error_iosel;
  268. }
  269. master->bus_num = pdev->id;
  270. master->num_chipselect = pdata->num_cs;
  271. master->mode_bits = MODE_BITS;
  272. master->flags = SPI_MASTER_HALF_DUPLEX;
  273. master->setup = ti_ssp_spi_setup;
  274. master->transfer = ti_ssp_spi_transfer;
  275. error = spi_register_master(master);
  276. if (error) {
  277. dev_err(dev, "master registration failed\n");
  278. goto error_reg;
  279. }
  280. return 0;
  281. error_reg:
  282. error_iosel:
  283. destroy_workqueue(hw->workqueue);
  284. error_wq:
  285. spi_master_put(master);
  286. return error;
  287. }
  288. static int __devexit ti_ssp_spi_remove(struct platform_device *pdev)
  289. {
  290. struct ti_ssp_spi *hw = platform_get_drvdata(pdev);
  291. int error;
  292. hw->shutdown = 1;
  293. while (!list_empty(&hw->msg_queue)) {
  294. error = wait_for_completion_interruptible(&hw->complete);
  295. if (error < 0) {
  296. hw->shutdown = 0;
  297. return error;
  298. }
  299. }
  300. destroy_workqueue(hw->workqueue);
  301. spi_unregister_master(hw->master);
  302. return 0;
  303. }
  304. static struct platform_driver ti_ssp_spi_driver = {
  305. .probe = ti_ssp_spi_probe,
  306. .remove = __devexit_p(ti_ssp_spi_remove),
  307. .driver = {
  308. .name = "ti-ssp-spi",
  309. .owner = THIS_MODULE,
  310. },
  311. };
  312. static int __init ti_ssp_spi_init(void)
  313. {
  314. return platform_driver_register(&ti_ssp_spi_driver);
  315. }
  316. module_init(ti_ssp_spi_init);
  317. static void __exit ti_ssp_spi_exit(void)
  318. {
  319. platform_driver_unregister(&ti_ssp_spi_driver);
  320. }
  321. module_exit(ti_ssp_spi_exit);
  322. MODULE_DESCRIPTION("SSP SPI Master");
  323. MODULE_AUTHOR("Cyril Chemparathy");
  324. MODULE_LICENSE("GPL");
  325. MODULE_ALIAS("platform:ti-ssp-spi");