mac_esp.c 16 KB

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  1. /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
  2. *
  3. * Adapted from jazz_esp.c and the old mac_esp.c.
  4. *
  5. * The pseudo DMA algorithm is based on the one used in NetBSD.
  6. * See sys/arch/mac68k/obio/esp.c for some background information.
  7. *
  8. * Copyright (C) 2007-2008 Finn Thain
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/delay.h>
  19. #include <linux/io.h>
  20. #include <linux/nubus.h>
  21. #include <linux/slab.h>
  22. #include <asm/irq.h>
  23. #include <asm/dma.h>
  24. #include <asm/macints.h>
  25. #include <asm/macintosh.h>
  26. #include <scsi/scsi_host.h>
  27. #include "esp_scsi.h"
  28. #define DRV_MODULE_NAME "mac_esp"
  29. #define PFX DRV_MODULE_NAME ": "
  30. #define DRV_VERSION "1.000"
  31. #define DRV_MODULE_RELDATE "Sept 15, 2007"
  32. #define MAC_ESP_IO_BASE 0x50F00000
  33. #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
  34. #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
  35. #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
  36. #define MAC_ESP_REGS_SPACING 0x402
  37. #define MAC_ESP_PDMA_REG 0xF9800024
  38. #define MAC_ESP_PDMA_REG_SPACING 0x4
  39. #define MAC_ESP_PDMA_IO_OFFSET 0x100
  40. #define esp_read8(REG) mac_esp_read8(esp, REG)
  41. #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
  42. struct mac_esp_priv {
  43. struct esp *esp;
  44. void __iomem *pdma_regs;
  45. void __iomem *pdma_io;
  46. int error;
  47. };
  48. static struct esp *esp_chips[2];
  49. #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
  50. platform_get_drvdata((struct platform_device *) \
  51. (esp->dev)))
  52. static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
  53. {
  54. nubus_writeb(val, esp->regs + reg * 16);
  55. }
  56. static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
  57. {
  58. return nubus_readb(esp->regs + reg * 16);
  59. }
  60. /* For pseudo DMA and PIO we need the virtual address
  61. * so this address mapping is the identity mapping.
  62. */
  63. static dma_addr_t mac_esp_map_single(struct esp *esp, void *buf,
  64. size_t sz, int dir)
  65. {
  66. return (dma_addr_t)buf;
  67. }
  68. static int mac_esp_map_sg(struct esp *esp, struct scatterlist *sg,
  69. int num_sg, int dir)
  70. {
  71. int i;
  72. for (i = 0; i < num_sg; i++)
  73. sg[i].dma_address = (u32)sg_virt(&sg[i]);
  74. return num_sg;
  75. }
  76. static void mac_esp_unmap_single(struct esp *esp, dma_addr_t addr,
  77. size_t sz, int dir)
  78. {
  79. /* Nothing to do. */
  80. }
  81. static void mac_esp_unmap_sg(struct esp *esp, struct scatterlist *sg,
  82. int num_sg, int dir)
  83. {
  84. /* Nothing to do. */
  85. }
  86. static void mac_esp_reset_dma(struct esp *esp)
  87. {
  88. /* Nothing to do. */
  89. }
  90. static void mac_esp_dma_drain(struct esp *esp)
  91. {
  92. /* Nothing to do. */
  93. }
  94. static void mac_esp_dma_invalidate(struct esp *esp)
  95. {
  96. /* Nothing to do. */
  97. }
  98. static int mac_esp_dma_error(struct esp *esp)
  99. {
  100. return MAC_ESP_GET_PRIV(esp)->error;
  101. }
  102. static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
  103. {
  104. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  105. int i = 500000;
  106. do {
  107. if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
  108. return 0;
  109. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  110. return 1;
  111. udelay(2);
  112. } while (--i);
  113. printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
  114. esp_read8(ESP_STATUS));
  115. mep->error = 1;
  116. return 1;
  117. }
  118. static inline int mac_esp_wait_for_dreq(struct esp *esp)
  119. {
  120. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  121. int i = 500000;
  122. do {
  123. if (mep->pdma_regs == NULL) {
  124. if (mac_irq_pending(IRQ_MAC_SCSIDRQ))
  125. return 0;
  126. } else {
  127. if (nubus_readl(mep->pdma_regs) & 0x200)
  128. return 0;
  129. }
  130. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  131. return 1;
  132. udelay(2);
  133. } while (--i);
  134. printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
  135. esp_read8(ESP_STATUS));
  136. mep->error = 1;
  137. return 1;
  138. }
  139. #define MAC_ESP_PDMA_LOOP(operands) \
  140. asm volatile ( \
  141. " tstw %1 \n" \
  142. " jbeq 20f \n" \
  143. "1: movew " operands " \n" \
  144. "2: movew " operands " \n" \
  145. "3: movew " operands " \n" \
  146. "4: movew " operands " \n" \
  147. "5: movew " operands " \n" \
  148. "6: movew " operands " \n" \
  149. "7: movew " operands " \n" \
  150. "8: movew " operands " \n" \
  151. "9: movew " operands " \n" \
  152. "10: movew " operands " \n" \
  153. "11: movew " operands " \n" \
  154. "12: movew " operands " \n" \
  155. "13: movew " operands " \n" \
  156. "14: movew " operands " \n" \
  157. "15: movew " operands " \n" \
  158. "16: movew " operands " \n" \
  159. " subqw #1,%1 \n" \
  160. " jbne 1b \n" \
  161. "20: tstw %2 \n" \
  162. " jbeq 30f \n" \
  163. "21: movew " operands " \n" \
  164. " subqw #1,%2 \n" \
  165. " jbne 21b \n" \
  166. "30: tstw %3 \n" \
  167. " jbeq 40f \n" \
  168. "31: moveb " operands " \n" \
  169. "32: nop \n" \
  170. "40: \n" \
  171. " \n" \
  172. " .section __ex_table,\"a\" \n" \
  173. " .align 4 \n" \
  174. " .long 1b,40b \n" \
  175. " .long 2b,40b \n" \
  176. " .long 3b,40b \n" \
  177. " .long 4b,40b \n" \
  178. " .long 5b,40b \n" \
  179. " .long 6b,40b \n" \
  180. " .long 7b,40b \n" \
  181. " .long 8b,40b \n" \
  182. " .long 9b,40b \n" \
  183. " .long 10b,40b \n" \
  184. " .long 11b,40b \n" \
  185. " .long 12b,40b \n" \
  186. " .long 13b,40b \n" \
  187. " .long 14b,40b \n" \
  188. " .long 15b,40b \n" \
  189. " .long 16b,40b \n" \
  190. " .long 21b,40b \n" \
  191. " .long 31b,40b \n" \
  192. " .long 32b,40b \n" \
  193. " .previous \n" \
  194. : "+a" (addr), "+r" (count32), "+r" (count2) \
  195. : "g" (count1), "a" (mep->pdma_io))
  196. static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
  197. u32 dma_count, int write, u8 cmd)
  198. {
  199. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  200. unsigned long flags;
  201. local_irq_save(flags);
  202. mep->error = 0;
  203. if (!write)
  204. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  205. esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
  206. esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
  207. scsi_esp_cmd(esp, cmd);
  208. do {
  209. unsigned int count32 = esp_count >> 5;
  210. unsigned int count2 = (esp_count & 0x1F) >> 1;
  211. unsigned int count1 = esp_count & 1;
  212. unsigned int start_addr = addr;
  213. if (mac_esp_wait_for_dreq(esp))
  214. break;
  215. if (write) {
  216. MAC_ESP_PDMA_LOOP("%4@,%0@+");
  217. esp_count -= addr - start_addr;
  218. } else {
  219. unsigned int n;
  220. MAC_ESP_PDMA_LOOP("%0@+,%4@");
  221. if (mac_esp_wait_for_empty_fifo(esp))
  222. break;
  223. n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
  224. addr = start_addr + esp_count - n;
  225. esp_count = n;
  226. }
  227. } while (esp_count);
  228. local_irq_restore(flags);
  229. }
  230. /*
  231. * Programmed IO routines follow.
  232. */
  233. static inline unsigned int mac_esp_wait_for_fifo(struct esp *esp)
  234. {
  235. int i = 500000;
  236. do {
  237. unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  238. if (fbytes)
  239. return fbytes;
  240. udelay(2);
  241. } while (--i);
  242. printk(KERN_ERR PFX "FIFO is empty (sreg %02x)\n",
  243. esp_read8(ESP_STATUS));
  244. return 0;
  245. }
  246. static inline int mac_esp_wait_for_intr(struct esp *esp)
  247. {
  248. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  249. int i = 500000;
  250. do {
  251. esp->sreg = esp_read8(ESP_STATUS);
  252. if (esp->sreg & ESP_STAT_INTR)
  253. return 0;
  254. udelay(2);
  255. } while (--i);
  256. printk(KERN_ERR PFX "IRQ timeout (sreg %02x)\n", esp->sreg);
  257. mep->error = 1;
  258. return 1;
  259. }
  260. #define MAC_ESP_PIO_LOOP(operands, reg1) \
  261. asm volatile ( \
  262. "1: moveb " operands " \n" \
  263. " subqw #1,%1 \n" \
  264. " jbne 1b \n" \
  265. : "+a" (addr), "+r" (reg1) \
  266. : "a" (fifo))
  267. #define MAC_ESP_PIO_FILL(operands, reg1) \
  268. asm volatile ( \
  269. " moveb " operands " \n" \
  270. " moveb " operands " \n" \
  271. " moveb " operands " \n" \
  272. " moveb " operands " \n" \
  273. " moveb " operands " \n" \
  274. " moveb " operands " \n" \
  275. " moveb " operands " \n" \
  276. " moveb " operands " \n" \
  277. " moveb " operands " \n" \
  278. " moveb " operands " \n" \
  279. " moveb " operands " \n" \
  280. " moveb " operands " \n" \
  281. " moveb " operands " \n" \
  282. " moveb " operands " \n" \
  283. " moveb " operands " \n" \
  284. " moveb " operands " \n" \
  285. " subqw #8,%1 \n" \
  286. " subqw #8,%1 \n" \
  287. : "+a" (addr), "+r" (reg1) \
  288. : "a" (fifo))
  289. #define MAC_ESP_FIFO_SIZE 16
  290. static void mac_esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
  291. u32 dma_count, int write, u8 cmd)
  292. {
  293. struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
  294. u8 *fifo = esp->regs + ESP_FDATA * 16;
  295. disable_irq(esp->host->irq);
  296. cmd &= ~ESP_CMD_DMA;
  297. mep->error = 0;
  298. if (write) {
  299. scsi_esp_cmd(esp, cmd);
  300. while (1) {
  301. unsigned int n;
  302. n = mac_esp_wait_for_fifo(esp);
  303. if (!n)
  304. break;
  305. if (n > esp_count)
  306. n = esp_count;
  307. esp_count -= n;
  308. MAC_ESP_PIO_LOOP("%2@,%0@+", n);
  309. if (!esp_count)
  310. break;
  311. if (mac_esp_wait_for_intr(esp))
  312. break;
  313. if (((esp->sreg & ESP_STAT_PMASK) != ESP_DIP) &&
  314. ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP))
  315. break;
  316. esp->ireg = esp_read8(ESP_INTRPT);
  317. if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
  318. ESP_INTR_BSERV)
  319. break;
  320. scsi_esp_cmd(esp, ESP_CMD_TI);
  321. }
  322. } else {
  323. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  324. if (esp_count >= MAC_ESP_FIFO_SIZE)
  325. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  326. else
  327. MAC_ESP_PIO_LOOP("%0@+,%2@", esp_count);
  328. scsi_esp_cmd(esp, cmd);
  329. while (esp_count) {
  330. unsigned int n;
  331. if (mac_esp_wait_for_intr(esp))
  332. break;
  333. if (((esp->sreg & ESP_STAT_PMASK) != ESP_DOP) &&
  334. ((esp->sreg & ESP_STAT_PMASK) != ESP_MOP))
  335. break;
  336. esp->ireg = esp_read8(ESP_INTRPT);
  337. if ((esp->ireg & (ESP_INTR_DC | ESP_INTR_BSERV)) !=
  338. ESP_INTR_BSERV)
  339. break;
  340. n = MAC_ESP_FIFO_SIZE -
  341. (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
  342. if (n > esp_count)
  343. n = esp_count;
  344. if (n == MAC_ESP_FIFO_SIZE) {
  345. MAC_ESP_PIO_FILL("%0@+,%2@", esp_count);
  346. } else {
  347. esp_count -= n;
  348. MAC_ESP_PIO_LOOP("%0@+,%2@", n);
  349. }
  350. scsi_esp_cmd(esp, ESP_CMD_TI);
  351. }
  352. }
  353. enable_irq(esp->host->irq);
  354. }
  355. static int mac_esp_irq_pending(struct esp *esp)
  356. {
  357. if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
  358. return 1;
  359. return 0;
  360. }
  361. static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  362. {
  363. return dma_len > 0xFFFF ? 0xFFFF : dma_len;
  364. }
  365. static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
  366. {
  367. int got_intr;
  368. /*
  369. * This is an edge triggered IRQ, so we have to be careful to
  370. * avoid missing a transition when it is shared by two ESP devices.
  371. */
  372. do {
  373. got_intr = 0;
  374. if (esp_chips[0] &&
  375. (mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
  376. (void)scsi_esp_intr(irq, esp_chips[0]);
  377. got_intr = 1;
  378. }
  379. if (esp_chips[1] &&
  380. (mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
  381. (void)scsi_esp_intr(irq, esp_chips[1]);
  382. got_intr = 1;
  383. }
  384. } while (got_intr);
  385. return IRQ_HANDLED;
  386. }
  387. static struct esp_driver_ops mac_esp_ops = {
  388. .esp_write8 = mac_esp_write8,
  389. .esp_read8 = mac_esp_read8,
  390. .map_single = mac_esp_map_single,
  391. .map_sg = mac_esp_map_sg,
  392. .unmap_single = mac_esp_unmap_single,
  393. .unmap_sg = mac_esp_unmap_sg,
  394. .irq_pending = mac_esp_irq_pending,
  395. .dma_length_limit = mac_esp_dma_length_limit,
  396. .reset_dma = mac_esp_reset_dma,
  397. .dma_drain = mac_esp_dma_drain,
  398. .dma_invalidate = mac_esp_dma_invalidate,
  399. .send_dma_cmd = mac_esp_send_pdma_cmd,
  400. .dma_error = mac_esp_dma_error,
  401. };
  402. static int __devinit esp_mac_probe(struct platform_device *dev)
  403. {
  404. struct scsi_host_template *tpnt = &scsi_esp_template;
  405. struct Scsi_Host *host;
  406. struct esp *esp;
  407. int err;
  408. struct mac_esp_priv *mep;
  409. if (!MACH_IS_MAC)
  410. return -ENODEV;
  411. if (dev->id > 1)
  412. return -ENODEV;
  413. host = scsi_host_alloc(tpnt, sizeof(struct esp));
  414. err = -ENOMEM;
  415. if (!host)
  416. goto fail;
  417. host->max_id = 8;
  418. host->use_clustering = DISABLE_CLUSTERING;
  419. esp = shost_priv(host);
  420. esp->host = host;
  421. esp->dev = dev;
  422. esp->command_block = kzalloc(16, GFP_KERNEL);
  423. if (!esp->command_block)
  424. goto fail_unlink;
  425. esp->command_block_dma = (dma_addr_t)esp->command_block;
  426. esp->scsi_id = 7;
  427. host->this_id = esp->scsi_id;
  428. esp->scsi_id_mask = 1 << esp->scsi_id;
  429. mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
  430. if (!mep)
  431. goto fail_free_command_block;
  432. mep->esp = esp;
  433. platform_set_drvdata(dev, mep);
  434. switch (macintosh_config->scsi_type) {
  435. case MAC_SCSI_QUADRA:
  436. esp->cfreq = 16500000;
  437. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
  438. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  439. mep->pdma_regs = NULL;
  440. break;
  441. case MAC_SCSI_QUADRA2:
  442. esp->cfreq = 25000000;
  443. esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
  444. dev->id * MAC_ESP_REGS_SPACING);
  445. mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
  446. mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
  447. dev->id * MAC_ESP_PDMA_REG_SPACING);
  448. nubus_writel(0x1d1, mep->pdma_regs);
  449. break;
  450. case MAC_SCSI_QUADRA3:
  451. /* These quadras have a real DMA controller (the PSC) but we
  452. * don't know how to drive it so we must use PIO instead.
  453. */
  454. esp->cfreq = 25000000;
  455. esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
  456. mep->pdma_io = NULL;
  457. mep->pdma_regs = NULL;
  458. break;
  459. }
  460. esp->ops = &mac_esp_ops;
  461. if (mep->pdma_io == NULL) {
  462. printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
  463. esp_write8(0, ESP_TCLOW);
  464. esp_write8(0, ESP_TCMED);
  465. esp->flags = ESP_FLAG_DISABLE_SYNC;
  466. mac_esp_ops.send_dma_cmd = mac_esp_send_pio_cmd;
  467. } else {
  468. printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
  469. }
  470. host->irq = IRQ_MAC_SCSI;
  471. esp_chips[dev->id] = esp;
  472. mb();
  473. if (esp_chips[!dev->id] == NULL) {
  474. err = request_irq(host->irq, mac_scsi_esp_intr, 0,
  475. "Mac ESP", NULL);
  476. if (err < 0) {
  477. esp_chips[dev->id] = NULL;
  478. goto fail_free_priv;
  479. }
  480. }
  481. err = scsi_esp_register(esp, &dev->dev);
  482. if (err)
  483. goto fail_free_irq;
  484. return 0;
  485. fail_free_irq:
  486. if (esp_chips[!dev->id] == NULL)
  487. free_irq(host->irq, esp);
  488. fail_free_priv:
  489. kfree(mep);
  490. fail_free_command_block:
  491. kfree(esp->command_block);
  492. fail_unlink:
  493. scsi_host_put(host);
  494. fail:
  495. return err;
  496. }
  497. static int __devexit esp_mac_remove(struct platform_device *dev)
  498. {
  499. struct mac_esp_priv *mep = platform_get_drvdata(dev);
  500. struct esp *esp = mep->esp;
  501. unsigned int irq = esp->host->irq;
  502. scsi_esp_unregister(esp);
  503. esp_chips[dev->id] = NULL;
  504. if (!(esp_chips[0] || esp_chips[1]))
  505. free_irq(irq, NULL);
  506. kfree(mep);
  507. kfree(esp->command_block);
  508. scsi_host_put(esp->host);
  509. return 0;
  510. }
  511. static struct platform_driver esp_mac_driver = {
  512. .probe = esp_mac_probe,
  513. .remove = __devexit_p(esp_mac_remove),
  514. .driver = {
  515. .name = DRV_MODULE_NAME,
  516. .owner = THIS_MODULE,
  517. },
  518. };
  519. static int __init mac_esp_init(void)
  520. {
  521. return platform_driver_register(&esp_mac_driver);
  522. }
  523. static void __exit mac_esp_exit(void)
  524. {
  525. platform_driver_unregister(&esp_mac_driver);
  526. }
  527. MODULE_DESCRIPTION("Mac ESP SCSI driver");
  528. MODULE_AUTHOR("Finn Thain <fthain@telegraphics.com.au>");
  529. MODULE_LICENSE("GPL v2");
  530. MODULE_VERSION(DRV_VERSION);
  531. MODULE_ALIAS("platform:" DRV_MODULE_NAME);
  532. module_init(mac_esp_init);
  533. module_exit(mac_esp_exit);