rtc-s3c.c 15 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <asm/irq.h>
  31. #include <plat/regs-rtc.h>
  32. enum s3c_cpu_type {
  33. TYPE_S3C2410,
  34. TYPE_S3C64XX,
  35. };
  36. /* I have yet to find an S3C implementation with more than one
  37. * of these rtc blocks in */
  38. static struct resource *s3c_rtc_mem;
  39. static struct clk *rtc_clk;
  40. static void __iomem *s3c_rtc_base;
  41. static int s3c_rtc_alarmno = NO_IRQ;
  42. static int s3c_rtc_tickno = NO_IRQ;
  43. static bool wake_en;
  44. static enum s3c_cpu_type s3c_rtc_cpu_type;
  45. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  46. /* IRQ Handlers */
  47. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  48. {
  49. struct rtc_device *rdev = id;
  50. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  51. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  52. writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
  53. return IRQ_HANDLED;
  54. }
  55. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  56. {
  57. struct rtc_device *rdev = id;
  58. rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
  59. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  60. writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
  61. return IRQ_HANDLED;
  62. }
  63. /* Update control registers */
  64. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  65. {
  66. unsigned int tmp;
  67. pr_debug("%s: aie=%d\n", __func__, enabled);
  68. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  69. if (enabled)
  70. tmp |= S3C2410_RTCALM_ALMEN;
  71. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  72. return 0;
  73. }
  74. static int s3c_rtc_setfreq(struct device *dev, int freq)
  75. {
  76. struct platform_device *pdev = to_platform_device(dev);
  77. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  78. unsigned int tmp = 0;
  79. if (!is_power_of_2(freq))
  80. return -EINVAL;
  81. spin_lock_irq(&s3c_rtc_pie_lock);
  82. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  83. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  84. tmp &= S3C2410_TICNT_ENABLE;
  85. }
  86. tmp |= (rtc_dev->max_user_freq / freq)-1;
  87. writel(tmp, s3c_rtc_base + S3C2410_TICNT);
  88. spin_unlock_irq(&s3c_rtc_pie_lock);
  89. return 0;
  90. }
  91. /* Time read/write */
  92. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  93. {
  94. unsigned int have_retried = 0;
  95. void __iomem *base = s3c_rtc_base;
  96. retry_get_time:
  97. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  98. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  99. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  100. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  101. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  102. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  103. /* the only way to work out wether the system was mid-update
  104. * when we read it is to check the second counter, and if it
  105. * is zero, then we re-try the entire read
  106. */
  107. if (rtc_tm->tm_sec == 0 && !have_retried) {
  108. have_retried = 1;
  109. goto retry_get_time;
  110. }
  111. pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
  112. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  113. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  114. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  115. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  116. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  117. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  118. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  119. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  120. rtc_tm->tm_year += 100;
  121. rtc_tm->tm_mon -= 1;
  122. return rtc_valid_tm(rtc_tm);
  123. }
  124. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  125. {
  126. void __iomem *base = s3c_rtc_base;
  127. int year = tm->tm_year - 100;
  128. pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
  129. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  130. tm->tm_hour, tm->tm_min, tm->tm_sec);
  131. /* we get around y2k by simply not supporting it */
  132. if (year < 0 || year >= 100) {
  133. dev_err(dev, "rtc only supports 100 years\n");
  134. return -EINVAL;
  135. }
  136. writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
  137. writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
  138. writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
  139. writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
  140. writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
  141. writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
  142. return 0;
  143. }
  144. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  145. {
  146. struct rtc_time *alm_tm = &alrm->time;
  147. void __iomem *base = s3c_rtc_base;
  148. unsigned int alm_en;
  149. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  150. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  151. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  152. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  153. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  154. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  155. alm_en = readb(base + S3C2410_RTCALM);
  156. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  157. pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  158. alm_en,
  159. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  160. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  161. /* decode the alarm enable field */
  162. if (alm_en & S3C2410_RTCALM_SECEN)
  163. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  164. else
  165. alm_tm->tm_sec = -1;
  166. if (alm_en & S3C2410_RTCALM_MINEN)
  167. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  168. else
  169. alm_tm->tm_min = -1;
  170. if (alm_en & S3C2410_RTCALM_HOUREN)
  171. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  172. else
  173. alm_tm->tm_hour = -1;
  174. if (alm_en & S3C2410_RTCALM_DAYEN)
  175. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  176. else
  177. alm_tm->tm_mday = -1;
  178. if (alm_en & S3C2410_RTCALM_MONEN) {
  179. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  180. alm_tm->tm_mon -= 1;
  181. } else {
  182. alm_tm->tm_mon = -1;
  183. }
  184. if (alm_en & S3C2410_RTCALM_YEAREN)
  185. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  186. else
  187. alm_tm->tm_year = -1;
  188. return 0;
  189. }
  190. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  191. {
  192. struct rtc_time *tm = &alrm->time;
  193. void __iomem *base = s3c_rtc_base;
  194. unsigned int alrm_en;
  195. pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  196. alrm->enabled,
  197. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  198. tm->tm_hour, tm->tm_min, tm->tm_sec);
  199. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  200. writeb(0x00, base + S3C2410_RTCALM);
  201. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  202. alrm_en |= S3C2410_RTCALM_SECEN;
  203. writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
  204. }
  205. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  206. alrm_en |= S3C2410_RTCALM_MINEN;
  207. writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
  208. }
  209. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  210. alrm_en |= S3C2410_RTCALM_HOUREN;
  211. writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
  212. }
  213. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  214. writeb(alrm_en, base + S3C2410_RTCALM);
  215. s3c_rtc_setaie(dev, alrm->enabled);
  216. return 0;
  217. }
  218. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  219. {
  220. unsigned int ticnt;
  221. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  222. ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
  223. ticnt &= S3C64XX_RTCCON_TICEN;
  224. } else {
  225. ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  226. ticnt &= S3C2410_TICNT_ENABLE;
  227. }
  228. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  229. return 0;
  230. }
  231. static int s3c_rtc_open(struct device *dev)
  232. {
  233. struct platform_device *pdev = to_platform_device(dev);
  234. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  235. int ret;
  236. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  237. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  238. if (ret) {
  239. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  240. return ret;
  241. }
  242. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  243. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  244. if (ret) {
  245. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  246. goto tick_err;
  247. }
  248. return ret;
  249. tick_err:
  250. free_irq(s3c_rtc_alarmno, rtc_dev);
  251. return ret;
  252. }
  253. static void s3c_rtc_release(struct device *dev)
  254. {
  255. struct platform_device *pdev = to_platform_device(dev);
  256. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  257. /* do not clear AIE here, it may be needed for wake */
  258. free_irq(s3c_rtc_alarmno, rtc_dev);
  259. free_irq(s3c_rtc_tickno, rtc_dev);
  260. }
  261. static const struct rtc_class_ops s3c_rtcops = {
  262. .open = s3c_rtc_open,
  263. .release = s3c_rtc_release,
  264. .read_time = s3c_rtc_gettime,
  265. .set_time = s3c_rtc_settime,
  266. .read_alarm = s3c_rtc_getalarm,
  267. .set_alarm = s3c_rtc_setalarm,
  268. .proc = s3c_rtc_proc,
  269. .alarm_irq_enable = s3c_rtc_setaie,
  270. };
  271. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  272. {
  273. void __iomem *base = s3c_rtc_base;
  274. unsigned int tmp;
  275. if (s3c_rtc_base == NULL)
  276. return;
  277. if (!en) {
  278. tmp = readw(base + S3C2410_RTCCON);
  279. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  280. tmp &= ~S3C64XX_RTCCON_TICEN;
  281. tmp &= ~S3C2410_RTCCON_RTCEN;
  282. writew(tmp, base + S3C2410_RTCCON);
  283. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  284. tmp = readb(base + S3C2410_TICNT);
  285. tmp &= ~S3C2410_TICNT_ENABLE;
  286. writeb(tmp, base + S3C2410_TICNT);
  287. }
  288. } else {
  289. /* re-enable the device, and check it is ok */
  290. if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
  291. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  292. tmp = readw(base + S3C2410_RTCCON);
  293. writew(tmp | S3C2410_RTCCON_RTCEN,
  294. base + S3C2410_RTCCON);
  295. }
  296. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
  297. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  298. tmp = readw(base + S3C2410_RTCCON);
  299. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  300. base + S3C2410_RTCCON);
  301. }
  302. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
  303. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  304. tmp = readw(base + S3C2410_RTCCON);
  305. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  306. base + S3C2410_RTCCON);
  307. }
  308. }
  309. }
  310. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  311. {
  312. struct rtc_device *rtc = platform_get_drvdata(dev);
  313. platform_set_drvdata(dev, NULL);
  314. rtc_device_unregister(rtc);
  315. s3c_rtc_setaie(&dev->dev, 0);
  316. clk_disable(rtc_clk);
  317. clk_put(rtc_clk);
  318. rtc_clk = NULL;
  319. iounmap(s3c_rtc_base);
  320. release_resource(s3c_rtc_mem);
  321. kfree(s3c_rtc_mem);
  322. return 0;
  323. }
  324. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  325. {
  326. struct rtc_device *rtc;
  327. struct rtc_time rtc_tm;
  328. struct resource *res;
  329. int ret;
  330. pr_debug("%s: probe=%p\n", __func__, pdev);
  331. /* find the IRQs */
  332. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  333. if (s3c_rtc_tickno < 0) {
  334. dev_err(&pdev->dev, "no irq for rtc tick\n");
  335. return -ENOENT;
  336. }
  337. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  338. if (s3c_rtc_alarmno < 0) {
  339. dev_err(&pdev->dev, "no irq for alarm\n");
  340. return -ENOENT;
  341. }
  342. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  343. s3c_rtc_tickno, s3c_rtc_alarmno);
  344. /* get the memory region */
  345. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  346. if (res == NULL) {
  347. dev_err(&pdev->dev, "failed to get memory region resource\n");
  348. return -ENOENT;
  349. }
  350. s3c_rtc_mem = request_mem_region(res->start,
  351. res->end-res->start+1,
  352. pdev->name);
  353. if (s3c_rtc_mem == NULL) {
  354. dev_err(&pdev->dev, "failed to reserve memory region\n");
  355. ret = -ENOENT;
  356. goto err_nores;
  357. }
  358. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  359. if (s3c_rtc_base == NULL) {
  360. dev_err(&pdev->dev, "failed ioremap()\n");
  361. ret = -EINVAL;
  362. goto err_nomap;
  363. }
  364. rtc_clk = clk_get(&pdev->dev, "rtc");
  365. if (IS_ERR(rtc_clk)) {
  366. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  367. ret = PTR_ERR(rtc_clk);
  368. rtc_clk = NULL;
  369. goto err_clk;
  370. }
  371. clk_enable(rtc_clk);
  372. /* check to see if everything is setup correctly */
  373. s3c_rtc_enable(pdev, 1);
  374. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  375. readw(s3c_rtc_base + S3C2410_RTCCON));
  376. device_init_wakeup(&pdev->dev, 1);
  377. /* register RTC and exit */
  378. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  379. THIS_MODULE);
  380. if (IS_ERR(rtc)) {
  381. dev_err(&pdev->dev, "cannot attach rtc\n");
  382. ret = PTR_ERR(rtc);
  383. goto err_nortc;
  384. }
  385. s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
  386. /* Check RTC Time */
  387. s3c_rtc_gettime(NULL, &rtc_tm);
  388. if (rtc_valid_tm(&rtc_tm)) {
  389. rtc_tm.tm_year = 100;
  390. rtc_tm.tm_mon = 0;
  391. rtc_tm.tm_mday = 1;
  392. rtc_tm.tm_hour = 0;
  393. rtc_tm.tm_min = 0;
  394. rtc_tm.tm_sec = 0;
  395. s3c_rtc_settime(NULL, &rtc_tm);
  396. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  397. }
  398. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  399. rtc->max_user_freq = 32768;
  400. else
  401. rtc->max_user_freq = 128;
  402. platform_set_drvdata(pdev, rtc);
  403. s3c_rtc_setfreq(&pdev->dev, 1);
  404. return 0;
  405. err_nortc:
  406. s3c_rtc_enable(pdev, 0);
  407. clk_disable(rtc_clk);
  408. clk_put(rtc_clk);
  409. err_clk:
  410. iounmap(s3c_rtc_base);
  411. err_nomap:
  412. release_resource(s3c_rtc_mem);
  413. err_nores:
  414. return ret;
  415. }
  416. #ifdef CONFIG_PM
  417. /* RTC Power management control */
  418. static int ticnt_save, ticnt_en_save;
  419. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  420. {
  421. /* save TICNT for anyone using periodic interrupts */
  422. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  423. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  424. ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
  425. ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  426. }
  427. s3c_rtc_enable(pdev, 0);
  428. if (device_may_wakeup(&pdev->dev) && !wake_en) {
  429. if (enable_irq_wake(s3c_rtc_alarmno) == 0)
  430. wake_en = true;
  431. else
  432. dev_err(&pdev->dev, "enable_irq_wake failed\n");
  433. }
  434. return 0;
  435. }
  436. static int s3c_rtc_resume(struct platform_device *pdev)
  437. {
  438. unsigned int tmp;
  439. s3c_rtc_enable(pdev, 1);
  440. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  441. if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
  442. tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
  443. writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
  444. }
  445. if (device_may_wakeup(&pdev->dev) && wake_en) {
  446. disable_irq_wake(s3c_rtc_alarmno);
  447. wake_en = false;
  448. }
  449. return 0;
  450. }
  451. #else
  452. #define s3c_rtc_suspend NULL
  453. #define s3c_rtc_resume NULL
  454. #endif
  455. static struct platform_device_id s3c_rtc_driver_ids[] = {
  456. {
  457. .name = "s3c2410-rtc",
  458. .driver_data = TYPE_S3C2410,
  459. }, {
  460. .name = "s3c64xx-rtc",
  461. .driver_data = TYPE_S3C64XX,
  462. },
  463. { }
  464. };
  465. MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
  466. static struct platform_driver s3c_rtc_driver = {
  467. .probe = s3c_rtc_probe,
  468. .remove = __devexit_p(s3c_rtc_remove),
  469. .suspend = s3c_rtc_suspend,
  470. .resume = s3c_rtc_resume,
  471. .id_table = s3c_rtc_driver_ids,
  472. .driver = {
  473. .name = "s3c-rtc",
  474. .owner = THIS_MODULE,
  475. },
  476. };
  477. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  478. static int __init s3c_rtc_init(void)
  479. {
  480. printk(banner);
  481. return platform_driver_register(&s3c_rtc_driver);
  482. }
  483. static void __exit s3c_rtc_exit(void)
  484. {
  485. platform_driver_unregister(&s3c_rtc_driver);
  486. }
  487. module_init(s3c_rtc_init);
  488. module_exit(s3c_rtc_exit);
  489. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  490. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  491. MODULE_LICENSE("GPL");
  492. MODULE_ALIAS("platform:s3c2410-rtc");