mc13783-regulator.c 13 KB

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  1. /*
  2. * Regulator Driver for Freescale MC13783 PMIC
  3. *
  4. * Copyright 2010 Yong Shen <yong.shen@linaro.org>
  5. * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
  6. * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/mfd/mc13783.h>
  13. #include <linux/regulator/machine.h>
  14. #include <linux/regulator/driver.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/kernel.h>
  17. #include <linux/slab.h>
  18. #include <linux/init.h>
  19. #include <linux/err.h>
  20. #include "mc13xxx.h"
  21. #define MC13783_REG_SWITCHERS5 29
  22. #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
  23. #define MC13783_REG_SWITCHERS5_SW3VSEL 18
  24. #define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
  25. #define MC13783_REG_REGULATORSETTING0 30
  26. #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
  27. #define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
  28. #define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
  29. #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
  30. #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
  31. #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
  32. #define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
  33. #define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
  34. #define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
  35. #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
  36. #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
  37. #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
  38. #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
  39. #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
  40. #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
  41. #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
  42. #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
  43. #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
  44. #define MC13783_REG_REGULATORSETTING1 31
  45. #define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
  46. #define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
  47. #define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
  48. #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
  49. #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
  50. #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
  51. #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
  52. #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
  53. #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
  54. #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
  55. #define MC13783_REG_REGULATORMODE0 32
  56. #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
  57. #define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
  58. #define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
  59. #define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
  60. #define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
  61. #define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
  62. #define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
  63. #define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
  64. #define MC13783_REG_REGULATORMODE1 33
  65. #define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
  66. #define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
  67. #define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
  68. #define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
  69. #define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
  70. #define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
  71. #define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
  72. #define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
  73. #define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
  74. #define MC13783_REG_POWERMISC 34
  75. #define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
  76. #define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
  77. #define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
  78. #define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
  79. #define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
  80. #define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
  81. #define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
  82. /* Voltage Values */
  83. static const int mc13783_sw3_val[] = {
  84. 5000000, 5000000, 5000000, 5500000,
  85. };
  86. static const int mc13783_vaudio_val[] = {
  87. 2775000,
  88. };
  89. static const int mc13783_viohi_val[] = {
  90. 2775000,
  91. };
  92. static const int mc13783_violo_val[] = {
  93. 1200000, 1300000, 1500000, 1800000,
  94. };
  95. static const int mc13783_vdig_val[] = {
  96. 1200000, 1300000, 1500000, 1800000,
  97. };
  98. static const int mc13783_vgen_val[] = {
  99. 1200000, 1300000, 1500000, 1800000,
  100. 1100000, 2000000, 2775000, 2400000,
  101. };
  102. static const int mc13783_vrfdig_val[] = {
  103. 1200000, 1500000, 1800000, 1875000,
  104. };
  105. static const int mc13783_vrfref_val[] = {
  106. 2475000, 2600000, 2700000, 2775000,
  107. };
  108. static const int mc13783_vrfcp_val[] = {
  109. 2700000, 2775000,
  110. };
  111. static const int mc13783_vsim_val[] = {
  112. 1800000, 2900000, 3000000,
  113. };
  114. static const int mc13783_vesim_val[] = {
  115. 1800000, 2900000,
  116. };
  117. static const int mc13783_vcam_val[] = {
  118. 1500000, 1800000, 2500000, 2550000,
  119. 2600000, 2750000, 2800000, 3000000,
  120. };
  121. static const int mc13783_vrfbg_val[] = {
  122. 1250000,
  123. };
  124. static const int mc13783_vvib_val[] = {
  125. 1300000, 1800000, 2000000, 3000000,
  126. };
  127. static const int mc13783_vmmc_val[] = {
  128. 1600000, 1800000, 2000000, 2600000,
  129. 2700000, 2800000, 2900000, 3000000,
  130. };
  131. static const int mc13783_vrf_val[] = {
  132. 1500000, 1875000, 2700000, 2775000,
  133. };
  134. static const int mc13783_gpo_val[] = {
  135. 3100000,
  136. };
  137. static const int mc13783_pwgtdrv_val[] = {
  138. 5500000,
  139. };
  140. static struct regulator_ops mc13783_gpo_regulator_ops;
  141. #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \
  142. MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \
  143. mc13xxx_regulator_ops)
  144. #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \
  145. MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \
  146. mc13xxx_fixed_regulator_ops)
  147. #define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \
  148. MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \
  149. mc13783_gpo_regulator_ops)
  150. #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
  151. MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
  152. #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
  153. MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
  154. static struct mc13xxx_regulator mc13783_regulators[] = {
  155. MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
  156. MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
  157. MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
  158. MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
  159. mc13783_violo_val),
  160. MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
  161. mc13783_vdig_val),
  162. MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
  163. mc13783_vgen_val),
  164. MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
  165. mc13783_vrfdig_val),
  166. MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
  167. mc13783_vrfref_val),
  168. MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
  169. mc13783_vrfcp_val),
  170. MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
  171. mc13783_vsim_val),
  172. MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
  173. mc13783_vesim_val),
  174. MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
  175. mc13783_vcam_val),
  176. MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
  177. MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
  178. mc13783_vvib_val),
  179. MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
  180. mc13783_vrf_val),
  181. MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
  182. mc13783_vrf_val),
  183. MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
  184. mc13783_vmmc_val),
  185. MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
  186. mc13783_vmmc_val),
  187. MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
  188. MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
  189. MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
  190. MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
  191. MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
  192. MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
  193. };
  194. static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
  195. u32 val)
  196. {
  197. struct mc13xxx *mc13783 = priv->mc13xxx;
  198. int ret;
  199. u32 valread;
  200. BUG_ON(val & ~mask);
  201. ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
  202. if (ret)
  203. return ret;
  204. /* Update the stored state for Power Gates. */
  205. priv->powermisc_pwgt_state =
  206. (priv->powermisc_pwgt_state & ~mask) | val;
  207. priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
  208. /* Construct the new register value */
  209. valread = (valread & ~mask) | val;
  210. /* Overwrite the PWGTxEN with the stored version */
  211. valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
  212. priv->powermisc_pwgt_state;
  213. return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
  214. }
  215. static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
  216. {
  217. struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
  218. struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
  219. int id = rdev_get_id(rdev);
  220. int ret;
  221. u32 en_val = mc13xxx_regulators[id].enable_bit;
  222. dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
  223. /* Power Gate enable value is 0 */
  224. if (id == MC13783_REG_PWGT1SPI ||
  225. id == MC13783_REG_PWGT2SPI)
  226. en_val = 0;
  227. mc13xxx_lock(priv->mc13xxx);
  228. ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
  229. en_val);
  230. mc13xxx_unlock(priv->mc13xxx);
  231. return ret;
  232. }
  233. static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
  234. {
  235. struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
  236. struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
  237. int id = rdev_get_id(rdev);
  238. int ret;
  239. u32 dis_val = 0;
  240. dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
  241. /* Power Gate disable value is 1 */
  242. if (id == MC13783_REG_PWGT1SPI ||
  243. id == MC13783_REG_PWGT2SPI)
  244. dis_val = mc13xxx_regulators[id].enable_bit;
  245. mc13xxx_lock(priv->mc13xxx);
  246. ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit,
  247. dis_val);
  248. mc13xxx_unlock(priv->mc13xxx);
  249. return ret;
  250. }
  251. static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
  252. {
  253. struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
  254. struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
  255. int ret, id = rdev_get_id(rdev);
  256. unsigned int val;
  257. mc13xxx_lock(priv->mc13xxx);
  258. ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
  259. mc13xxx_unlock(priv->mc13xxx);
  260. if (ret)
  261. return ret;
  262. /* Power Gates state is stored in powermisc_pwgt_state
  263. * where the meaning of bits is negated */
  264. val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
  265. (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
  266. return (val & mc13xxx_regulators[id].enable_bit) != 0;
  267. }
  268. static struct regulator_ops mc13783_gpo_regulator_ops = {
  269. .enable = mc13783_gpo_regulator_enable,
  270. .disable = mc13783_gpo_regulator_disable,
  271. .is_enabled = mc13783_gpo_regulator_is_enabled,
  272. .list_voltage = mc13xxx_regulator_list_voltage,
  273. .set_voltage = mc13xxx_fixed_regulator_set_voltage,
  274. .get_voltage = mc13xxx_fixed_regulator_get_voltage,
  275. };
  276. static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
  277. {
  278. struct mc13xxx_regulator_priv *priv;
  279. struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent);
  280. struct mc13783_regulator_platform_data *pdata =
  281. dev_get_platdata(&pdev->dev);
  282. struct mc13783_regulator_init_data *init_data;
  283. int i, ret;
  284. dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id);
  285. priv = kzalloc(sizeof(*priv) +
  286. pdata->num_regulators * sizeof(priv->regulators[0]),
  287. GFP_KERNEL);
  288. if (!priv)
  289. return -ENOMEM;
  290. priv->mc13xxx_regulators = mc13783_regulators;
  291. priv->mc13xxx = mc13783;
  292. for (i = 0; i < pdata->num_regulators; i++) {
  293. init_data = &pdata->regulators[i];
  294. priv->regulators[i] = regulator_register(
  295. &mc13783_regulators[init_data->id].desc,
  296. &pdev->dev, init_data->init_data, priv);
  297. if (IS_ERR(priv->regulators[i])) {
  298. dev_err(&pdev->dev, "failed to register regulator %s\n",
  299. mc13783_regulators[i].desc.name);
  300. ret = PTR_ERR(priv->regulators[i]);
  301. goto err;
  302. }
  303. }
  304. platform_set_drvdata(pdev, priv);
  305. return 0;
  306. err:
  307. while (--i >= 0)
  308. regulator_unregister(priv->regulators[i]);
  309. kfree(priv);
  310. return ret;
  311. }
  312. static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
  313. {
  314. struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev);
  315. struct mc13783_regulator_platform_data *pdata =
  316. dev_get_platdata(&pdev->dev);
  317. int i;
  318. platform_set_drvdata(pdev, NULL);
  319. for (i = 0; i < pdata->num_regulators; i++)
  320. regulator_unregister(priv->regulators[i]);
  321. kfree(priv);
  322. return 0;
  323. }
  324. static struct platform_driver mc13783_regulator_driver = {
  325. .driver = {
  326. .name = "mc13783-regulator",
  327. .owner = THIS_MODULE,
  328. },
  329. .remove = __devexit_p(mc13783_regulator_remove),
  330. .probe = mc13783_regulator_probe,
  331. };
  332. static int __init mc13783_regulator_init(void)
  333. {
  334. return platform_driver_register(&mc13783_regulator_driver);
  335. }
  336. subsys_initcall(mc13783_regulator_init);
  337. static void __exit mc13783_regulator_exit(void)
  338. {
  339. platform_driver_unregister(&mc13783_regulator_driver);
  340. }
  341. module_exit(mc13783_regulator_exit);
  342. MODULE_LICENSE("GPL v2");
  343. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
  344. MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
  345. MODULE_ALIAS("platform:mc13783-regulator");