yenta_socket.c 39 KB

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  1. /*
  2. * Regular cardbus driver ("yenta_socket")
  3. *
  4. * (C) Copyright 1999, 2000 Linus Torvalds
  5. *
  6. * Changelog:
  7. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  8. * Dynamically adjust the size of the bridge resource
  9. *
  10. * May 2003: Dominik Brodowski <linux@brodo.de>
  11. * Merge pci_socket.c and yenta.c into one file
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/module.h>
  19. #include <linux/io.h>
  20. #include <linux/slab.h>
  21. #include <pcmcia/ss.h>
  22. #include "yenta_socket.h"
  23. #include "i82365.h"
  24. static int disable_clkrun;
  25. module_param(disable_clkrun, bool, 0444);
  26. MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  27. static int isa_probe = 1;
  28. module_param(isa_probe, bool, 0444);
  29. MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  30. static int pwr_irqs_off;
  31. module_param(pwr_irqs_off, bool, 0644);
  32. MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  33. static char o2_speedup[] = "default";
  34. module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
  35. MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
  36. "or 'default' (uses recommended behaviour for the detected bridge)");
  37. /*
  38. * Only probe "regular" interrupts, don't
  39. * touch dangerous spots like the mouse irq,
  40. * because there are mice that apparently
  41. * get really confused if they get fondled
  42. * too intimately.
  43. *
  44. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  45. */
  46. static u32 isa_interrupts = 0x0ef8;
  47. #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
  48. /* Don't ask.. */
  49. #define to_cycles(ns) ((ns)/120)
  50. #define to_ns(cycles) ((cycles)*120)
  51. /*
  52. * yenta PCI irq probing.
  53. * currently only used in the TI/EnE initialization code
  54. */
  55. #ifdef CONFIG_YENTA_TI
  56. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  57. static unsigned int yenta_probe_irq(struct yenta_socket *socket,
  58. u32 isa_irq_mask);
  59. #endif
  60. static unsigned int override_bios;
  61. module_param(override_bios, uint, 0000);
  62. MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
  63. /*
  64. * Generate easy-to-use ways of reading a cardbus sockets
  65. * regular memory space ("cb_xxx"), configuration space
  66. * ("config_xxx") and compatibility space ("exca_xxxx")
  67. */
  68. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  69. {
  70. u32 val = readl(socket->base + reg);
  71. debug("%04x %08x\n", socket, reg, val);
  72. return val;
  73. }
  74. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  75. {
  76. debug("%04x %08x\n", socket, reg, val);
  77. writel(val, socket->base + reg);
  78. readl(socket->base + reg); /* avoid problems with PCI write posting */
  79. }
  80. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  81. {
  82. u8 val;
  83. pci_read_config_byte(socket->dev, offset, &val);
  84. debug("%04x %02x\n", socket, offset, val);
  85. return val;
  86. }
  87. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  88. {
  89. u16 val;
  90. pci_read_config_word(socket->dev, offset, &val);
  91. debug("%04x %04x\n", socket, offset, val);
  92. return val;
  93. }
  94. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  95. {
  96. u32 val;
  97. pci_read_config_dword(socket->dev, offset, &val);
  98. debug("%04x %08x\n", socket, offset, val);
  99. return val;
  100. }
  101. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  102. {
  103. debug("%04x %02x\n", socket, offset, val);
  104. pci_write_config_byte(socket->dev, offset, val);
  105. }
  106. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  107. {
  108. debug("%04x %04x\n", socket, offset, val);
  109. pci_write_config_word(socket->dev, offset, val);
  110. }
  111. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  112. {
  113. debug("%04x %08x\n", socket, offset, val);
  114. pci_write_config_dword(socket->dev, offset, val);
  115. }
  116. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  117. {
  118. u8 val = readb(socket->base + 0x800 + reg);
  119. debug("%04x %02x\n", socket, reg, val);
  120. return val;
  121. }
  122. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  123. {
  124. u16 val;
  125. val = readb(socket->base + 0x800 + reg);
  126. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  127. debug("%04x %04x\n", socket, reg, val);
  128. return val;
  129. }
  130. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  131. {
  132. debug("%04x %02x\n", socket, reg, val);
  133. writeb(val, socket->base + 0x800 + reg);
  134. readb(socket->base + 0x800 + reg); /* PCI write posting... */
  135. }
  136. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  137. {
  138. debug("%04x %04x\n", socket, reg, val);
  139. writeb(val, socket->base + 0x800 + reg);
  140. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  141. /* PCI write posting... */
  142. readb(socket->base + 0x800 + reg);
  143. readb(socket->base + 0x800 + reg + 1);
  144. }
  145. static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
  146. {
  147. struct pci_dev *dev = to_pci_dev(yentadev);
  148. struct yenta_socket *socket = pci_get_drvdata(dev);
  149. int offset = 0, i;
  150. offset = snprintf(buf, PAGE_SIZE, "CB registers:");
  151. for (i = 0; i < 0x24; i += 4) {
  152. unsigned val;
  153. if (!(i & 15))
  154. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  155. val = cb_readl(socket, i);
  156. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
  157. }
  158. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
  159. for (i = 0; i < 0x45; i++) {
  160. unsigned char val;
  161. if (!(i & 7)) {
  162. if (i & 8) {
  163. memcpy(buf + offset, " -", 2);
  164. offset += 2;
  165. } else
  166. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  167. }
  168. val = exca_readb(socket, i);
  169. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
  170. }
  171. buf[offset++] = '\n';
  172. return offset;
  173. }
  174. static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
  175. /*
  176. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  177. * on what kind of card is inserted..
  178. */
  179. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  180. {
  181. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  182. unsigned int val;
  183. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  184. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  185. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  186. val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  187. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
  188. if (state & CB_CBCARD) {
  189. val |= SS_CARDBUS;
  190. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  191. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  192. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  193. } else if (state & CB_16BITCARD) {
  194. u8 status = exca_readb(socket, I365_STATUS);
  195. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  196. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  197. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  198. } else {
  199. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  200. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  201. }
  202. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  203. val |= (status & I365_CS_READY) ? SS_READY : 0;
  204. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  205. }
  206. *value = val;
  207. return 0;
  208. }
  209. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  210. {
  211. /* some birdges require to use the ExCA registers to power 16bit cards */
  212. if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
  213. (socket->flags & YENTA_16BIT_POWER_EXCA)) {
  214. u8 reg, old;
  215. reg = old = exca_readb(socket, I365_POWER);
  216. reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
  217. /* i82365SL-DF style */
  218. if (socket->flags & YENTA_16BIT_POWER_DF) {
  219. switch (state->Vcc) {
  220. case 33:
  221. reg |= I365_VCC_3V;
  222. break;
  223. case 50:
  224. reg |= I365_VCC_5V;
  225. break;
  226. default:
  227. reg = 0;
  228. break;
  229. }
  230. switch (state->Vpp) {
  231. case 33:
  232. case 50:
  233. reg |= I365_VPP1_5V;
  234. break;
  235. case 120:
  236. reg |= I365_VPP1_12V;
  237. break;
  238. }
  239. } else {
  240. /* i82365SL-B style */
  241. switch (state->Vcc) {
  242. case 50:
  243. reg |= I365_VCC_5V;
  244. break;
  245. default:
  246. reg = 0;
  247. break;
  248. }
  249. switch (state->Vpp) {
  250. case 50:
  251. reg |= I365_VPP1_5V | I365_VPP2_5V;
  252. break;
  253. case 120:
  254. reg |= I365_VPP1_12V | I365_VPP2_12V;
  255. break;
  256. }
  257. }
  258. if (reg != old)
  259. exca_writeb(socket, I365_POWER, reg);
  260. } else {
  261. u32 reg = 0; /* CB_SC_STPCLK? */
  262. switch (state->Vcc) {
  263. case 33:
  264. reg = CB_SC_VCC_3V;
  265. break;
  266. case 50:
  267. reg = CB_SC_VCC_5V;
  268. break;
  269. default:
  270. reg = 0;
  271. break;
  272. }
  273. switch (state->Vpp) {
  274. case 33:
  275. reg |= CB_SC_VPP_3V;
  276. break;
  277. case 50:
  278. reg |= CB_SC_VPP_5V;
  279. break;
  280. case 120:
  281. reg |= CB_SC_VPP_12V;
  282. break;
  283. }
  284. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  285. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  286. }
  287. }
  288. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  289. {
  290. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  291. u16 bridge;
  292. /* if powering down: do it immediately */
  293. if (state->Vcc == 0)
  294. yenta_set_power(socket, state);
  295. socket->io_irq = state->io_irq;
  296. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  297. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  298. u8 intr;
  299. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  300. /* ISA interrupt control? */
  301. intr = exca_readb(socket, I365_INTCTL);
  302. intr = (intr & ~0xf);
  303. if (!socket->dev->irq) {
  304. intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
  305. bridge |= CB_BRIDGE_INTR;
  306. }
  307. exca_writeb(socket, I365_INTCTL, intr);
  308. } else {
  309. u8 reg;
  310. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  311. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  312. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  313. if (state->io_irq != socket->dev->irq) {
  314. reg |= state->io_irq;
  315. bridge |= CB_BRIDGE_INTR;
  316. }
  317. exca_writeb(socket, I365_INTCTL, reg);
  318. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  319. reg |= I365_PWR_NORESET;
  320. if (state->flags & SS_PWR_AUTO)
  321. reg |= I365_PWR_AUTO;
  322. if (state->flags & SS_OUTPUT_ENA)
  323. reg |= I365_PWR_OUT;
  324. if (exca_readb(socket, I365_POWER) != reg)
  325. exca_writeb(socket, I365_POWER, reg);
  326. /* CSC interrupt: no ISA irq for CSC */
  327. reg = exca_readb(socket, I365_CSCINT);
  328. reg &= I365_CSC_IRQ_MASK;
  329. reg |= I365_CSC_DETECT;
  330. if (state->flags & SS_IOCARD) {
  331. if (state->csc_mask & SS_STSCHG)
  332. reg |= I365_CSC_STSCHG;
  333. } else {
  334. if (state->csc_mask & SS_BATDEAD)
  335. reg |= I365_CSC_BVD1;
  336. if (state->csc_mask & SS_BATWARN)
  337. reg |= I365_CSC_BVD2;
  338. if (state->csc_mask & SS_READY)
  339. reg |= I365_CSC_READY;
  340. }
  341. exca_writeb(socket, I365_CSCINT, reg);
  342. exca_readb(socket, I365_CSC);
  343. if (sock->zoom_video)
  344. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  345. }
  346. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  347. /* Socket event mask: get card insert/remove events.. */
  348. cb_writel(socket, CB_SOCKET_EVENT, -1);
  349. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  350. /* if powering up: do it as the last step when the socket is configured */
  351. if (state->Vcc != 0)
  352. yenta_set_power(socket, state);
  353. return 0;
  354. }
  355. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  356. {
  357. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  358. int map;
  359. unsigned char ioctl, addr, enable;
  360. map = io->map;
  361. if (map > 1)
  362. return -EINVAL;
  363. enable = I365_ENA_IO(map);
  364. addr = exca_readb(socket, I365_ADDRWIN);
  365. /* Disable the window before changing it.. */
  366. if (addr & enable) {
  367. addr &= ~enable;
  368. exca_writeb(socket, I365_ADDRWIN, addr);
  369. }
  370. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  371. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  372. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  373. if (io->flags & MAP_0WS)
  374. ioctl |= I365_IOCTL_0WS(map);
  375. if (io->flags & MAP_16BIT)
  376. ioctl |= I365_IOCTL_16BIT(map);
  377. if (io->flags & MAP_AUTOSZ)
  378. ioctl |= I365_IOCTL_IOCS16(map);
  379. exca_writeb(socket, I365_IOCTL, ioctl);
  380. if (io->flags & MAP_ACTIVE)
  381. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  382. return 0;
  383. }
  384. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  385. {
  386. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  387. struct pci_bus_region region;
  388. int map;
  389. unsigned char addr, enable;
  390. unsigned int start, stop, card_start;
  391. unsigned short word;
  392. pcibios_resource_to_bus(socket->dev, &region, mem->res);
  393. map = mem->map;
  394. start = region.start;
  395. stop = region.end;
  396. card_start = mem->card_start;
  397. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  398. (card_start >> 26) || mem->speed > 1000)
  399. return -EINVAL;
  400. enable = I365_ENA_MEM(map);
  401. addr = exca_readb(socket, I365_ADDRWIN);
  402. if (addr & enable) {
  403. addr &= ~enable;
  404. exca_writeb(socket, I365_ADDRWIN, addr);
  405. }
  406. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  407. word = (start >> 12) & 0x0fff;
  408. if (mem->flags & MAP_16BIT)
  409. word |= I365_MEM_16BIT;
  410. if (mem->flags & MAP_0WS)
  411. word |= I365_MEM_0WS;
  412. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  413. word = (stop >> 12) & 0x0fff;
  414. switch (to_cycles(mem->speed)) {
  415. case 0:
  416. break;
  417. case 1:
  418. word |= I365_MEM_WS0;
  419. break;
  420. case 2:
  421. word |= I365_MEM_WS1;
  422. break;
  423. default:
  424. word |= I365_MEM_WS1 | I365_MEM_WS0;
  425. break;
  426. }
  427. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  428. word = ((card_start - start) >> 12) & 0x3fff;
  429. if (mem->flags & MAP_WRPROT)
  430. word |= I365_MEM_WRPROT;
  431. if (mem->flags & MAP_ATTRIB)
  432. word |= I365_MEM_REG;
  433. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  434. if (mem->flags & MAP_ACTIVE)
  435. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  436. return 0;
  437. }
  438. static irqreturn_t yenta_interrupt(int irq, void *dev_id)
  439. {
  440. unsigned int events;
  441. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  442. u8 csc;
  443. u32 cb_event;
  444. /* Clear interrupt status for the event */
  445. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  446. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  447. csc = exca_readb(socket, I365_CSC);
  448. if (!(cb_event || csc))
  449. return IRQ_NONE;
  450. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  451. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  452. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  453. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  454. } else {
  455. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  456. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  457. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  458. }
  459. if (events)
  460. pcmcia_parse_events(&socket->socket, events);
  461. return IRQ_HANDLED;
  462. }
  463. static void yenta_interrupt_wrapper(unsigned long data)
  464. {
  465. struct yenta_socket *socket = (struct yenta_socket *) data;
  466. yenta_interrupt(0, (void *)socket);
  467. socket->poll_timer.expires = jiffies + HZ;
  468. add_timer(&socket->poll_timer);
  469. }
  470. static void yenta_clear_maps(struct yenta_socket *socket)
  471. {
  472. int i;
  473. struct resource res = { .start = 0, .end = 0x0fff };
  474. pccard_io_map io = { 0, 0, 0, 0, 1 };
  475. pccard_mem_map mem = { .res = &res, };
  476. yenta_set_socket(&socket->socket, &dead_socket);
  477. for (i = 0; i < 2; i++) {
  478. io.map = i;
  479. yenta_set_io_map(&socket->socket, &io);
  480. }
  481. for (i = 0; i < 5; i++) {
  482. mem.map = i;
  483. yenta_set_mem_map(&socket->socket, &mem);
  484. }
  485. }
  486. /* redoes voltage interrogation if required */
  487. static void yenta_interrogate(struct yenta_socket *socket)
  488. {
  489. u32 state;
  490. state = cb_readl(socket, CB_SOCKET_STATE);
  491. if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
  492. (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
  493. ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
  494. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  495. }
  496. /* Called at resume and initialization events */
  497. static int yenta_sock_init(struct pcmcia_socket *sock)
  498. {
  499. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  500. exca_writeb(socket, I365_GBLCTL, 0x00);
  501. exca_writeb(socket, I365_GENCTL, 0x00);
  502. /* Redo card voltage interrogation */
  503. yenta_interrogate(socket);
  504. yenta_clear_maps(socket);
  505. if (socket->type && socket->type->sock_init)
  506. socket->type->sock_init(socket);
  507. /* Re-enable CSC interrupts */
  508. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  509. return 0;
  510. }
  511. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  512. {
  513. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  514. /* Disable CSC interrupts */
  515. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  516. return 0;
  517. }
  518. /*
  519. * Use an adaptive allocation for the memory resource,
  520. * sometimes the memory behind pci bridges is limited:
  521. * 1/8 of the size of the io window of the parent.
  522. * max 4 MB, min 16 kB. We try very hard to not get below
  523. * the "ACC" values, though.
  524. */
  525. #define BRIDGE_MEM_MAX (4*1024*1024)
  526. #define BRIDGE_MEM_ACC (128*1024)
  527. #define BRIDGE_MEM_MIN (16*1024)
  528. #define BRIDGE_IO_MAX 512
  529. #define BRIDGE_IO_ACC 256
  530. #define BRIDGE_IO_MIN 32
  531. #ifndef PCIBIOS_MIN_CARDBUS_IO
  532. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  533. #endif
  534. static int yenta_search_one_res(struct resource *root, struct resource *res,
  535. u32 min)
  536. {
  537. u32 align, size, start, end;
  538. if (res->flags & IORESOURCE_IO) {
  539. align = 1024;
  540. size = BRIDGE_IO_MAX;
  541. start = PCIBIOS_MIN_CARDBUS_IO;
  542. end = ~0U;
  543. } else {
  544. unsigned long avail = root->end - root->start;
  545. int i;
  546. size = BRIDGE_MEM_MAX;
  547. if (size > avail/8) {
  548. size = (avail+1)/8;
  549. /* round size down to next power of 2 */
  550. i = 0;
  551. while ((size /= 2) != 0)
  552. i++;
  553. size = 1 << i;
  554. }
  555. if (size < min)
  556. size = min;
  557. align = size;
  558. start = PCIBIOS_MIN_MEM;
  559. end = ~0U;
  560. }
  561. do {
  562. if (allocate_resource(root, res, size, start, end, align,
  563. NULL, NULL) == 0) {
  564. return 1;
  565. }
  566. size = size/2;
  567. align = size;
  568. } while (size >= min);
  569. return 0;
  570. }
  571. static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
  572. u32 min)
  573. {
  574. struct resource *root;
  575. int i;
  576. pci_bus_for_each_resource(socket->dev->bus, root, i) {
  577. if (!root)
  578. continue;
  579. if ((res->flags ^ root->flags) &
  580. (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
  581. continue; /* Wrong type */
  582. if (yenta_search_one_res(root, res, min))
  583. return 1;
  584. }
  585. return 0;
  586. }
  587. static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
  588. {
  589. struct pci_dev *dev = socket->dev;
  590. struct resource *res;
  591. struct pci_bus_region region;
  592. unsigned mask;
  593. res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
  594. /* Already allocated? */
  595. if (res->parent)
  596. return 0;
  597. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  598. mask = ~0xfff;
  599. if (type & IORESOURCE_IO)
  600. mask = ~3;
  601. res->name = dev->subordinate->name;
  602. res->flags = type;
  603. region.start = config_readl(socket, addr_start) & mask;
  604. region.end = config_readl(socket, addr_end) | ~mask;
  605. if (region.start && region.end > region.start && !override_bios) {
  606. pcibios_bus_to_resource(dev, res, &region);
  607. if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
  608. return 0;
  609. dev_printk(KERN_INFO, &dev->dev,
  610. "Preassigned resource %d busy or not available, "
  611. "reconfiguring...\n",
  612. nr);
  613. }
  614. if (type & IORESOURCE_IO) {
  615. if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
  616. (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
  617. (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
  618. return 1;
  619. } else {
  620. if (type & IORESOURCE_PREFETCH) {
  621. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  622. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  623. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  624. return 1;
  625. /* Approximating prefetchable by non-prefetchable */
  626. res->flags = IORESOURCE_MEM;
  627. }
  628. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  629. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  630. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  631. return 1;
  632. }
  633. dev_printk(KERN_INFO, &dev->dev,
  634. "no resource of type %x available, trying to continue...\n",
  635. type);
  636. res->start = res->end = res->flags = 0;
  637. return 0;
  638. }
  639. /*
  640. * Allocate the bridge mappings for the device..
  641. */
  642. static void yenta_allocate_resources(struct yenta_socket *socket)
  643. {
  644. int program = 0;
  645. program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
  646. PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
  647. program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
  648. PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
  649. program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
  650. PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
  651. program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
  652. PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
  653. if (program)
  654. pci_setup_cardbus(socket->dev->subordinate);
  655. }
  656. /*
  657. * Free the bridge mappings for the device..
  658. */
  659. static void yenta_free_resources(struct yenta_socket *socket)
  660. {
  661. int i;
  662. for (i = 0; i < 4; i++) {
  663. struct resource *res;
  664. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
  665. if (res->start != 0 && res->end != 0)
  666. release_resource(res);
  667. res->start = res->end = res->flags = 0;
  668. }
  669. }
  670. /*
  671. * Close it down - release our resources and go home..
  672. */
  673. static void __devexit yenta_close(struct pci_dev *dev)
  674. {
  675. struct yenta_socket *sock = pci_get_drvdata(dev);
  676. /* Remove the register attributes */
  677. device_remove_file(&dev->dev, &dev_attr_yenta_registers);
  678. /* we don't want a dying socket registered */
  679. pcmcia_unregister_socket(&sock->socket);
  680. /* Disable all events so we don't die in an IRQ storm */
  681. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  682. exca_writeb(sock, I365_CSCINT, 0);
  683. if (sock->cb_irq)
  684. free_irq(sock->cb_irq, sock);
  685. else
  686. del_timer_sync(&sock->poll_timer);
  687. if (sock->base)
  688. iounmap(sock->base);
  689. yenta_free_resources(sock);
  690. pci_release_regions(dev);
  691. pci_disable_device(dev);
  692. pci_set_drvdata(dev, NULL);
  693. }
  694. static struct pccard_operations yenta_socket_operations = {
  695. .init = yenta_sock_init,
  696. .suspend = yenta_sock_suspend,
  697. .get_status = yenta_get_status,
  698. .set_socket = yenta_set_socket,
  699. .set_io_map = yenta_set_io_map,
  700. .set_mem_map = yenta_set_mem_map,
  701. };
  702. #ifdef CONFIG_YENTA_TI
  703. #include "ti113x.h"
  704. #endif
  705. #ifdef CONFIG_YENTA_RICOH
  706. #include "ricoh.h"
  707. #endif
  708. #ifdef CONFIG_YENTA_TOSHIBA
  709. #include "topic.h"
  710. #endif
  711. #ifdef CONFIG_YENTA_O2
  712. #include "o2micro.h"
  713. #endif
  714. enum {
  715. CARDBUS_TYPE_DEFAULT = -1,
  716. CARDBUS_TYPE_TI,
  717. CARDBUS_TYPE_TI113X,
  718. CARDBUS_TYPE_TI12XX,
  719. CARDBUS_TYPE_TI1250,
  720. CARDBUS_TYPE_RICOH,
  721. CARDBUS_TYPE_TOPIC95,
  722. CARDBUS_TYPE_TOPIC97,
  723. CARDBUS_TYPE_O2MICRO,
  724. CARDBUS_TYPE_ENE,
  725. };
  726. /*
  727. * Different cardbus controllers have slightly different
  728. * initialization sequences etc details. List them here..
  729. */
  730. static struct cardbus_type cardbus_type[] = {
  731. #ifdef CONFIG_YENTA_TI
  732. [CARDBUS_TYPE_TI] = {
  733. .override = ti_override,
  734. .save_state = ti_save_state,
  735. .restore_state = ti_restore_state,
  736. .sock_init = ti_init,
  737. },
  738. [CARDBUS_TYPE_TI113X] = {
  739. .override = ti113x_override,
  740. .save_state = ti_save_state,
  741. .restore_state = ti_restore_state,
  742. .sock_init = ti_init,
  743. },
  744. [CARDBUS_TYPE_TI12XX] = {
  745. .override = ti12xx_override,
  746. .save_state = ti_save_state,
  747. .restore_state = ti_restore_state,
  748. .sock_init = ti_init,
  749. },
  750. [CARDBUS_TYPE_TI1250] = {
  751. .override = ti1250_override,
  752. .save_state = ti_save_state,
  753. .restore_state = ti_restore_state,
  754. .sock_init = ti_init,
  755. },
  756. [CARDBUS_TYPE_ENE] = {
  757. .override = ene_override,
  758. .save_state = ti_save_state,
  759. .restore_state = ti_restore_state,
  760. .sock_init = ti_init,
  761. },
  762. #endif
  763. #ifdef CONFIG_YENTA_RICOH
  764. [CARDBUS_TYPE_RICOH] = {
  765. .override = ricoh_override,
  766. .save_state = ricoh_save_state,
  767. .restore_state = ricoh_restore_state,
  768. },
  769. #endif
  770. #ifdef CONFIG_YENTA_TOSHIBA
  771. [CARDBUS_TYPE_TOPIC95] = {
  772. .override = topic95_override,
  773. },
  774. [CARDBUS_TYPE_TOPIC97] = {
  775. .override = topic97_override,
  776. },
  777. #endif
  778. #ifdef CONFIG_YENTA_O2
  779. [CARDBUS_TYPE_O2MICRO] = {
  780. .override = o2micro_override,
  781. .restore_state = o2micro_restore_state,
  782. },
  783. #endif
  784. };
  785. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  786. {
  787. int i;
  788. unsigned long val;
  789. u32 mask;
  790. u8 reg;
  791. /*
  792. * Probe for usable interrupts using the force
  793. * register to generate bogus card status events.
  794. */
  795. cb_writel(socket, CB_SOCKET_EVENT, -1);
  796. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  797. reg = exca_readb(socket, I365_CSCINT);
  798. exca_writeb(socket, I365_CSCINT, 0);
  799. val = probe_irq_on() & isa_irq_mask;
  800. for (i = 1; i < 16; i++) {
  801. if (!((val >> i) & 1))
  802. continue;
  803. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  804. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  805. udelay(100);
  806. cb_writel(socket, CB_SOCKET_EVENT, -1);
  807. }
  808. cb_writel(socket, CB_SOCKET_MASK, 0);
  809. exca_writeb(socket, I365_CSCINT, reg);
  810. mask = probe_irq_mask(val) & 0xffff;
  811. return mask;
  812. }
  813. /*
  814. * yenta PCI irq probing.
  815. * currently only used in the TI/EnE initialization code
  816. */
  817. #ifdef CONFIG_YENTA_TI
  818. /* interrupt handler, only used during probing */
  819. static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
  820. {
  821. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  822. u8 csc;
  823. u32 cb_event;
  824. /* Clear interrupt status for the event */
  825. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  826. cb_writel(socket, CB_SOCKET_EVENT, -1);
  827. csc = exca_readb(socket, I365_CSC);
  828. if (cb_event || csc) {
  829. socket->probe_status = 1;
  830. return IRQ_HANDLED;
  831. }
  832. return IRQ_NONE;
  833. }
  834. /* probes the PCI interrupt, use only on override functions */
  835. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  836. {
  837. u8 reg = 0;
  838. if (!socket->cb_irq)
  839. return -1;
  840. socket->probe_status = 0;
  841. if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
  842. dev_printk(KERN_WARNING, &socket->dev->dev,
  843. "request_irq() in yenta_probe_cb_irq() failed!\n");
  844. return -1;
  845. }
  846. /* generate interrupt, wait */
  847. if (!socket->dev->irq)
  848. reg = exca_readb(socket, I365_CSCINT);
  849. exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
  850. cb_writel(socket, CB_SOCKET_EVENT, -1);
  851. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  852. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  853. msleep(100);
  854. /* disable interrupts */
  855. cb_writel(socket, CB_SOCKET_MASK, 0);
  856. exca_writeb(socket, I365_CSCINT, reg);
  857. cb_writel(socket, CB_SOCKET_EVENT, -1);
  858. exca_readb(socket, I365_CSC);
  859. free_irq(socket->cb_irq, socket);
  860. return (int) socket->probe_status;
  861. }
  862. #endif /* CONFIG_YENTA_TI */
  863. /*
  864. * Set static data that doesn't need re-initializing..
  865. */
  866. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  867. {
  868. socket->socket.pci_irq = socket->cb_irq;
  869. if (isa_probe)
  870. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  871. else
  872. socket->socket.irq_mask = 0;
  873. dev_printk(KERN_INFO, &socket->dev->dev,
  874. "ISA IRQ mask 0x%04x, PCI irq %d\n",
  875. socket->socket.irq_mask, socket->cb_irq);
  876. }
  877. /*
  878. * Initialize the standard cardbus registers
  879. */
  880. static void yenta_config_init(struct yenta_socket *socket)
  881. {
  882. u16 bridge;
  883. struct pci_dev *dev = socket->dev;
  884. struct pci_bus_region region;
  885. pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
  886. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  887. config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
  888. config_writew(socket, PCI_COMMAND,
  889. PCI_COMMAND_IO |
  890. PCI_COMMAND_MEMORY |
  891. PCI_COMMAND_MASTER |
  892. PCI_COMMAND_WAIT);
  893. /* MAGIC NUMBERS! Fixme */
  894. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  895. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  896. config_writel(socket, PCI_PRIMARY_BUS,
  897. (176 << 24) | /* sec. latency timer */
  898. (dev->subordinate->subordinate << 16) | /* subordinate bus */
  899. (dev->subordinate->secondary << 8) | /* secondary bus */
  900. dev->subordinate->primary); /* primary bus */
  901. /*
  902. * Set up the bridging state:
  903. * - enable write posting.
  904. * - memory window 0 prefetchable, window 1 non-prefetchable
  905. * - PCI interrupts enabled if a PCI interrupt exists..
  906. */
  907. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  908. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  909. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
  910. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  911. }
  912. /**
  913. * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
  914. * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
  915. *
  916. * Checks if devices on the bus which the CardBus bridge bridges to would be
  917. * invisible during PCI scans because of a misconfigured subordinate number
  918. * of the parent brige - some BIOSes seem to be too lazy to set it right.
  919. * Does the fixup carefully by checking how far it can go without conflicts.
  920. * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
  921. */
  922. static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
  923. {
  924. struct list_head *tmp;
  925. unsigned char upper_limit;
  926. /*
  927. * We only check and fix the parent bridge: All systems which need
  928. * this fixup that have been reviewed are laptops and the only bridge
  929. * which needed fixing was the parent bridge of the CardBus bridge:
  930. */
  931. struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
  932. /* Check bus numbers are already set up correctly: */
  933. if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
  934. return; /* The subordinate number is ok, nothing to do */
  935. if (!bridge_to_fix->parent)
  936. return; /* Root bridges are ok */
  937. /* stay within the limits of the bus range of the parent: */
  938. upper_limit = bridge_to_fix->parent->subordinate;
  939. /* check the bus ranges of all silbling bridges to prevent overlap */
  940. list_for_each(tmp, &bridge_to_fix->parent->children) {
  941. struct pci_bus *silbling = pci_bus_b(tmp);
  942. /*
  943. * If the silbling has a higher secondary bus number
  944. * and it's secondary is equal or smaller than our
  945. * current upper limit, set the new upper limit to
  946. * the bus number below the silbling's range:
  947. */
  948. if (silbling->secondary > bridge_to_fix->subordinate
  949. && silbling->secondary <= upper_limit)
  950. upper_limit = silbling->secondary - 1;
  951. }
  952. /* Show that the wanted subordinate number is not possible: */
  953. if (cardbus_bridge->subordinate > upper_limit)
  954. dev_printk(KERN_WARNING, &cardbus_bridge->dev,
  955. "Upper limit for fixing this "
  956. "bridge's parent bridge: #%02x\n", upper_limit);
  957. /* If we have room to increase the bridge's subordinate number, */
  958. if (bridge_to_fix->subordinate < upper_limit) {
  959. /* use the highest number of the hidden bus, within limits */
  960. unsigned char subordinate_to_assign =
  961. min(cardbus_bridge->subordinate, upper_limit);
  962. dev_printk(KERN_INFO, &bridge_to_fix->dev,
  963. "Raising subordinate bus# of parent "
  964. "bus (#%02x) from #%02x to #%02x\n",
  965. bridge_to_fix->number,
  966. bridge_to_fix->subordinate, subordinate_to_assign);
  967. /* Save the new subordinate in the bus struct of the bridge */
  968. bridge_to_fix->subordinate = subordinate_to_assign;
  969. /* and update the PCI config space with the new subordinate */
  970. pci_write_config_byte(bridge_to_fix->self,
  971. PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
  972. }
  973. }
  974. /*
  975. * Initialize a cardbus controller. Make sure we have a usable
  976. * interrupt, and that we can map the cardbus area. Fill in the
  977. * socket information structure..
  978. */
  979. static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
  980. {
  981. struct yenta_socket *socket;
  982. int ret;
  983. /*
  984. * If we failed to assign proper bus numbers for this cardbus
  985. * controller during PCI probe, its subordinate pci_bus is NULL.
  986. * Bail out if so.
  987. */
  988. if (!dev->subordinate) {
  989. dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
  990. "(try 'pci=assign-busses')\n");
  991. return -ENODEV;
  992. }
  993. socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  994. if (!socket)
  995. return -ENOMEM;
  996. /* prepare pcmcia_socket */
  997. socket->socket.ops = &yenta_socket_operations;
  998. socket->socket.resource_ops = &pccard_nonstatic_ops;
  999. socket->socket.dev.parent = &dev->dev;
  1000. socket->socket.driver_data = socket;
  1001. socket->socket.owner = THIS_MODULE;
  1002. socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  1003. socket->socket.map_size = 0x1000;
  1004. socket->socket.cb_dev = dev;
  1005. /* prepare struct yenta_socket */
  1006. socket->dev = dev;
  1007. pci_set_drvdata(dev, socket);
  1008. /*
  1009. * Do some basic sanity checking..
  1010. */
  1011. if (pci_enable_device(dev)) {
  1012. ret = -EBUSY;
  1013. goto free;
  1014. }
  1015. ret = pci_request_regions(dev, "yenta_socket");
  1016. if (ret)
  1017. goto disable;
  1018. if (!pci_resource_start(dev, 0)) {
  1019. dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
  1020. ret = -ENODEV;
  1021. goto release;
  1022. }
  1023. /*
  1024. * Ok, start setup.. Map the cardbus registers,
  1025. * and request the IRQ.
  1026. */
  1027. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  1028. if (!socket->base) {
  1029. ret = -ENOMEM;
  1030. goto release;
  1031. }
  1032. /*
  1033. * report the subsystem vendor and device for help debugging
  1034. * the irq stuff...
  1035. */
  1036. dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
  1037. dev->subsystem_vendor, dev->subsystem_device);
  1038. yenta_config_init(socket);
  1039. /* Disable all events */
  1040. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  1041. /* Set up the bridge regions.. */
  1042. yenta_allocate_resources(socket);
  1043. socket->cb_irq = dev->irq;
  1044. /* Do we have special options for the device? */
  1045. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  1046. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  1047. socket->type = &cardbus_type[id->driver_data];
  1048. ret = socket->type->override(socket);
  1049. if (ret < 0)
  1050. goto unmap;
  1051. }
  1052. /* We must finish initialization here */
  1053. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
  1054. /* No IRQ or request_irq failed. Poll */
  1055. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  1056. init_timer(&socket->poll_timer);
  1057. socket->poll_timer.function = yenta_interrupt_wrapper;
  1058. socket->poll_timer.data = (unsigned long)socket;
  1059. socket->poll_timer.expires = jiffies + HZ;
  1060. add_timer(&socket->poll_timer);
  1061. dev_printk(KERN_INFO, &dev->dev,
  1062. "no PCI IRQ, CardBus support disabled for this "
  1063. "socket.\n");
  1064. dev_printk(KERN_INFO, &dev->dev,
  1065. "check your BIOS CardBus, BIOS IRQ or ACPI "
  1066. "settings.\n");
  1067. } else {
  1068. socket->socket.features |= SS_CAP_CARDBUS;
  1069. }
  1070. /* Figure out what the dang thing can do for the PCMCIA layer... */
  1071. yenta_interrogate(socket);
  1072. yenta_get_socket_capabilities(socket, isa_interrupts);
  1073. dev_printk(KERN_INFO, &dev->dev,
  1074. "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
  1075. yenta_fixup_parent_bridge(dev->subordinate);
  1076. /* Register it with the pcmcia layer.. */
  1077. ret = pcmcia_register_socket(&socket->socket);
  1078. if (ret == 0) {
  1079. /* Add the yenta register attributes */
  1080. ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
  1081. if (ret == 0)
  1082. goto out;
  1083. /* error path... */
  1084. pcmcia_unregister_socket(&socket->socket);
  1085. }
  1086. unmap:
  1087. iounmap(socket->base);
  1088. release:
  1089. pci_release_regions(dev);
  1090. disable:
  1091. pci_disable_device(dev);
  1092. free:
  1093. kfree(socket);
  1094. out:
  1095. return ret;
  1096. }
  1097. #ifdef CONFIG_PM
  1098. static int yenta_dev_suspend_noirq(struct device *dev)
  1099. {
  1100. struct pci_dev *pdev = to_pci_dev(dev);
  1101. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1102. if (!socket)
  1103. return 0;
  1104. if (socket->type && socket->type->save_state)
  1105. socket->type->save_state(socket);
  1106. pci_save_state(pdev);
  1107. pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
  1108. pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
  1109. pci_disable_device(pdev);
  1110. return 0;
  1111. }
  1112. static int yenta_dev_resume_noirq(struct device *dev)
  1113. {
  1114. struct pci_dev *pdev = to_pci_dev(dev);
  1115. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1116. int ret;
  1117. if (!socket)
  1118. return 0;
  1119. pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
  1120. pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
  1121. ret = pci_enable_device(pdev);
  1122. if (ret)
  1123. return ret;
  1124. pci_set_master(pdev);
  1125. if (socket->type && socket->type->restore_state)
  1126. socket->type->restore_state(socket);
  1127. return 0;
  1128. }
  1129. static const struct dev_pm_ops yenta_pm_ops = {
  1130. .suspend_noirq = yenta_dev_suspend_noirq,
  1131. .resume_noirq = yenta_dev_resume_noirq,
  1132. .freeze_noirq = yenta_dev_suspend_noirq,
  1133. .thaw_noirq = yenta_dev_resume_noirq,
  1134. .poweroff_noirq = yenta_dev_suspend_noirq,
  1135. .restore_noirq = yenta_dev_resume_noirq,
  1136. };
  1137. #define YENTA_PM_OPS (&yenta_pm_ops)
  1138. #else
  1139. #define YENTA_PM_OPS NULL
  1140. #endif
  1141. #define CB_ID(vend, dev, type) \
  1142. { \
  1143. .vendor = vend, \
  1144. .device = dev, \
  1145. .subvendor = PCI_ANY_ID, \
  1146. .subdevice = PCI_ANY_ID, \
  1147. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  1148. .class_mask = ~0, \
  1149. .driver_data = CARDBUS_TYPE_##type, \
  1150. }
  1151. static struct pci_device_id yenta_table[] = {
  1152. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  1153. /*
  1154. * TBD: Check if these TI variants can use more
  1155. * advanced overrides instead. (I can't get the
  1156. * data sheets for these devices. --rmk)
  1157. */
  1158. #ifdef CONFIG_YENTA_TI
  1159. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  1160. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  1161. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  1162. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  1163. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  1164. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  1165. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  1166. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  1167. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  1168. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  1169. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  1170. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  1171. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  1172. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  1173. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  1174. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  1175. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  1176. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  1177. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  1178. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  1179. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  1180. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  1181. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
  1182. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
  1183. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
  1184. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
  1185. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
  1186. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
  1187. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
  1188. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
  1189. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
  1190. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
  1191. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
  1192. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
  1193. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
  1194. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
  1195. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
  1196. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
  1197. #endif /* CONFIG_YENTA_TI */
  1198. #ifdef CONFIG_YENTA_RICOH
  1199. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  1200. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  1201. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  1202. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  1203. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  1204. #endif
  1205. #ifdef CONFIG_YENTA_TOSHIBA
  1206. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
  1207. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  1208. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  1209. #endif
  1210. #ifdef CONFIG_YENTA_O2
  1211. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  1212. #endif
  1213. /* match any cardbus bridge */
  1214. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  1215. { /* all zeroes */ }
  1216. };
  1217. MODULE_DEVICE_TABLE(pci, yenta_table);
  1218. static struct pci_driver yenta_cardbus_driver = {
  1219. .name = "yenta_cardbus",
  1220. .id_table = yenta_table,
  1221. .probe = yenta_probe,
  1222. .remove = __devexit_p(yenta_close),
  1223. .driver.pm = YENTA_PM_OPS,
  1224. };
  1225. static int __init yenta_socket_init(void)
  1226. {
  1227. return pci_register_driver(&yenta_cardbus_driver);
  1228. }
  1229. static void __exit yenta_socket_exit(void)
  1230. {
  1231. pci_unregister_driver(&yenta_cardbus_driver);
  1232. }
  1233. module_init(yenta_socket_init);
  1234. module_exit(yenta_socket_exit);
  1235. MODULE_LICENSE("GPL");