pd6729.c 19 KB

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  1. /*
  2. * Driver for the Cirrus PD6729 PCI-PCMCIA bridge.
  3. *
  4. * Based on the i82092.c driver.
  5. *
  6. * This software may be used and distributed according to the terms of
  7. * the GNU General Public License, incorporated herein by reference.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/slab.h>
  12. #include <linux/pci.h>
  13. #include <linux/init.h>
  14. #include <linux/workqueue.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/device.h>
  17. #include <linux/io.h>
  18. #include <pcmcia/ss.h>
  19. #include <asm/system.h>
  20. #include "pd6729.h"
  21. #include "i82365.h"
  22. #include "cirrus.h"
  23. MODULE_LICENSE("GPL");
  24. MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge");
  25. MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>");
  26. #define MAX_SOCKETS 2
  27. /*
  28. * simple helper functions
  29. * External clock time, in nanoseconds. 120 ns = 8.33 MHz
  30. */
  31. #define to_cycles(ns) ((ns)/120)
  32. #ifndef NO_IRQ
  33. #define NO_IRQ ((unsigned int)(0))
  34. #endif
  35. /*
  36. * PARAMETERS
  37. * irq_mode=n
  38. * Specifies the interrupt delivery mode. The default (1) is to use PCI
  39. * interrupts; a value of 0 selects ISA interrupts. This must be set for
  40. * correct operation of PCI card readers.
  41. */
  42. static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */
  43. module_param(irq_mode, int, 0444);
  44. MODULE_PARM_DESC(irq_mode,
  45. "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1");
  46. static DEFINE_SPINLOCK(port_lock);
  47. /* basic value read/write functions */
  48. static unsigned char indirect_read(struct pd6729_socket *socket,
  49. unsigned short reg)
  50. {
  51. unsigned long port;
  52. unsigned char val;
  53. unsigned long flags;
  54. spin_lock_irqsave(&port_lock, flags);
  55. reg += socket->number * 0x40;
  56. port = socket->io_base;
  57. outb(reg, port);
  58. val = inb(port + 1);
  59. spin_unlock_irqrestore(&port_lock, flags);
  60. return val;
  61. }
  62. static unsigned short indirect_read16(struct pd6729_socket *socket,
  63. unsigned short reg)
  64. {
  65. unsigned long port;
  66. unsigned short tmp;
  67. unsigned long flags;
  68. spin_lock_irqsave(&port_lock, flags);
  69. reg = reg + socket->number * 0x40;
  70. port = socket->io_base;
  71. outb(reg, port);
  72. tmp = inb(port + 1);
  73. reg++;
  74. outb(reg, port);
  75. tmp = tmp | (inb(port + 1) << 8);
  76. spin_unlock_irqrestore(&port_lock, flags);
  77. return tmp;
  78. }
  79. static void indirect_write(struct pd6729_socket *socket, unsigned short reg,
  80. unsigned char value)
  81. {
  82. unsigned long port;
  83. unsigned long flags;
  84. spin_lock_irqsave(&port_lock, flags);
  85. reg = reg + socket->number * 0x40;
  86. port = socket->io_base;
  87. outb(reg, port);
  88. outb(value, port + 1);
  89. spin_unlock_irqrestore(&port_lock, flags);
  90. }
  91. static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg,
  92. unsigned char mask)
  93. {
  94. unsigned long port;
  95. unsigned char val;
  96. unsigned long flags;
  97. spin_lock_irqsave(&port_lock, flags);
  98. reg = reg + socket->number * 0x40;
  99. port = socket->io_base;
  100. outb(reg, port);
  101. val = inb(port + 1);
  102. val |= mask;
  103. outb(reg, port);
  104. outb(val, port + 1);
  105. spin_unlock_irqrestore(&port_lock, flags);
  106. }
  107. static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg,
  108. unsigned char mask)
  109. {
  110. unsigned long port;
  111. unsigned char val;
  112. unsigned long flags;
  113. spin_lock_irqsave(&port_lock, flags);
  114. reg = reg + socket->number * 0x40;
  115. port = socket->io_base;
  116. outb(reg, port);
  117. val = inb(port + 1);
  118. val &= ~mask;
  119. outb(reg, port);
  120. outb(val, port + 1);
  121. spin_unlock_irqrestore(&port_lock, flags);
  122. }
  123. static void indirect_write16(struct pd6729_socket *socket, unsigned short reg,
  124. unsigned short value)
  125. {
  126. unsigned long port;
  127. unsigned char val;
  128. unsigned long flags;
  129. spin_lock_irqsave(&port_lock, flags);
  130. reg = reg + socket->number * 0x40;
  131. port = socket->io_base;
  132. outb(reg, port);
  133. val = value & 255;
  134. outb(val, port + 1);
  135. reg++;
  136. outb(reg, port);
  137. val = value >> 8;
  138. outb(val, port + 1);
  139. spin_unlock_irqrestore(&port_lock, flags);
  140. }
  141. /* Interrupt handler functionality */
  142. static irqreturn_t pd6729_interrupt(int irq, void *dev)
  143. {
  144. struct pd6729_socket *socket = (struct pd6729_socket *)dev;
  145. int i;
  146. int loopcount = 0;
  147. int handled = 0;
  148. unsigned int events, active = 0;
  149. while (1) {
  150. loopcount++;
  151. if (loopcount > 20) {
  152. printk(KERN_ERR "pd6729: infinite eventloop "
  153. "in interrupt\n");
  154. break;
  155. }
  156. active = 0;
  157. for (i = 0; i < MAX_SOCKETS; i++) {
  158. unsigned int csc;
  159. /* card status change register */
  160. csc = indirect_read(&socket[i], I365_CSC);
  161. if (csc == 0) /* no events on this socket */
  162. continue;
  163. handled = 1;
  164. events = 0;
  165. if (csc & I365_CSC_DETECT) {
  166. events |= SS_DETECT;
  167. dev_vdbg(&socket[i].socket.dev,
  168. "Card detected in socket %i!\n", i);
  169. }
  170. if (indirect_read(&socket[i], I365_INTCTL)
  171. & I365_PC_IOCARD) {
  172. /* For IO/CARDS, bit 0 means "read the card" */
  173. events |= (csc & I365_CSC_STSCHG)
  174. ? SS_STSCHG : 0;
  175. } else {
  176. /* Check for battery/ready events */
  177. events |= (csc & I365_CSC_BVD1)
  178. ? SS_BATDEAD : 0;
  179. events |= (csc & I365_CSC_BVD2)
  180. ? SS_BATWARN : 0;
  181. events |= (csc & I365_CSC_READY)
  182. ? SS_READY : 0;
  183. }
  184. if (events)
  185. pcmcia_parse_events(&socket[i].socket, events);
  186. active |= events;
  187. }
  188. if (active == 0) /* no more events to handle */
  189. break;
  190. }
  191. return IRQ_RETVAL(handled);
  192. }
  193. /* socket functions */
  194. static void pd6729_interrupt_wrapper(unsigned long data)
  195. {
  196. struct pd6729_socket *socket = (struct pd6729_socket *) data;
  197. pd6729_interrupt(0, (void *)socket);
  198. mod_timer(&socket->poll_timer, jiffies + HZ);
  199. }
  200. static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value)
  201. {
  202. struct pd6729_socket *socket
  203. = container_of(sock, struct pd6729_socket, socket);
  204. unsigned int status;
  205. unsigned int data;
  206. struct pd6729_socket *t;
  207. /* Interface Status Register */
  208. status = indirect_read(socket, I365_STATUS);
  209. *value = 0;
  210. if ((status & I365_CS_DETECT) == I365_CS_DETECT)
  211. *value |= SS_DETECT;
  212. /*
  213. * IO cards have a different meaning of bits 0,1
  214. * Also notice the inverse-logic on the bits
  215. */
  216. if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) {
  217. /* IO card */
  218. if (!(status & I365_CS_STSCHG))
  219. *value |= SS_STSCHG;
  220. } else {
  221. /* non I/O card */
  222. if (!(status & I365_CS_BVD1))
  223. *value |= SS_BATDEAD;
  224. if (!(status & I365_CS_BVD2))
  225. *value |= SS_BATWARN;
  226. }
  227. if (status & I365_CS_WRPROT)
  228. *value |= SS_WRPROT; /* card is write protected */
  229. if (status & I365_CS_READY)
  230. *value |= SS_READY; /* card is not busy */
  231. if (status & I365_CS_POWERON)
  232. *value |= SS_POWERON; /* power is applied to the card */
  233. t = (socket->number) ? socket : socket + 1;
  234. indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA);
  235. data = indirect_read16(t, PD67_EXT_DATA);
  236. *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD;
  237. return 0;
  238. }
  239. static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  240. {
  241. struct pd6729_socket *socket
  242. = container_of(sock, struct pd6729_socket, socket);
  243. unsigned char reg, data;
  244. /* First, set the global controller options */
  245. indirect_write(socket, I365_GBLCTL, 0x00);
  246. indirect_write(socket, I365_GENCTL, 0x00);
  247. /* Values for the IGENC register */
  248. socket->card_irq = state->io_irq;
  249. reg = 0;
  250. /* The reset bit has "inverse" logic */
  251. if (!(state->flags & SS_RESET))
  252. reg |= I365_PC_RESET;
  253. if (state->flags & SS_IOCARD)
  254. reg |= I365_PC_IOCARD;
  255. /* IGENC, Interrupt and General Control Register */
  256. indirect_write(socket, I365_INTCTL, reg);
  257. /* Power registers */
  258. reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
  259. if (state->flags & SS_PWR_AUTO) {
  260. dev_dbg(&sock->dev, "Auto power\n");
  261. reg |= I365_PWR_AUTO; /* automatic power mngmnt */
  262. }
  263. if (state->flags & SS_OUTPUT_ENA) {
  264. dev_dbg(&sock->dev, "Power Enabled\n");
  265. reg |= I365_PWR_OUT; /* enable power */
  266. }
  267. switch (state->Vcc) {
  268. case 0:
  269. break;
  270. case 33:
  271. dev_dbg(&sock->dev,
  272. "setting voltage to Vcc to 3.3V on socket %i\n",
  273. socket->number);
  274. reg |= I365_VCC_5V;
  275. indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
  276. break;
  277. case 50:
  278. dev_dbg(&sock->dev,
  279. "setting voltage to Vcc to 5V on socket %i\n",
  280. socket->number);
  281. reg |= I365_VCC_5V;
  282. indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
  283. break;
  284. default:
  285. dev_dbg(&sock->dev,
  286. "pd6729_set_socket called with invalid VCC power "
  287. "value: %i\n", state->Vcc);
  288. return -EINVAL;
  289. }
  290. switch (state->Vpp) {
  291. case 0:
  292. dev_dbg(&sock->dev, "not setting Vpp on socket %i\n",
  293. socket->number);
  294. break;
  295. case 33:
  296. case 50:
  297. dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n",
  298. socket->number);
  299. reg |= I365_VPP1_5V;
  300. break;
  301. case 120:
  302. dev_dbg(&sock->dev, "setting Vpp to 12.0\n");
  303. reg |= I365_VPP1_12V;
  304. break;
  305. default:
  306. dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with "
  307. "invalid VPP power value: %i\n", state->Vpp);
  308. return -EINVAL;
  309. }
  310. /* only write if changed */
  311. if (reg != indirect_read(socket, I365_POWER))
  312. indirect_write(socket, I365_POWER, reg);
  313. if (irq_mode == 1) {
  314. /* all interrupts are to be done as PCI interrupts */
  315. data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
  316. } else
  317. data = 0;
  318. indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1);
  319. indirect_write(socket, PD67_EXT_DATA, data);
  320. /* Enable specific interrupt events */
  321. reg = 0x00;
  322. if (state->csc_mask & SS_DETECT)
  323. reg |= I365_CSC_DETECT;
  324. if (state->flags & SS_IOCARD) {
  325. if (state->csc_mask & SS_STSCHG)
  326. reg |= I365_CSC_STSCHG;
  327. } else {
  328. if (state->csc_mask & SS_BATDEAD)
  329. reg |= I365_CSC_BVD1;
  330. if (state->csc_mask & SS_BATWARN)
  331. reg |= I365_CSC_BVD2;
  332. if (state->csc_mask & SS_READY)
  333. reg |= I365_CSC_READY;
  334. }
  335. if (irq_mode == 1)
  336. reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */
  337. indirect_write(socket, I365_CSCINT, reg);
  338. reg = indirect_read(socket, I365_INTCTL);
  339. if (irq_mode == 1)
  340. reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */
  341. else
  342. reg |= socket->card_irq;
  343. indirect_write(socket, I365_INTCTL, reg);
  344. /* now clear the (probably bogus) pending stuff by doing a dummy read */
  345. (void)indirect_read(socket, I365_CSC);
  346. return 0;
  347. }
  348. static int pd6729_set_io_map(struct pcmcia_socket *sock,
  349. struct pccard_io_map *io)
  350. {
  351. struct pd6729_socket *socket
  352. = container_of(sock, struct pd6729_socket, socket);
  353. unsigned char map, ioctl;
  354. map = io->map;
  355. /* Check error conditions */
  356. if (map > 1) {
  357. dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n");
  358. return -EINVAL;
  359. }
  360. /* Turn off the window before changing anything */
  361. if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map))
  362. indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
  363. /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n",
  364. io->start, io->stop);*/
  365. /* write the new values */
  366. indirect_write16(socket, I365_IO(map)+I365_W_START, io->start);
  367. indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop);
  368. ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  369. if (io->flags & MAP_0WS)
  370. ioctl |= I365_IOCTL_0WS(map);
  371. if (io->flags & MAP_16BIT)
  372. ioctl |= I365_IOCTL_16BIT(map);
  373. if (io->flags & MAP_AUTOSZ)
  374. ioctl |= I365_IOCTL_IOCS16(map);
  375. indirect_write(socket, I365_IOCTL, ioctl);
  376. /* Turn the window back on if needed */
  377. if (io->flags & MAP_ACTIVE)
  378. indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
  379. return 0;
  380. }
  381. static int pd6729_set_mem_map(struct pcmcia_socket *sock,
  382. struct pccard_mem_map *mem)
  383. {
  384. struct pd6729_socket *socket
  385. = container_of(sock, struct pd6729_socket, socket);
  386. unsigned short base, i;
  387. unsigned char map;
  388. map = mem->map;
  389. if (map > 4) {
  390. dev_warn(&sock->dev, "invalid map requested\n");
  391. return -EINVAL;
  392. }
  393. if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) {
  394. dev_warn(&sock->dev, "invalid invalid address / speed\n");
  395. return -EINVAL;
  396. }
  397. /* Turn off the window before changing anything */
  398. if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map))
  399. indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
  400. /* write the start address */
  401. base = I365_MEM(map);
  402. i = (mem->res->start >> 12) & 0x0fff;
  403. if (mem->flags & MAP_16BIT)
  404. i |= I365_MEM_16BIT;
  405. if (mem->flags & MAP_0WS)
  406. i |= I365_MEM_0WS;
  407. indirect_write16(socket, base + I365_W_START, i);
  408. /* write the stop address */
  409. i = (mem->res->end >> 12) & 0x0fff;
  410. switch (to_cycles(mem->speed)) {
  411. case 0:
  412. break;
  413. case 1:
  414. i |= I365_MEM_WS0;
  415. break;
  416. case 2:
  417. i |= I365_MEM_WS1;
  418. break;
  419. default:
  420. i |= I365_MEM_WS1 | I365_MEM_WS0;
  421. break;
  422. }
  423. indirect_write16(socket, base + I365_W_STOP, i);
  424. /* Take care of high byte */
  425. indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
  426. indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24);
  427. /* card start */
  428. i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff;
  429. if (mem->flags & MAP_WRPROT)
  430. i |= I365_MEM_WRPROT;
  431. if (mem->flags & MAP_ATTRIB) {
  432. /* dev_dbg(&sock->dev, "requesting attribute memory for "
  433. "socket %i\n", socket->number);*/
  434. i |= I365_MEM_REG;
  435. } else {
  436. /* dev_dbg(&sock->dev, "requesting normal memory for "
  437. "socket %i\n", socket->number);*/
  438. }
  439. indirect_write16(socket, base + I365_W_OFF, i);
  440. /* Enable the window if necessary */
  441. if (mem->flags & MAP_ACTIVE)
  442. indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
  443. return 0;
  444. }
  445. static int pd6729_init(struct pcmcia_socket *sock)
  446. {
  447. int i;
  448. struct resource res = { .end = 0x0fff };
  449. pccard_io_map io = { 0, 0, 0, 0, 1 };
  450. pccard_mem_map mem = { .res = &res, };
  451. pd6729_set_socket(sock, &dead_socket);
  452. for (i = 0; i < 2; i++) {
  453. io.map = i;
  454. pd6729_set_io_map(sock, &io);
  455. }
  456. for (i = 0; i < 5; i++) {
  457. mem.map = i;
  458. pd6729_set_mem_map(sock, &mem);
  459. }
  460. return 0;
  461. }
  462. /* the pccard structure and its functions */
  463. static struct pccard_operations pd6729_operations = {
  464. .init = pd6729_init,
  465. .get_status = pd6729_get_status,
  466. .set_socket = pd6729_set_socket,
  467. .set_io_map = pd6729_set_io_map,
  468. .set_mem_map = pd6729_set_mem_map,
  469. };
  470. static irqreturn_t pd6729_test(int irq, void *dev)
  471. {
  472. pr_devel("-> hit on irq %d\n", irq);
  473. return IRQ_HANDLED;
  474. }
  475. static int pd6729_check_irq(int irq)
  476. {
  477. int ret;
  478. ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x",
  479. pd6729_test);
  480. if (ret)
  481. return -1;
  482. free_irq(irq, pd6729_test);
  483. return 0;
  484. }
  485. static u_int __devinit pd6729_isa_scan(void)
  486. {
  487. u_int mask0, mask = 0;
  488. int i;
  489. if (irq_mode == 1) {
  490. printk(KERN_INFO "pd6729: PCI card interrupts, "
  491. "PCI status changes\n");
  492. return 0;
  493. }
  494. mask0 = PD67_MASK;
  495. /* just find interrupts that aren't in use */
  496. for (i = 0; i < 16; i++)
  497. if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0))
  498. mask |= (1 << i);
  499. printk(KERN_INFO "pd6729: ISA irqs = ");
  500. for (i = 0; i < 16; i++)
  501. if (mask & (1<<i))
  502. printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i);
  503. if (mask == 0)
  504. printk("none!");
  505. else
  506. printk(" polling status changes.\n");
  507. return mask;
  508. }
  509. static int __devinit pd6729_pci_probe(struct pci_dev *dev,
  510. const struct pci_device_id *id)
  511. {
  512. int i, j, ret;
  513. u_int mask;
  514. char configbyte;
  515. struct pd6729_socket *socket;
  516. socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS,
  517. GFP_KERNEL);
  518. if (!socket) {
  519. dev_warn(&dev->dev, "failed to kzalloc socket.\n");
  520. return -ENOMEM;
  521. }
  522. ret = pci_enable_device(dev);
  523. if (ret) {
  524. dev_warn(&dev->dev, "failed to enable pci_device.\n");
  525. goto err_out_free_mem;
  526. }
  527. if (!pci_resource_start(dev, 0)) {
  528. dev_warn(&dev->dev, "refusing to load the driver as the "
  529. "io_base is NULL.\n");
  530. goto err_out_disable;
  531. }
  532. dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx "
  533. "on irq %d\n",
  534. (unsigned long long)pci_resource_start(dev, 0), dev->irq);
  535. /*
  536. * Since we have no memory BARs some firmware may not
  537. * have had PCI_COMMAND_MEMORY enabled, yet the device needs it.
  538. */
  539. pci_read_config_byte(dev, PCI_COMMAND, &configbyte);
  540. if (!(configbyte & PCI_COMMAND_MEMORY)) {
  541. dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n");
  542. configbyte |= PCI_COMMAND_MEMORY;
  543. pci_write_config_byte(dev, PCI_COMMAND, configbyte);
  544. }
  545. ret = pci_request_regions(dev, "pd6729");
  546. if (ret) {
  547. dev_warn(&dev->dev, "pci request region failed.\n");
  548. goto err_out_disable;
  549. }
  550. if (dev->irq == NO_IRQ)
  551. irq_mode = 0; /* fall back to ISA interrupt mode */
  552. mask = pd6729_isa_scan();
  553. if (irq_mode == 0 && mask == 0) {
  554. dev_warn(&dev->dev, "no ISA interrupt is available.\n");
  555. goto err_out_free_res;
  556. }
  557. for (i = 0; i < MAX_SOCKETS; i++) {
  558. socket[i].io_base = pci_resource_start(dev, 0);
  559. socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  560. socket[i].socket.map_size = 0x1000;
  561. socket[i].socket.irq_mask = mask;
  562. socket[i].socket.pci_irq = dev->irq;
  563. socket[i].socket.cb_dev = dev;
  564. socket[i].socket.owner = THIS_MODULE;
  565. socket[i].number = i;
  566. socket[i].socket.ops = &pd6729_operations;
  567. socket[i].socket.resource_ops = &pccard_nonstatic_ops;
  568. socket[i].socket.dev.parent = &dev->dev;
  569. socket[i].socket.driver_data = &socket[i];
  570. }
  571. pci_set_drvdata(dev, socket);
  572. if (irq_mode == 1) {
  573. /* Register the interrupt handler */
  574. ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED,
  575. "pd6729", socket);
  576. if (ret) {
  577. dev_err(&dev->dev, "Failed to register irq %d\n",
  578. dev->irq);
  579. goto err_out_free_res;
  580. }
  581. } else {
  582. /* poll Card status change */
  583. init_timer(&socket->poll_timer);
  584. socket->poll_timer.function = pd6729_interrupt_wrapper;
  585. socket->poll_timer.data = (unsigned long)socket;
  586. socket->poll_timer.expires = jiffies + HZ;
  587. add_timer(&socket->poll_timer);
  588. }
  589. for (i = 0; i < MAX_SOCKETS; i++) {
  590. ret = pcmcia_register_socket(&socket[i].socket);
  591. if (ret) {
  592. dev_warn(&dev->dev, "pcmcia_register_socket failed.\n");
  593. for (j = 0; j < i ; j++)
  594. pcmcia_unregister_socket(&socket[j].socket);
  595. goto err_out_free_res2;
  596. }
  597. }
  598. return 0;
  599. err_out_free_res2:
  600. if (irq_mode == 1)
  601. free_irq(dev->irq, socket);
  602. else
  603. del_timer_sync(&socket->poll_timer);
  604. err_out_free_res:
  605. pci_release_regions(dev);
  606. err_out_disable:
  607. pci_disable_device(dev);
  608. err_out_free_mem:
  609. kfree(socket);
  610. return ret;
  611. }
  612. static void __devexit pd6729_pci_remove(struct pci_dev *dev)
  613. {
  614. int i;
  615. struct pd6729_socket *socket = pci_get_drvdata(dev);
  616. for (i = 0; i < MAX_SOCKETS; i++) {
  617. /* Turn off all interrupt sources */
  618. indirect_write(&socket[i], I365_CSCINT, 0);
  619. indirect_write(&socket[i], I365_INTCTL, 0);
  620. pcmcia_unregister_socket(&socket[i].socket);
  621. }
  622. if (irq_mode == 1)
  623. free_irq(dev->irq, socket);
  624. else
  625. del_timer_sync(&socket->poll_timer);
  626. pci_release_regions(dev);
  627. pci_disable_device(dev);
  628. kfree(socket);
  629. }
  630. static struct pci_device_id pd6729_pci_ids[] = {
  631. {
  632. .vendor = PCI_VENDOR_ID_CIRRUS,
  633. .device = PCI_DEVICE_ID_CIRRUS_6729,
  634. .subvendor = PCI_ANY_ID,
  635. .subdevice = PCI_ANY_ID,
  636. },
  637. { }
  638. };
  639. MODULE_DEVICE_TABLE(pci, pd6729_pci_ids);
  640. static struct pci_driver pd6729_pci_driver = {
  641. .name = "pd6729",
  642. .id_table = pd6729_pci_ids,
  643. .probe = pd6729_pci_probe,
  644. .remove = __devexit_p(pd6729_pci_remove),
  645. };
  646. static int pd6729_module_init(void)
  647. {
  648. return pci_register_driver(&pd6729_pci_driver);
  649. }
  650. static void pd6729_module_exit(void)
  651. {
  652. pci_unregister_driver(&pd6729_pci_driver);
  653. }
  654. module_init(pd6729_module_init);
  655. module_exit(pd6729_module_exit);