cpqphp_core.c 36 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/slab.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/pci.h>
  38. #include <linux/pci_hotplug.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include "cpqphp.h"
  43. #include "cpqphp_nvram.h"
  44. /* Global variables */
  45. int cpqhp_debug;
  46. int cpqhp_legacy_mode;
  47. struct controller *cpqhp_ctrl_list; /* = NULL */
  48. struct pci_func *cpqhp_slot_list[256];
  49. struct irq_routing_table *cpqhp_routing_table;
  50. /* local variables */
  51. static void __iomem *smbios_table;
  52. static void __iomem *smbios_start;
  53. static void __iomem *cpqhp_rom_start;
  54. static int power_mode;
  55. static int debug;
  56. static int initialized;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static inline int is_slot64bit(struct slot *slot)
  69. {
  70. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  71. }
  72. static inline int is_slot66mhz(struct slot *slot)
  73. {
  74. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  75. }
  76. /**
  77. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  78. * @begin: begin pointer for region to be scanned.
  79. * @end: end pointer for region to be scanned.
  80. *
  81. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  82. */
  83. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  84. {
  85. void __iomem *fp;
  86. void __iomem *endp;
  87. u8 temp1, temp2, temp3, temp4;
  88. int status = 0;
  89. endp = (end - sizeof(u32) + 1);
  90. for (fp = begin; fp <= endp; fp += 16) {
  91. temp1 = readb(fp);
  92. temp2 = readb(fp+1);
  93. temp3 = readb(fp+2);
  94. temp4 = readb(fp+3);
  95. if (temp1 == '_' &&
  96. temp2 == 'S' &&
  97. temp3 == 'M' &&
  98. temp4 == '_') {
  99. status = 1;
  100. break;
  101. }
  102. }
  103. if (!status)
  104. fp = NULL;
  105. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  106. return fp;
  107. }
  108. /**
  109. * init_SERR - Initializes the per slot SERR generation.
  110. * @ctrl: controller to use
  111. *
  112. * For unexpected switch opens
  113. */
  114. static int init_SERR(struct controller * ctrl)
  115. {
  116. u32 tempdword;
  117. u32 number_of_slots;
  118. u8 physical_slot;
  119. if (!ctrl)
  120. return 1;
  121. tempdword = ctrl->first_slot;
  122. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  123. /* Loop through slots */
  124. while (number_of_slots) {
  125. physical_slot = tempdword;
  126. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  127. tempdword++;
  128. number_of_slots--;
  129. }
  130. return 0;
  131. }
  132. static int init_cpqhp_routing_table(void)
  133. {
  134. int len;
  135. cpqhp_routing_table = pcibios_get_irq_routing_table();
  136. if (cpqhp_routing_table == NULL)
  137. return -ENOMEM;
  138. len = cpqhp_routing_table_length();
  139. if (len == 0) {
  140. kfree(cpqhp_routing_table);
  141. cpqhp_routing_table = NULL;
  142. return -1;
  143. }
  144. return 0;
  145. }
  146. /* nice debugging output */
  147. static void pci_print_IRQ_route(void)
  148. {
  149. int len;
  150. int loop;
  151. u8 tbus, tdevice, tslot;
  152. len = cpqhp_routing_table_length();
  153. dbg("bus dev func slot\n");
  154. for (loop = 0; loop < len; ++loop) {
  155. tbus = cpqhp_routing_table->slots[loop].bus;
  156. tdevice = cpqhp_routing_table->slots[loop].devfn;
  157. tslot = cpqhp_routing_table->slots[loop].slot;
  158. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  159. }
  160. return;
  161. }
  162. /**
  163. * get_subsequent_smbios_entry: get the next entry from bios table.
  164. * @smbios_start: where to start in the SMBIOS table
  165. * @smbios_table: location of the SMBIOS table
  166. * @curr: %NULL or pointer to previously returned structure
  167. *
  168. * Gets the first entry if previous == NULL;
  169. * otherwise, returns the next entry.
  170. * Uses global SMBIOS Table pointer.
  171. *
  172. * Returns a pointer to an SMBIOS structure or NULL if none found.
  173. */
  174. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  175. void __iomem *smbios_table,
  176. void __iomem *curr)
  177. {
  178. u8 bail = 0;
  179. u8 previous_byte = 1;
  180. void __iomem *p_temp;
  181. void __iomem *p_max;
  182. if (!smbios_table || !curr)
  183. return NULL;
  184. /* set p_max to the end of the table */
  185. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  186. p_temp = curr;
  187. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  188. while ((p_temp < p_max) && !bail) {
  189. /* Look for the double NULL terminator
  190. * The first condition is the previous byte
  191. * and the second is the curr
  192. */
  193. if (!previous_byte && !(readb(p_temp)))
  194. bail = 1;
  195. previous_byte = readb(p_temp);
  196. p_temp++;
  197. }
  198. if (p_temp < p_max)
  199. return p_temp;
  200. else
  201. return NULL;
  202. }
  203. /**
  204. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  205. * @smbios_start: where to start in the SMBIOS table
  206. * @smbios_table: location of the SMBIOS table
  207. * @type: SMBIOS structure type to be returned
  208. * @previous: %NULL or pointer to previously returned structure
  209. *
  210. * Gets the first entry of the specified type if previous == %NULL;
  211. * Otherwise, returns the next entry of the given type.
  212. * Uses global SMBIOS Table pointer.
  213. * Uses get_subsequent_smbios_entry.
  214. *
  215. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  216. */
  217. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  218. void __iomem *smbios_table,
  219. u8 type,
  220. void __iomem *previous)
  221. {
  222. if (!smbios_table)
  223. return NULL;
  224. if (!previous)
  225. previous = smbios_start;
  226. else
  227. previous = get_subsequent_smbios_entry(smbios_start,
  228. smbios_table, previous);
  229. while (previous)
  230. if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
  231. previous = get_subsequent_smbios_entry(smbios_start,
  232. smbios_table, previous);
  233. else
  234. break;
  235. return previous;
  236. }
  237. static void release_slot(struct hotplug_slot *hotplug_slot)
  238. {
  239. struct slot *slot = hotplug_slot->private;
  240. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  241. kfree(slot->hotplug_slot->info);
  242. kfree(slot->hotplug_slot);
  243. kfree(slot);
  244. }
  245. static int ctrl_slot_cleanup (struct controller * ctrl)
  246. {
  247. struct slot *old_slot, *next_slot;
  248. old_slot = ctrl->slot;
  249. ctrl->slot = NULL;
  250. while (old_slot) {
  251. /* memory will be freed by the release_slot callback */
  252. next_slot = old_slot->next;
  253. pci_hp_deregister (old_slot->hotplug_slot);
  254. old_slot = next_slot;
  255. }
  256. cpqhp_remove_debugfs_files(ctrl);
  257. /* Free IRQ associated with hot plug device */
  258. free_irq(ctrl->interrupt, ctrl);
  259. /* Unmap the memory */
  260. iounmap(ctrl->hpc_reg);
  261. /* Finally reclaim PCI mem */
  262. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  263. pci_resource_len(ctrl->pci_dev, 0));
  264. return 0;
  265. }
  266. /**
  267. * get_slot_mapping - determine logical slot mapping for PCI device
  268. *
  269. * Won't work for more than one PCI-PCI bridge in a slot.
  270. *
  271. * @bus_num - bus number of PCI device
  272. * @dev_num - device number of PCI device
  273. * @slot - Pointer to u8 where slot number will be returned
  274. *
  275. * Output: SUCCESS or FAILURE
  276. */
  277. static int
  278. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  279. {
  280. u32 work;
  281. long len;
  282. long loop;
  283. u8 tbus, tdevice, tslot, bridgeSlot;
  284. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  285. bridgeSlot = 0xFF;
  286. len = cpqhp_routing_table_length();
  287. for (loop = 0; loop < len; ++loop) {
  288. tbus = cpqhp_routing_table->slots[loop].bus;
  289. tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
  290. tslot = cpqhp_routing_table->slots[loop].slot;
  291. if ((tbus == bus_num) && (tdevice == dev_num)) {
  292. *slot = tslot;
  293. return 0;
  294. } else {
  295. /* Did not get a match on the target PCI device. Check
  296. * if the current IRQ table entry is a PCI-to-PCI
  297. * bridge device. If so, and it's secondary bus
  298. * matches the bus number for the target device, I need
  299. * to save the bridge's slot number. If I can not find
  300. * an entry for the target device, I will have to
  301. * assume it's on the other side of the bridge, and
  302. * assign it the bridge's slot.
  303. */
  304. bus->number = tbus;
  305. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  306. PCI_CLASS_REVISION, &work);
  307. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  308. pci_bus_read_config_dword(bus,
  309. PCI_DEVFN(tdevice, 0),
  310. PCI_PRIMARY_BUS, &work);
  311. // See if bridge's secondary bus matches target bus.
  312. if (((work >> 8) & 0x000000FF) == (long) bus_num)
  313. bridgeSlot = tslot;
  314. }
  315. }
  316. }
  317. /* If we got here, we didn't find an entry in the IRQ mapping table for
  318. * the target PCI device. If we did determine that the target device
  319. * is on the other side of a PCI-to-PCI bridge, return the slot number
  320. * for the bridge.
  321. */
  322. if (bridgeSlot != 0xFF) {
  323. *slot = bridgeSlot;
  324. return 0;
  325. }
  326. /* Couldn't find an entry in the routing table for this PCI device */
  327. return -1;
  328. }
  329. /**
  330. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  331. * @ctrl: struct controller to use
  332. * @func: PCI device/function info
  333. * @status: LED control flag: 1 = LED on, 0 = LED off
  334. */
  335. static int
  336. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  337. u32 status)
  338. {
  339. u8 hp_slot;
  340. if (func == NULL)
  341. return 1;
  342. hp_slot = func->device - ctrl->slot_device_offset;
  343. /* Wait for exclusive access to hardware */
  344. mutex_lock(&ctrl->crit_sect);
  345. if (status == 1)
  346. amber_LED_on (ctrl, hp_slot);
  347. else if (status == 0)
  348. amber_LED_off (ctrl, hp_slot);
  349. else {
  350. /* Done with exclusive hardware access */
  351. mutex_unlock(&ctrl->crit_sect);
  352. return 1;
  353. }
  354. set_SOGO(ctrl);
  355. /* Wait for SOBS to be unset */
  356. wait_for_ctrl_irq (ctrl);
  357. /* Done with exclusive hardware access */
  358. mutex_unlock(&ctrl->crit_sect);
  359. return 0;
  360. }
  361. /**
  362. * set_attention_status - Turns the Amber LED for a slot on or off
  363. * @hotplug_slot: slot to change LED on
  364. * @status: LED control flag
  365. */
  366. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  367. {
  368. struct pci_func *slot_func;
  369. struct slot *slot = hotplug_slot->private;
  370. struct controller *ctrl = slot->ctrl;
  371. u8 bus;
  372. u8 devfn;
  373. u8 device;
  374. u8 function;
  375. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  376. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  377. return -ENODEV;
  378. device = devfn >> 3;
  379. function = devfn & 0x7;
  380. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  381. slot_func = cpqhp_slot_find(bus, device, function);
  382. if (!slot_func)
  383. return -ENODEV;
  384. return cpqhp_set_attention_status(ctrl, slot_func, status);
  385. }
  386. static int process_SI(struct hotplug_slot *hotplug_slot)
  387. {
  388. struct pci_func *slot_func;
  389. struct slot *slot = hotplug_slot->private;
  390. struct controller *ctrl = slot->ctrl;
  391. u8 bus;
  392. u8 devfn;
  393. u8 device;
  394. u8 function;
  395. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  396. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  397. return -ENODEV;
  398. device = devfn >> 3;
  399. function = devfn & 0x7;
  400. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  401. slot_func = cpqhp_slot_find(bus, device, function);
  402. if (!slot_func)
  403. return -ENODEV;
  404. slot_func->bus = bus;
  405. slot_func->device = device;
  406. slot_func->function = function;
  407. slot_func->configured = 0;
  408. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  409. return cpqhp_process_SI(ctrl, slot_func);
  410. }
  411. static int process_SS(struct hotplug_slot *hotplug_slot)
  412. {
  413. struct pci_func *slot_func;
  414. struct slot *slot = hotplug_slot->private;
  415. struct controller *ctrl = slot->ctrl;
  416. u8 bus;
  417. u8 devfn;
  418. u8 device;
  419. u8 function;
  420. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  421. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  422. return -ENODEV;
  423. device = devfn >> 3;
  424. function = devfn & 0x7;
  425. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  426. slot_func = cpqhp_slot_find(bus, device, function);
  427. if (!slot_func)
  428. return -ENODEV;
  429. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  430. return cpqhp_process_SS(ctrl, slot_func);
  431. }
  432. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  433. {
  434. struct slot *slot = hotplug_slot->private;
  435. struct controller *ctrl = slot->ctrl;
  436. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  437. return cpqhp_hardware_test(ctrl, value);
  438. }
  439. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  440. {
  441. struct slot *slot = hotplug_slot->private;
  442. struct controller *ctrl = slot->ctrl;
  443. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  444. *value = get_slot_enabled(ctrl, slot);
  445. return 0;
  446. }
  447. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  448. {
  449. struct slot *slot = hotplug_slot->private;
  450. struct controller *ctrl = slot->ctrl;
  451. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  452. *value = cpq_get_attention_status(ctrl, slot);
  453. return 0;
  454. }
  455. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  456. {
  457. struct slot *slot = hotplug_slot->private;
  458. struct controller *ctrl = slot->ctrl;
  459. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  460. *value = cpq_get_latch_status(ctrl, slot);
  461. return 0;
  462. }
  463. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  464. {
  465. struct slot *slot = hotplug_slot->private;
  466. struct controller *ctrl = slot->ctrl;
  467. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  468. *value = get_presence_status(ctrl, slot);
  469. return 0;
  470. }
  471. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  472. .set_attention_status = set_attention_status,
  473. .enable_slot = process_SI,
  474. .disable_slot = process_SS,
  475. .hardware_test = hardware_test,
  476. .get_power_status = get_power_status,
  477. .get_attention_status = get_attention_status,
  478. .get_latch_status = get_latch_status,
  479. .get_adapter_status = get_adapter_status,
  480. };
  481. #define SLOT_NAME_SIZE 10
  482. static int ctrl_slot_setup(struct controller *ctrl,
  483. void __iomem *smbios_start,
  484. void __iomem *smbios_table)
  485. {
  486. struct slot *slot;
  487. struct hotplug_slot *hotplug_slot;
  488. struct hotplug_slot_info *hotplug_slot_info;
  489. struct pci_bus *bus = ctrl->pci_bus;
  490. u8 number_of_slots;
  491. u8 slot_device;
  492. u8 slot_number;
  493. u8 ctrl_slot;
  494. u32 tempdword;
  495. char name[SLOT_NAME_SIZE];
  496. void __iomem *slot_entry= NULL;
  497. int result = -ENOMEM;
  498. dbg("%s\n", __func__);
  499. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  500. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  501. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  502. slot_number = ctrl->first_slot;
  503. while (number_of_slots) {
  504. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  505. if (!slot)
  506. goto error;
  507. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  508. GFP_KERNEL);
  509. if (!slot->hotplug_slot)
  510. goto error_slot;
  511. hotplug_slot = slot->hotplug_slot;
  512. hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
  513. GFP_KERNEL);
  514. if (!hotplug_slot->info)
  515. goto error_hpslot;
  516. hotplug_slot_info = hotplug_slot->info;
  517. slot->ctrl = ctrl;
  518. slot->bus = ctrl->bus;
  519. slot->device = slot_device;
  520. slot->number = slot_number;
  521. dbg("slot->number = %u\n", slot->number);
  522. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  523. slot_entry);
  524. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  525. slot->number)) {
  526. slot_entry = get_SMBIOS_entry(smbios_start,
  527. smbios_table, 9, slot_entry);
  528. }
  529. slot->p_sm_slot = slot_entry;
  530. init_timer(&slot->task_event);
  531. slot->task_event.expires = jiffies + 5 * HZ;
  532. slot->task_event.function = cpqhp_pushbutton_thread;
  533. /*FIXME: these capabilities aren't used but if they are
  534. * they need to be correctly implemented
  535. */
  536. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  537. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  538. if (is_slot64bit(slot))
  539. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  540. if (is_slot66mhz(slot))
  541. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  542. if (bus->cur_bus_speed == PCI_SPEED_66MHz)
  543. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  544. ctrl_slot =
  545. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  546. /* Check presence */
  547. slot->capabilities |=
  548. ((((~tempdword) >> 23) |
  549. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  550. /* Check the switch state */
  551. slot->capabilities |=
  552. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  553. /* Check the slot enable */
  554. slot->capabilities |=
  555. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  556. /* register this slot with the hotplug pci core */
  557. hotplug_slot->release = &release_slot;
  558. hotplug_slot->private = slot;
  559. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  560. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  561. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  562. hotplug_slot_info->attention_status =
  563. cpq_get_attention_status(ctrl, slot);
  564. hotplug_slot_info->latch_status =
  565. cpq_get_latch_status(ctrl, slot);
  566. hotplug_slot_info->adapter_status =
  567. get_presence_status(ctrl, slot);
  568. dbg("registering bus %d, dev %d, number %d, "
  569. "ctrl->slot_device_offset %d, slot %d\n",
  570. slot->bus, slot->device,
  571. slot->number, ctrl->slot_device_offset,
  572. slot_number);
  573. result = pci_hp_register(hotplug_slot,
  574. ctrl->pci_dev->bus,
  575. slot->device,
  576. name);
  577. if (result) {
  578. err("pci_hp_register failed with error %d\n", result);
  579. goto error_info;
  580. }
  581. slot->next = ctrl->slot;
  582. ctrl->slot = slot;
  583. number_of_slots--;
  584. slot_device++;
  585. slot_number++;
  586. }
  587. return 0;
  588. error_info:
  589. kfree(hotplug_slot_info);
  590. error_hpslot:
  591. kfree(hotplug_slot);
  592. error_slot:
  593. kfree(slot);
  594. error:
  595. return result;
  596. }
  597. static int one_time_init(void)
  598. {
  599. int loop;
  600. int retval = 0;
  601. if (initialized)
  602. return 0;
  603. power_mode = 0;
  604. retval = init_cpqhp_routing_table();
  605. if (retval)
  606. goto error;
  607. if (cpqhp_debug)
  608. pci_print_IRQ_route();
  609. dbg("Initialize + Start the notification mechanism \n");
  610. retval = cpqhp_event_start_thread();
  611. if (retval)
  612. goto error;
  613. dbg("Initialize slot lists\n");
  614. for (loop = 0; loop < 256; loop++)
  615. cpqhp_slot_list[loop] = NULL;
  616. /* FIXME: We also need to hook the NMI handler eventually.
  617. * this also needs to be worked with Christoph
  618. * register_NMI_handler();
  619. */
  620. /* Map rom address */
  621. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  622. if (!cpqhp_rom_start) {
  623. err ("Could not ioremap memory region for ROM\n");
  624. retval = -EIO;
  625. goto error;
  626. }
  627. /* Now, map the int15 entry point if we are on compaq specific
  628. * hardware
  629. */
  630. compaq_nvram_init(cpqhp_rom_start);
  631. /* Map smbios table entry point structure */
  632. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  633. cpqhp_rom_start + ROM_PHY_LEN);
  634. if (!smbios_table) {
  635. err ("Could not find the SMBIOS pointer in memory\n");
  636. retval = -EIO;
  637. goto error_rom_start;
  638. }
  639. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  640. readw(smbios_table + ST_LENGTH));
  641. if (!smbios_start) {
  642. err ("Could not ioremap memory region taken from SMBIOS values\n");
  643. retval = -EIO;
  644. goto error_smbios_start;
  645. }
  646. initialized = 1;
  647. return retval;
  648. error_smbios_start:
  649. iounmap(smbios_start);
  650. error_rom_start:
  651. iounmap(cpqhp_rom_start);
  652. error:
  653. return retval;
  654. }
  655. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  656. {
  657. u8 num_of_slots = 0;
  658. u8 hp_slot = 0;
  659. u8 device;
  660. u8 bus_cap;
  661. u16 temp_word;
  662. u16 vendor_id;
  663. u16 subsystem_vid;
  664. u16 subsystem_deviceid;
  665. u32 rc;
  666. struct controller *ctrl;
  667. struct pci_func *func;
  668. struct pci_bus *bus;
  669. int err;
  670. err = pci_enable_device(pdev);
  671. if (err) {
  672. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  673. pci_name(pdev), err);
  674. return err;
  675. }
  676. bus = pdev->subordinate;
  677. if (!bus) {
  678. dev_notice(&pdev->dev, "the device is not a bridge, "
  679. "skipping\n");
  680. rc = -ENODEV;
  681. goto err_disable_device;
  682. }
  683. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  684. * discovery
  685. */
  686. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  687. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  688. err(msg_HPC_non_compaq_or_intel);
  689. rc = -ENODEV;
  690. goto err_disable_device;
  691. }
  692. dbg("Vendor ID: %x\n", vendor_id);
  693. dbg("revision: %d\n", pdev->revision);
  694. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  695. err(msg_HPC_rev_error);
  696. rc = -ENODEV;
  697. goto err_disable_device;
  698. }
  699. /* Check for the proper subsystem ID's
  700. * Intel uses a different SSID programming model than Compaq.
  701. * For Intel, each SSID bit identifies a PHP capability.
  702. * Also Intel HPC's may have RID=0.
  703. */
  704. if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
  705. err(msg_HPC_not_supported);
  706. return -ENODEV;
  707. }
  708. /* TODO: This code can be made to support non-Compaq or Intel
  709. * subsystem IDs
  710. */
  711. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  712. if (rc) {
  713. err("%s : pci_read_config_word failed\n", __func__);
  714. goto err_disable_device;
  715. }
  716. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  717. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  718. err(msg_HPC_non_compaq_or_intel);
  719. rc = -ENODEV;
  720. goto err_disable_device;
  721. }
  722. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  723. if (!ctrl) {
  724. err("%s : out of memory\n", __func__);
  725. rc = -ENOMEM;
  726. goto err_disable_device;
  727. }
  728. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  729. if (rc) {
  730. err("%s : pci_read_config_word failed\n", __func__);
  731. goto err_free_ctrl;
  732. }
  733. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  734. /* Set Vendor ID, so it can be accessed later from other
  735. * functions
  736. */
  737. ctrl->vendor_id = vendor_id;
  738. switch (subsystem_vid) {
  739. case PCI_VENDOR_ID_COMPAQ:
  740. if (pdev->revision >= 0x13) { /* CIOBX */
  741. ctrl->push_flag = 1;
  742. ctrl->slot_switch_type = 1;
  743. ctrl->push_button = 1;
  744. ctrl->pci_config_space = 1;
  745. ctrl->defeature_PHP = 1;
  746. ctrl->pcix_support = 1;
  747. ctrl->pcix_speed_capability = 1;
  748. pci_read_config_byte(pdev, 0x41, &bus_cap);
  749. if (bus_cap & 0x80) {
  750. dbg("bus max supports 133MHz PCI-X\n");
  751. bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
  752. break;
  753. }
  754. if (bus_cap & 0x40) {
  755. dbg("bus max supports 100MHz PCI-X\n");
  756. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  757. break;
  758. }
  759. if (bus_cap & 20) {
  760. dbg("bus max supports 66MHz PCI-X\n");
  761. bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
  762. break;
  763. }
  764. if (bus_cap & 10) {
  765. dbg("bus max supports 66MHz PCI\n");
  766. bus->max_bus_speed = PCI_SPEED_66MHz;
  767. break;
  768. }
  769. break;
  770. }
  771. switch (subsystem_deviceid) {
  772. case PCI_SUB_HPC_ID:
  773. /* Original 6500/7000 implementation */
  774. ctrl->slot_switch_type = 1;
  775. bus->max_bus_speed = PCI_SPEED_33MHz;
  776. ctrl->push_button = 0;
  777. ctrl->pci_config_space = 1;
  778. ctrl->defeature_PHP = 1;
  779. ctrl->pcix_support = 0;
  780. ctrl->pcix_speed_capability = 0;
  781. break;
  782. case PCI_SUB_HPC_ID2:
  783. /* First Pushbutton implementation */
  784. ctrl->push_flag = 1;
  785. ctrl->slot_switch_type = 1;
  786. bus->max_bus_speed = PCI_SPEED_33MHz;
  787. ctrl->push_button = 1;
  788. ctrl->pci_config_space = 1;
  789. ctrl->defeature_PHP = 1;
  790. ctrl->pcix_support = 0;
  791. ctrl->pcix_speed_capability = 0;
  792. break;
  793. case PCI_SUB_HPC_ID_INTC:
  794. /* Third party (6500/7000) */
  795. ctrl->slot_switch_type = 1;
  796. bus->max_bus_speed = PCI_SPEED_33MHz;
  797. ctrl->push_button = 0;
  798. ctrl->pci_config_space = 1;
  799. ctrl->defeature_PHP = 1;
  800. ctrl->pcix_support = 0;
  801. ctrl->pcix_speed_capability = 0;
  802. break;
  803. case PCI_SUB_HPC_ID3:
  804. /* First 66 Mhz implementation */
  805. ctrl->push_flag = 1;
  806. ctrl->slot_switch_type = 1;
  807. bus->max_bus_speed = PCI_SPEED_66MHz;
  808. ctrl->push_button = 1;
  809. ctrl->pci_config_space = 1;
  810. ctrl->defeature_PHP = 1;
  811. ctrl->pcix_support = 0;
  812. ctrl->pcix_speed_capability = 0;
  813. break;
  814. case PCI_SUB_HPC_ID4:
  815. /* First PCI-X implementation, 100MHz */
  816. ctrl->push_flag = 1;
  817. ctrl->slot_switch_type = 1;
  818. bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
  819. ctrl->push_button = 1;
  820. ctrl->pci_config_space = 1;
  821. ctrl->defeature_PHP = 1;
  822. ctrl->pcix_support = 1;
  823. ctrl->pcix_speed_capability = 0;
  824. break;
  825. default:
  826. err(msg_HPC_not_supported);
  827. rc = -ENODEV;
  828. goto err_free_ctrl;
  829. }
  830. break;
  831. case PCI_VENDOR_ID_INTEL:
  832. /* Check for speed capability (0=33, 1=66) */
  833. if (subsystem_deviceid & 0x0001)
  834. bus->max_bus_speed = PCI_SPEED_66MHz;
  835. else
  836. bus->max_bus_speed = PCI_SPEED_33MHz;
  837. /* Check for push button */
  838. if (subsystem_deviceid & 0x0002)
  839. ctrl->push_button = 0;
  840. else
  841. ctrl->push_button = 1;
  842. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  843. if (subsystem_deviceid & 0x0004)
  844. ctrl->slot_switch_type = 0;
  845. else
  846. ctrl->slot_switch_type = 1;
  847. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  848. if (subsystem_deviceid & 0x0008)
  849. ctrl->defeature_PHP = 1; /* PHP supported */
  850. else
  851. ctrl->defeature_PHP = 0; /* PHP not supported */
  852. /* Alternate Base Address Register Interface
  853. * (0=not supported, 1=supported)
  854. */
  855. if (subsystem_deviceid & 0x0010)
  856. ctrl->alternate_base_address = 1;
  857. else
  858. ctrl->alternate_base_address = 0;
  859. /* PCI Config Space Index (0=not supported, 1=supported) */
  860. if (subsystem_deviceid & 0x0020)
  861. ctrl->pci_config_space = 1;
  862. else
  863. ctrl->pci_config_space = 0;
  864. /* PCI-X support */
  865. if (subsystem_deviceid & 0x0080) {
  866. ctrl->pcix_support = 1;
  867. if (subsystem_deviceid & 0x0040)
  868. /* 133MHz PCI-X if bit 7 is 1 */
  869. ctrl->pcix_speed_capability = 1;
  870. else
  871. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  872. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  873. ctrl->pcix_speed_capability = 0;
  874. } else {
  875. /* Conventional PCI */
  876. ctrl->pcix_support = 0;
  877. ctrl->pcix_speed_capability = 0;
  878. }
  879. break;
  880. default:
  881. err(msg_HPC_not_supported);
  882. rc = -ENODEV;
  883. goto err_free_ctrl;
  884. }
  885. /* Tell the user that we found one. */
  886. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  887. pdev->bus->number);
  888. dbg("Hotplug controller capabilities:\n");
  889. dbg(" speed_capability %d\n", bus->max_bus_speed);
  890. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  891. "switch present" : "no switch");
  892. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  893. "PHP supported" : "PHP not supported");
  894. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  895. "supported" : "not supported");
  896. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  897. "supported" : "not supported");
  898. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  899. "supported" : "not supported");
  900. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  901. "supported" : "not supported");
  902. ctrl->pci_dev = pdev;
  903. pci_set_drvdata(pdev, ctrl);
  904. /* make our own copy of the pci bus structure,
  905. * as we like tweaking it a lot */
  906. ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
  907. if (!ctrl->pci_bus) {
  908. err("out of memory\n");
  909. rc = -ENOMEM;
  910. goto err_free_ctrl;
  911. }
  912. ctrl->bus = pdev->bus->number;
  913. ctrl->rev = pdev->revision;
  914. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  915. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  916. mutex_init(&ctrl->crit_sect);
  917. init_waitqueue_head(&ctrl->queue);
  918. /* initialize our threads if they haven't already been started up */
  919. rc = one_time_init();
  920. if (rc) {
  921. goto err_free_bus;
  922. }
  923. dbg("pdev = %p\n", pdev);
  924. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  925. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  926. if (!request_mem_region(pci_resource_start(pdev, 0),
  927. pci_resource_len(pdev, 0), MY_NAME)) {
  928. err("cannot reserve MMIO region\n");
  929. rc = -ENOMEM;
  930. goto err_free_bus;
  931. }
  932. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  933. pci_resource_len(pdev, 0));
  934. if (!ctrl->hpc_reg) {
  935. err("cannot remap MMIO region %llx @ %llx\n",
  936. (unsigned long long)pci_resource_len(pdev, 0),
  937. (unsigned long long)pci_resource_start(pdev, 0));
  938. rc = -ENODEV;
  939. goto err_free_mem_region;
  940. }
  941. /* Check for 66Mhz operation */
  942. bus->cur_bus_speed = get_controller_speed(ctrl);
  943. /********************************************************
  944. *
  945. * Save configuration headers for this and
  946. * subordinate PCI buses
  947. *
  948. ********************************************************/
  949. /* find the physical slot number of the first hot plug slot */
  950. /* Get slot won't work for devices behind bridges, but
  951. * in this case it will always be called for the "base"
  952. * bus/dev/func of a slot.
  953. * CS: this is leveraging the PCIIRQ routing code from the kernel
  954. * (pci-pc.c: get_irq_routing_table) */
  955. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  956. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  957. &(ctrl->first_slot));
  958. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  959. ctrl->first_slot, rc);
  960. if (rc) {
  961. err(msg_initialization_err, rc);
  962. goto err_iounmap;
  963. }
  964. /* Store PCI Config Space for all devices on this bus */
  965. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  966. if (rc) {
  967. err("%s: unable to save PCI configuration data, error %d\n",
  968. __func__, rc);
  969. goto err_iounmap;
  970. }
  971. /*
  972. * Get IO, memory, and IRQ resources for new devices
  973. */
  974. /* The next line is required for cpqhp_find_available_resources */
  975. ctrl->interrupt = pdev->irq;
  976. if (ctrl->interrupt < 0x10) {
  977. cpqhp_legacy_mode = 1;
  978. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  979. }
  980. ctrl->cfgspc_irq = 0;
  981. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  982. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  983. ctrl->add_support = !rc;
  984. if (rc) {
  985. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  986. err("unable to locate PCI configuration resources for hot plug add.\n");
  987. goto err_iounmap;
  988. }
  989. /*
  990. * Finish setting up the hot plug ctrl device
  991. */
  992. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  993. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  994. ctrl->next_event = 0;
  995. /* Setup the slot information structures */
  996. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  997. if (rc) {
  998. err(msg_initialization_err, 6);
  999. err("%s: unable to save PCI configuration data, error %d\n",
  1000. __func__, rc);
  1001. goto err_iounmap;
  1002. }
  1003. /* Mask all general input interrupts */
  1004. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  1005. /* set up the interrupt */
  1006. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  1007. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  1008. IRQF_SHARED, MY_NAME, ctrl)) {
  1009. err("Can't get irq %d for the hotplug pci controller\n",
  1010. ctrl->interrupt);
  1011. rc = -ENODEV;
  1012. goto err_iounmap;
  1013. }
  1014. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  1015. * fault
  1016. */
  1017. temp_word = readw(ctrl->hpc_reg + MISC);
  1018. temp_word |= 0x4006;
  1019. writew(temp_word, ctrl->hpc_reg + MISC);
  1020. /* Changed 05/05/97 to clear all interrupts at start */
  1021. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1022. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1023. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1024. if (!cpqhp_ctrl_list) {
  1025. cpqhp_ctrl_list = ctrl;
  1026. ctrl->next = NULL;
  1027. } else {
  1028. ctrl->next = cpqhp_ctrl_list;
  1029. cpqhp_ctrl_list = ctrl;
  1030. }
  1031. /* turn off empty slots here unless command line option "ON" set
  1032. * Wait for exclusive access to hardware
  1033. */
  1034. mutex_lock(&ctrl->crit_sect);
  1035. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1036. /* find first device number for the ctrl */
  1037. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1038. while (num_of_slots) {
  1039. dbg("num_of_slots: %d\n", num_of_slots);
  1040. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1041. if (!func)
  1042. break;
  1043. hp_slot = func->device - ctrl->slot_device_offset;
  1044. dbg("hp_slot: %d\n", hp_slot);
  1045. /* We have to save the presence info for these slots */
  1046. temp_word = ctrl->ctrl_int_comp >> 16;
  1047. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1048. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1049. if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
  1050. func->switch_save = 0;
  1051. else
  1052. func->switch_save = 0x10;
  1053. if (!power_mode)
  1054. if (!func->is_a_board) {
  1055. green_LED_off(ctrl, hp_slot);
  1056. slot_disable(ctrl, hp_slot);
  1057. }
  1058. device++;
  1059. num_of_slots--;
  1060. }
  1061. if (!power_mode) {
  1062. set_SOGO(ctrl);
  1063. /* Wait for SOBS to be unset */
  1064. wait_for_ctrl_irq(ctrl);
  1065. }
  1066. rc = init_SERR(ctrl);
  1067. if (rc) {
  1068. err("init_SERR failed\n");
  1069. mutex_unlock(&ctrl->crit_sect);
  1070. goto err_free_irq;
  1071. }
  1072. /* Done with exclusive hardware access */
  1073. mutex_unlock(&ctrl->crit_sect);
  1074. cpqhp_create_debugfs_files(ctrl);
  1075. return 0;
  1076. err_free_irq:
  1077. free_irq(ctrl->interrupt, ctrl);
  1078. err_iounmap:
  1079. iounmap(ctrl->hpc_reg);
  1080. err_free_mem_region:
  1081. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1082. err_free_bus:
  1083. kfree(ctrl->pci_bus);
  1084. err_free_ctrl:
  1085. kfree(ctrl);
  1086. err_disable_device:
  1087. pci_disable_device(pdev);
  1088. return rc;
  1089. }
  1090. static void __exit unload_cpqphpd(void)
  1091. {
  1092. struct pci_func *next;
  1093. struct pci_func *TempSlot;
  1094. int loop;
  1095. u32 rc;
  1096. struct controller *ctrl;
  1097. struct controller *tctrl;
  1098. struct pci_resource *res;
  1099. struct pci_resource *tres;
  1100. rc = compaq_nvram_store(cpqhp_rom_start);
  1101. ctrl = cpqhp_ctrl_list;
  1102. while (ctrl) {
  1103. if (ctrl->hpc_reg) {
  1104. u16 misc;
  1105. rc = read_slot_enable (ctrl);
  1106. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1107. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1108. misc = readw(ctrl->hpc_reg + MISC);
  1109. misc &= 0xFFFD;
  1110. writew(misc, ctrl->hpc_reg + MISC);
  1111. }
  1112. ctrl_slot_cleanup(ctrl);
  1113. res = ctrl->io_head;
  1114. while (res) {
  1115. tres = res;
  1116. res = res->next;
  1117. kfree(tres);
  1118. }
  1119. res = ctrl->mem_head;
  1120. while (res) {
  1121. tres = res;
  1122. res = res->next;
  1123. kfree(tres);
  1124. }
  1125. res = ctrl->p_mem_head;
  1126. while (res) {
  1127. tres = res;
  1128. res = res->next;
  1129. kfree(tres);
  1130. }
  1131. res = ctrl->bus_head;
  1132. while (res) {
  1133. tres = res;
  1134. res = res->next;
  1135. kfree(tres);
  1136. }
  1137. kfree (ctrl->pci_bus);
  1138. tctrl = ctrl;
  1139. ctrl = ctrl->next;
  1140. kfree(tctrl);
  1141. }
  1142. for (loop = 0; loop < 256; loop++) {
  1143. next = cpqhp_slot_list[loop];
  1144. while (next != NULL) {
  1145. res = next->io_head;
  1146. while (res) {
  1147. tres = res;
  1148. res = res->next;
  1149. kfree(tres);
  1150. }
  1151. res = next->mem_head;
  1152. while (res) {
  1153. tres = res;
  1154. res = res->next;
  1155. kfree(tres);
  1156. }
  1157. res = next->p_mem_head;
  1158. while (res) {
  1159. tres = res;
  1160. res = res->next;
  1161. kfree(tres);
  1162. }
  1163. res = next->bus_head;
  1164. while (res) {
  1165. tres = res;
  1166. res = res->next;
  1167. kfree(tres);
  1168. }
  1169. TempSlot = next;
  1170. next = next->next;
  1171. kfree(TempSlot);
  1172. }
  1173. }
  1174. /* Stop the notification mechanism */
  1175. if (initialized)
  1176. cpqhp_event_stop_thread();
  1177. /* unmap the rom address */
  1178. if (cpqhp_rom_start)
  1179. iounmap(cpqhp_rom_start);
  1180. if (smbios_start)
  1181. iounmap(smbios_start);
  1182. }
  1183. static struct pci_device_id hpcd_pci_tbl[] = {
  1184. {
  1185. /* handle any PCI Hotplug controller */
  1186. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1187. .class_mask = ~0,
  1188. /* no matter who makes it */
  1189. .vendor = PCI_ANY_ID,
  1190. .device = PCI_ANY_ID,
  1191. .subvendor = PCI_ANY_ID,
  1192. .subdevice = PCI_ANY_ID,
  1193. }, { /* end: all zeroes */ }
  1194. };
  1195. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1196. static struct pci_driver cpqhpc_driver = {
  1197. .name = "compaq_pci_hotplug",
  1198. .id_table = hpcd_pci_tbl,
  1199. .probe = cpqhpc_probe,
  1200. /* remove: cpqhpc_remove_one, */
  1201. };
  1202. static int __init cpqhpc_init(void)
  1203. {
  1204. int result;
  1205. cpqhp_debug = debug;
  1206. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1207. cpqhp_initialize_debugfs();
  1208. result = pci_register_driver(&cpqhpc_driver);
  1209. dbg("pci_register_driver = %d\n", result);
  1210. return result;
  1211. }
  1212. static void __exit cpqhpc_cleanup(void)
  1213. {
  1214. dbg("unload_cpqphpd()\n");
  1215. unload_cpqphpd();
  1216. dbg("pci_unregister_driver\n");
  1217. pci_unregister_driver(&cpqhpc_driver);
  1218. cpqhp_shutdown_debugfs();
  1219. }
  1220. module_init(cpqhpc_init);
  1221. module_exit(cpqhpc_cleanup);