qlcnic_ethtool.c 28 KB

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  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/delay.h>
  9. #include <linux/pci.h>
  10. #include <linux/io.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/ethtool.h>
  13. #include "qlcnic.h"
  14. struct qlcnic_stats {
  15. char stat_string[ETH_GSTRING_LEN];
  16. int sizeof_stat;
  17. int stat_offset;
  18. };
  19. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  20. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  21. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  22. {"xmit_called",
  23. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  24. {"xmit_finished",
  25. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  26. {"rx_dropped",
  27. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  28. {"tx_dropped",
  29. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  30. {"csummed",
  31. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  32. {"rx_pkts",
  33. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  34. {"lro_pkts",
  35. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  36. {"rx_bytes",
  37. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  38. {"tx_bytes",
  39. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  40. {"lrobytes",
  41. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  42. {"lso_frames",
  43. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  44. {"xmit_on",
  45. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  46. {"xmit_off",
  47. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  48. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  49. QLC_OFF(stats.skb_alloc_failure)},
  50. {"null rxbuf",
  51. QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  52. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  53. QLC_OFF(stats.rx_dma_map_error)},
  54. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  55. QLC_OFF(stats.tx_dma_map_error)},
  56. };
  57. static const char qlcnic_device_gstrings_stats[][ETH_GSTRING_LEN] = {
  58. "rx unicast frames",
  59. "rx multicast frames",
  60. "rx broadcast frames",
  61. "rx dropped frames",
  62. "rx errors",
  63. "rx local frames",
  64. "rx numbytes",
  65. "tx unicast frames",
  66. "tx multicast frames",
  67. "tx broadcast frames",
  68. "tx dropped frames",
  69. "tx errors",
  70. "tx local frames",
  71. "tx numbytes",
  72. };
  73. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  74. #define QLCNIC_DEVICE_STATS_LEN ARRAY_SIZE(qlcnic_device_gstrings_stats)
  75. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  76. "Register_Test_on_offline",
  77. "Link_Test_on_offline",
  78. "Interrupt_Test_offline"
  79. };
  80. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  81. #define QLCNIC_RING_REGS_COUNT 20
  82. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  83. #define QLCNIC_MAX_EEPROM_LEN 1024
  84. static const u32 diag_registers[] = {
  85. CRB_CMDPEG_STATE,
  86. CRB_RCVPEG_STATE,
  87. CRB_XG_STATE_P3P,
  88. CRB_FW_CAPABILITIES_1,
  89. ISR_INT_STATE_REG,
  90. QLCNIC_CRB_DRV_ACTIVE,
  91. QLCNIC_CRB_DEV_STATE,
  92. QLCNIC_CRB_DRV_STATE,
  93. QLCNIC_CRB_DRV_SCRATCH,
  94. QLCNIC_CRB_DEV_PARTITION_INFO,
  95. QLCNIC_CRB_DRV_IDC_VER,
  96. QLCNIC_PEG_ALIVE_COUNTER,
  97. QLCNIC_PEG_HALT_STATUS1,
  98. QLCNIC_PEG_HALT_STATUS2,
  99. QLCNIC_CRB_PEG_NET_0+0x3c,
  100. QLCNIC_CRB_PEG_NET_1+0x3c,
  101. QLCNIC_CRB_PEG_NET_2+0x3c,
  102. QLCNIC_CRB_PEG_NET_4+0x3c,
  103. -1
  104. };
  105. #define QLCNIC_MGMT_API_VERSION 2
  106. #define QLCNIC_DEV_INFO_SIZE 1
  107. #define QLCNIC_ETHTOOL_REGS_VER 2
  108. static int qlcnic_get_regs_len(struct net_device *dev)
  109. {
  110. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN +
  111. QLCNIC_DEV_INFO_SIZE + 1;
  112. }
  113. static int qlcnic_get_eeprom_len(struct net_device *dev)
  114. {
  115. return QLCNIC_FLASH_TOTAL_SIZE;
  116. }
  117. static void
  118. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  119. {
  120. struct qlcnic_adapter *adapter = netdev_priv(dev);
  121. u32 fw_major, fw_minor, fw_build;
  122. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  123. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  124. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  125. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  126. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  127. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  128. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  129. }
  130. static int
  131. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  132. {
  133. struct qlcnic_adapter *adapter = netdev_priv(dev);
  134. int check_sfp_module = 0;
  135. u16 pcifn = adapter->ahw->pci_func;
  136. /* read which mode */
  137. if (adapter->ahw->port_type == QLCNIC_GBE) {
  138. ecmd->supported = (SUPPORTED_10baseT_Half |
  139. SUPPORTED_10baseT_Full |
  140. SUPPORTED_100baseT_Half |
  141. SUPPORTED_100baseT_Full |
  142. SUPPORTED_1000baseT_Half |
  143. SUPPORTED_1000baseT_Full);
  144. ecmd->advertising = (ADVERTISED_100baseT_Half |
  145. ADVERTISED_100baseT_Full |
  146. ADVERTISED_1000baseT_Half |
  147. ADVERTISED_1000baseT_Full);
  148. ethtool_cmd_speed_set(ecmd, adapter->link_speed);
  149. ecmd->duplex = adapter->link_duplex;
  150. ecmd->autoneg = adapter->link_autoneg;
  151. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  152. u32 val;
  153. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  154. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  155. ecmd->supported = SUPPORTED_1000baseT_Full;
  156. ecmd->advertising = ADVERTISED_1000baseT_Full;
  157. } else {
  158. ecmd->supported = SUPPORTED_10000baseT_Full;
  159. ecmd->advertising = ADVERTISED_10000baseT_Full;
  160. }
  161. if (netif_running(dev) && adapter->has_link_events) {
  162. ethtool_cmd_speed_set(ecmd, adapter->link_speed);
  163. ecmd->autoneg = adapter->link_autoneg;
  164. ecmd->duplex = adapter->link_duplex;
  165. goto skip;
  166. }
  167. val = QLCRD32(adapter, P3P_LINK_SPEED_REG(pcifn));
  168. ethtool_cmd_speed_set(ecmd, P3P_LINK_SPEED_MHZ *
  169. P3P_LINK_SPEED_VAL(pcifn, val));
  170. ecmd->duplex = DUPLEX_FULL;
  171. ecmd->autoneg = AUTONEG_DISABLE;
  172. } else
  173. return -EIO;
  174. skip:
  175. ecmd->phy_address = adapter->physical_port;
  176. ecmd->transceiver = XCVR_EXTERNAL;
  177. switch (adapter->ahw->board_type) {
  178. case QLCNIC_BRDTYPE_P3P_REF_QG:
  179. case QLCNIC_BRDTYPE_P3P_4_GB:
  180. case QLCNIC_BRDTYPE_P3P_4_GB_MM:
  181. ecmd->supported |= SUPPORTED_Autoneg;
  182. ecmd->advertising |= ADVERTISED_Autoneg;
  183. case QLCNIC_BRDTYPE_P3P_10G_CX4:
  184. case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
  185. case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
  186. ecmd->supported |= SUPPORTED_TP;
  187. ecmd->advertising |= ADVERTISED_TP;
  188. ecmd->port = PORT_TP;
  189. ecmd->autoneg = adapter->link_autoneg;
  190. break;
  191. case QLCNIC_BRDTYPE_P3P_IMEZ:
  192. case QLCNIC_BRDTYPE_P3P_XG_LOM:
  193. case QLCNIC_BRDTYPE_P3P_HMEZ:
  194. ecmd->supported |= SUPPORTED_MII;
  195. ecmd->advertising |= ADVERTISED_MII;
  196. ecmd->port = PORT_MII;
  197. ecmd->autoneg = AUTONEG_DISABLE;
  198. break;
  199. case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
  200. case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
  201. case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
  202. ecmd->advertising |= ADVERTISED_TP;
  203. ecmd->supported |= SUPPORTED_TP;
  204. check_sfp_module = netif_running(dev) &&
  205. adapter->has_link_events;
  206. case QLCNIC_BRDTYPE_P3P_10G_XFP:
  207. ecmd->supported |= SUPPORTED_FIBRE;
  208. ecmd->advertising |= ADVERTISED_FIBRE;
  209. ecmd->port = PORT_FIBRE;
  210. ecmd->autoneg = AUTONEG_DISABLE;
  211. break;
  212. case QLCNIC_BRDTYPE_P3P_10G_TP:
  213. if (adapter->ahw->port_type == QLCNIC_XGBE) {
  214. ecmd->autoneg = AUTONEG_DISABLE;
  215. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  216. ecmd->advertising |=
  217. (ADVERTISED_FIBRE | ADVERTISED_TP);
  218. ecmd->port = PORT_FIBRE;
  219. check_sfp_module = netif_running(dev) &&
  220. adapter->has_link_events;
  221. } else {
  222. ecmd->autoneg = AUTONEG_ENABLE;
  223. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  224. ecmd->advertising |=
  225. (ADVERTISED_TP | ADVERTISED_Autoneg);
  226. ecmd->port = PORT_TP;
  227. }
  228. break;
  229. default:
  230. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  231. adapter->ahw->board_type);
  232. return -EIO;
  233. }
  234. if (check_sfp_module) {
  235. switch (adapter->module_type) {
  236. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  237. case LINKEVENT_MODULE_OPTICAL_SRLR:
  238. case LINKEVENT_MODULE_OPTICAL_LRM:
  239. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  240. ecmd->port = PORT_FIBRE;
  241. break;
  242. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  243. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  244. case LINKEVENT_MODULE_TWINAX:
  245. ecmd->port = PORT_TP;
  246. break;
  247. default:
  248. ecmd->port = PORT_OTHER;
  249. }
  250. }
  251. return 0;
  252. }
  253. static int
  254. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  255. {
  256. u32 config = 0;
  257. u32 ret = 0;
  258. struct qlcnic_adapter *adapter = netdev_priv(dev);
  259. if (adapter->ahw->port_type != QLCNIC_GBE)
  260. return -EOPNOTSUPP;
  261. /* read which mode */
  262. if (ecmd->duplex)
  263. config |= 0x1;
  264. if (ecmd->autoneg)
  265. config |= 0x2;
  266. switch (ethtool_cmd_speed(ecmd)) {
  267. case SPEED_10:
  268. config |= (0 << 8);
  269. break;
  270. case SPEED_100:
  271. config |= (1 << 8);
  272. break;
  273. case SPEED_1000:
  274. config |= (10 << 8);
  275. break;
  276. default:
  277. return -EIO;
  278. }
  279. ret = qlcnic_fw_cmd_set_port(adapter, config);
  280. if (ret == QLCNIC_RCODE_NOT_SUPPORTED)
  281. return -EOPNOTSUPP;
  282. else if (ret)
  283. return -EIO;
  284. adapter->link_speed = ethtool_cmd_speed(ecmd);
  285. adapter->link_duplex = ecmd->duplex;
  286. adapter->link_autoneg = ecmd->autoneg;
  287. if (!netif_running(dev))
  288. return 0;
  289. dev->netdev_ops->ndo_stop(dev);
  290. return dev->netdev_ops->ndo_open(dev);
  291. }
  292. static void
  293. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  294. {
  295. struct qlcnic_adapter *adapter = netdev_priv(dev);
  296. struct qlcnic_recv_context *recv_ctx = adapter->recv_ctx;
  297. struct qlcnic_host_sds_ring *sds_ring;
  298. u32 *regs_buff = p;
  299. int ring, i = 0, j = 0;
  300. memset(p, 0, qlcnic_get_regs_len(dev));
  301. regs->version = (QLCNIC_ETHTOOL_REGS_VER << 24) |
  302. (adapter->ahw->revision_id << 16) | (adapter->pdev)->device;
  303. regs_buff[0] = (0xcafe0000 | (QLCNIC_DEV_INFO_SIZE & 0xffff));
  304. regs_buff[1] = QLCNIC_MGMT_API_VERSION;
  305. for (i = QLCNIC_DEV_INFO_SIZE + 1; diag_registers[j] != -1; j++, i++)
  306. regs_buff[i] = QLCRD32(adapter, diag_registers[j]);
  307. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  308. return;
  309. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  310. regs_buff[i++] = 1; /* No. of tx ring */
  311. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  312. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  313. regs_buff[i++] = 2; /* No. of rx ring */
  314. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  315. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  316. regs_buff[i++] = adapter->max_sds_rings;
  317. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  318. sds_ring = &(recv_ctx->sds_rings[ring]);
  319. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  320. }
  321. }
  322. static u32 qlcnic_test_link(struct net_device *dev)
  323. {
  324. struct qlcnic_adapter *adapter = netdev_priv(dev);
  325. u32 val;
  326. val = QLCRD32(adapter, CRB_XG_STATE_P3P);
  327. val = XG_LINK_STATE_P3P(adapter->ahw->pci_func, val);
  328. return (val == XG_LINK_UP_P3P) ? 0 : 1;
  329. }
  330. static int
  331. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  332. u8 *bytes)
  333. {
  334. struct qlcnic_adapter *adapter = netdev_priv(dev);
  335. int offset;
  336. int ret;
  337. if (eeprom->len == 0)
  338. return -EINVAL;
  339. eeprom->magic = (adapter->pdev)->vendor |
  340. ((adapter->pdev)->device << 16);
  341. offset = eeprom->offset;
  342. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  343. eeprom->len);
  344. if (ret < 0)
  345. return ret;
  346. return 0;
  347. }
  348. static void
  349. qlcnic_get_ringparam(struct net_device *dev,
  350. struct ethtool_ringparam *ring)
  351. {
  352. struct qlcnic_adapter *adapter = netdev_priv(dev);
  353. ring->rx_pending = adapter->num_rxd;
  354. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  355. ring->tx_pending = adapter->num_txd;
  356. ring->rx_max_pending = adapter->max_rxd;
  357. ring->rx_jumbo_max_pending = adapter->max_jumbo_rxd;
  358. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  359. ring->rx_mini_max_pending = 0;
  360. ring->rx_mini_pending = 0;
  361. }
  362. static u32
  363. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  364. {
  365. u32 num_desc;
  366. num_desc = max(val, min);
  367. num_desc = min(num_desc, max);
  368. num_desc = roundup_pow_of_two(num_desc);
  369. if (val != num_desc) {
  370. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  371. qlcnic_driver_name, r_name, num_desc, val);
  372. }
  373. return num_desc;
  374. }
  375. static int
  376. qlcnic_set_ringparam(struct net_device *dev,
  377. struct ethtool_ringparam *ring)
  378. {
  379. struct qlcnic_adapter *adapter = netdev_priv(dev);
  380. u16 num_rxd, num_jumbo_rxd, num_txd;
  381. if (ring->rx_mini_pending)
  382. return -EOPNOTSUPP;
  383. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  384. MIN_RCV_DESCRIPTORS, adapter->max_rxd, "rx");
  385. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  386. MIN_JUMBO_DESCRIPTORS, adapter->max_jumbo_rxd,
  387. "rx jumbo");
  388. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  389. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  390. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  391. num_jumbo_rxd == adapter->num_jumbo_rxd)
  392. return 0;
  393. adapter->num_rxd = num_rxd;
  394. adapter->num_jumbo_rxd = num_jumbo_rxd;
  395. adapter->num_txd = num_txd;
  396. return qlcnic_reset_context(adapter);
  397. }
  398. static void qlcnic_get_channels(struct net_device *dev,
  399. struct ethtool_channels *channel)
  400. {
  401. struct qlcnic_adapter *adapter = netdev_priv(dev);
  402. channel->max_rx = rounddown_pow_of_two(min_t(int,
  403. adapter->max_rx_ques, num_online_cpus()));
  404. channel->max_tx = adapter->max_tx_ques;
  405. channel->rx_count = adapter->max_sds_rings;
  406. channel->tx_count = adapter->max_tx_ques;
  407. }
  408. static int qlcnic_set_channels(struct net_device *dev,
  409. struct ethtool_channels *channel)
  410. {
  411. struct qlcnic_adapter *adapter = netdev_priv(dev);
  412. int err;
  413. if (channel->other_count || channel->combined_count ||
  414. channel->tx_count != channel->max_tx)
  415. return -EINVAL;
  416. err = qlcnic_validate_max_rss(dev, channel->max_rx, channel->rx_count);
  417. if (err)
  418. return err;
  419. err = qlcnic_set_max_rss(adapter, channel->rx_count);
  420. netdev_info(dev, "allocated 0x%x sds rings\n",
  421. adapter->max_sds_rings);
  422. return err;
  423. }
  424. static void
  425. qlcnic_get_pauseparam(struct net_device *netdev,
  426. struct ethtool_pauseparam *pause)
  427. {
  428. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  429. int port = adapter->physical_port;
  430. __u32 val;
  431. if (adapter->ahw->port_type == QLCNIC_GBE) {
  432. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  433. return;
  434. /* get flow control settings */
  435. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  436. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  437. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  438. switch (port) {
  439. case 0:
  440. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  441. break;
  442. case 1:
  443. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  444. break;
  445. case 2:
  446. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  447. break;
  448. case 3:
  449. default:
  450. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  451. break;
  452. }
  453. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  454. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  455. return;
  456. pause->rx_pause = 1;
  457. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  458. if (port == 0)
  459. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  460. else
  461. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  462. } else {
  463. dev_err(&netdev->dev, "Unknown board type: %x\n",
  464. adapter->ahw->port_type);
  465. }
  466. }
  467. static int
  468. qlcnic_set_pauseparam(struct net_device *netdev,
  469. struct ethtool_pauseparam *pause)
  470. {
  471. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  472. int port = adapter->physical_port;
  473. __u32 val;
  474. /* read mode */
  475. if (adapter->ahw->port_type == QLCNIC_GBE) {
  476. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  477. return -EIO;
  478. /* set flow control */
  479. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  480. if (pause->rx_pause)
  481. qlcnic_gb_rx_flowctl(val);
  482. else
  483. qlcnic_gb_unset_rx_flowctl(val);
  484. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  485. val);
  486. /* set autoneg */
  487. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  488. switch (port) {
  489. case 0:
  490. if (pause->tx_pause)
  491. qlcnic_gb_unset_gb0_mask(val);
  492. else
  493. qlcnic_gb_set_gb0_mask(val);
  494. break;
  495. case 1:
  496. if (pause->tx_pause)
  497. qlcnic_gb_unset_gb1_mask(val);
  498. else
  499. qlcnic_gb_set_gb1_mask(val);
  500. break;
  501. case 2:
  502. if (pause->tx_pause)
  503. qlcnic_gb_unset_gb2_mask(val);
  504. else
  505. qlcnic_gb_set_gb2_mask(val);
  506. break;
  507. case 3:
  508. default:
  509. if (pause->tx_pause)
  510. qlcnic_gb_unset_gb3_mask(val);
  511. else
  512. qlcnic_gb_set_gb3_mask(val);
  513. break;
  514. }
  515. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  516. } else if (adapter->ahw->port_type == QLCNIC_XGBE) {
  517. if (!pause->rx_pause || pause->autoneg)
  518. return -EOPNOTSUPP;
  519. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  520. return -EIO;
  521. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  522. if (port == 0) {
  523. if (pause->tx_pause)
  524. qlcnic_xg_unset_xg0_mask(val);
  525. else
  526. qlcnic_xg_set_xg0_mask(val);
  527. } else {
  528. if (pause->tx_pause)
  529. qlcnic_xg_unset_xg1_mask(val);
  530. else
  531. qlcnic_xg_set_xg1_mask(val);
  532. }
  533. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  534. } else {
  535. dev_err(&netdev->dev, "Unknown board type: %x\n",
  536. adapter->ahw->port_type);
  537. }
  538. return 0;
  539. }
  540. static int qlcnic_reg_test(struct net_device *dev)
  541. {
  542. struct qlcnic_adapter *adapter = netdev_priv(dev);
  543. u32 data_read;
  544. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  545. if ((data_read & 0xffff) != adapter->pdev->vendor)
  546. return 1;
  547. return 0;
  548. }
  549. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  550. {
  551. struct qlcnic_adapter *adapter = netdev_priv(dev);
  552. switch (sset) {
  553. case ETH_SS_TEST:
  554. return QLCNIC_TEST_LEN;
  555. case ETH_SS_STATS:
  556. if (adapter->flags & QLCNIC_ESWITCH_ENABLED)
  557. return QLCNIC_STATS_LEN + QLCNIC_DEVICE_STATS_LEN;
  558. return QLCNIC_STATS_LEN;
  559. default:
  560. return -EOPNOTSUPP;
  561. }
  562. }
  563. static int qlcnic_irq_test(struct net_device *netdev)
  564. {
  565. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  566. int max_sds_rings = adapter->max_sds_rings;
  567. int ret;
  568. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  569. return -EIO;
  570. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  571. if (ret)
  572. goto clear_it;
  573. adapter->diag_cnt = 0;
  574. ret = qlcnic_issue_cmd(adapter, adapter->ahw->pci_func,
  575. adapter->fw_hal_version, adapter->ahw->pci_func,
  576. 0, 0, 0x00000011);
  577. if (ret)
  578. goto done;
  579. msleep(10);
  580. ret = !adapter->diag_cnt;
  581. done:
  582. qlcnic_diag_free_res(netdev, max_sds_rings);
  583. clear_it:
  584. adapter->max_sds_rings = max_sds_rings;
  585. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  586. return ret;
  587. }
  588. static void
  589. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  590. u64 *data)
  591. {
  592. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  593. data[0] = qlcnic_reg_test(dev);
  594. if (data[0])
  595. eth_test->flags |= ETH_TEST_FL_FAILED;
  596. data[1] = (u64) qlcnic_test_link(dev);
  597. if (data[1])
  598. eth_test->flags |= ETH_TEST_FL_FAILED;
  599. if (eth_test->flags & ETH_TEST_FL_OFFLINE) {
  600. data[2] = qlcnic_irq_test(dev);
  601. if (data[2])
  602. eth_test->flags |= ETH_TEST_FL_FAILED;
  603. }
  604. }
  605. static void
  606. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  607. {
  608. struct qlcnic_adapter *adapter = netdev_priv(dev);
  609. int index, i;
  610. switch (stringset) {
  611. case ETH_SS_TEST:
  612. memcpy(data, *qlcnic_gstrings_test,
  613. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  614. break;
  615. case ETH_SS_STATS:
  616. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  617. memcpy(data + index * ETH_GSTRING_LEN,
  618. qlcnic_gstrings_stats[index].stat_string,
  619. ETH_GSTRING_LEN);
  620. }
  621. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  622. return;
  623. for (i = 0; i < QLCNIC_DEVICE_STATS_LEN; index++, i++) {
  624. memcpy(data + index * ETH_GSTRING_LEN,
  625. qlcnic_device_gstrings_stats[i],
  626. ETH_GSTRING_LEN);
  627. }
  628. }
  629. }
  630. #define QLCNIC_FILL_ESWITCH_STATS(VAL1) \
  631. (((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) ? 0 : VAL1)
  632. static void
  633. qlcnic_fill_device_stats(int *index, u64 *data,
  634. struct __qlcnic_esw_statistics *stats)
  635. {
  636. int ind = *index;
  637. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->unicast_frames);
  638. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->multicast_frames);
  639. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->broadcast_frames);
  640. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->dropped_frames);
  641. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->errors);
  642. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->local_frames);
  643. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->numbytes);
  644. *index = ind;
  645. }
  646. static void
  647. qlcnic_get_ethtool_stats(struct net_device *dev,
  648. struct ethtool_stats *stats, u64 * data)
  649. {
  650. struct qlcnic_adapter *adapter = netdev_priv(dev);
  651. struct qlcnic_esw_statistics port_stats;
  652. int index, ret;
  653. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  654. char *p =
  655. (char *)adapter +
  656. qlcnic_gstrings_stats[index].stat_offset;
  657. data[index] =
  658. (qlcnic_gstrings_stats[index].sizeof_stat ==
  659. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  660. }
  661. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  662. return;
  663. memset(&port_stats, 0, sizeof(struct qlcnic_esw_statistics));
  664. ret = qlcnic_get_port_stats(adapter, adapter->ahw->pci_func,
  665. QLCNIC_QUERY_RX_COUNTER, &port_stats.rx);
  666. if (ret)
  667. return;
  668. qlcnic_fill_device_stats(&index, data, &port_stats.rx);
  669. ret = qlcnic_get_port_stats(adapter, adapter->ahw->pci_func,
  670. QLCNIC_QUERY_TX_COUNTER, &port_stats.tx);
  671. if (ret)
  672. return;
  673. qlcnic_fill_device_stats(&index, data, &port_stats.tx);
  674. }
  675. static int qlcnic_set_led(struct net_device *dev,
  676. enum ethtool_phys_id_state state)
  677. {
  678. struct qlcnic_adapter *adapter = netdev_priv(dev);
  679. int max_sds_rings = adapter->max_sds_rings;
  680. switch (state) {
  681. case ETHTOOL_ID_ACTIVE:
  682. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  683. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  684. return -EIO;
  685. if (qlcnic_diag_alloc_res(dev, QLCNIC_LED_TEST)) {
  686. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  687. return -EIO;
  688. }
  689. set_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state);
  690. }
  691. if (adapter->nic_ops->config_led(adapter, 1, 0xf) == 0)
  692. return 0;
  693. dev_err(&adapter->pdev->dev,
  694. "Failed to set LED blink state.\n");
  695. break;
  696. case ETHTOOL_ID_INACTIVE:
  697. if (adapter->nic_ops->config_led(adapter, 0, 0xf))
  698. dev_err(&adapter->pdev->dev,
  699. "Failed to reset LED blink state.\n");
  700. break;
  701. default:
  702. return -EINVAL;
  703. }
  704. if (test_and_clear_bit(__QLCNIC_DIAG_RES_ALLOC, &adapter->state)) {
  705. qlcnic_diag_free_res(dev, max_sds_rings);
  706. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  707. }
  708. return -EIO;
  709. }
  710. static void
  711. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  712. {
  713. struct qlcnic_adapter *adapter = netdev_priv(dev);
  714. u32 wol_cfg;
  715. wol->supported = 0;
  716. wol->wolopts = 0;
  717. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  718. if (wol_cfg & (1UL << adapter->portnum))
  719. wol->supported |= WAKE_MAGIC;
  720. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  721. if (wol_cfg & (1UL << adapter->portnum))
  722. wol->wolopts |= WAKE_MAGIC;
  723. }
  724. static int
  725. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  726. {
  727. struct qlcnic_adapter *adapter = netdev_priv(dev);
  728. u32 wol_cfg;
  729. if (wol->wolopts & ~WAKE_MAGIC)
  730. return -EOPNOTSUPP;
  731. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  732. if (!(wol_cfg & (1 << adapter->portnum)))
  733. return -EOPNOTSUPP;
  734. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  735. if (wol->wolopts & WAKE_MAGIC)
  736. wol_cfg |= 1UL << adapter->portnum;
  737. else
  738. wol_cfg &= ~(1UL << adapter->portnum);
  739. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  740. return 0;
  741. }
  742. /*
  743. * Set the coalescing parameters. Currently only normal is supported.
  744. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  745. * firmware coalescing to default.
  746. */
  747. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  748. struct ethtool_coalesce *ethcoal)
  749. {
  750. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  751. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  752. return -EINVAL;
  753. /*
  754. * Return Error if unsupported values or
  755. * unsupported parameters are set.
  756. */
  757. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  758. ethcoal->rx_max_coalesced_frames > 0xffff ||
  759. ethcoal->tx_coalesce_usecs ||
  760. ethcoal->tx_max_coalesced_frames ||
  761. ethcoal->rx_coalesce_usecs_irq ||
  762. ethcoal->rx_max_coalesced_frames_irq ||
  763. ethcoal->tx_coalesce_usecs_irq ||
  764. ethcoal->tx_max_coalesced_frames_irq ||
  765. ethcoal->stats_block_coalesce_usecs ||
  766. ethcoal->use_adaptive_rx_coalesce ||
  767. ethcoal->use_adaptive_tx_coalesce ||
  768. ethcoal->pkt_rate_low ||
  769. ethcoal->rx_coalesce_usecs_low ||
  770. ethcoal->rx_max_coalesced_frames_low ||
  771. ethcoal->tx_coalesce_usecs_low ||
  772. ethcoal->tx_max_coalesced_frames_low ||
  773. ethcoal->pkt_rate_high ||
  774. ethcoal->rx_coalesce_usecs_high ||
  775. ethcoal->rx_max_coalesced_frames_high ||
  776. ethcoal->tx_coalesce_usecs_high ||
  777. ethcoal->tx_max_coalesced_frames_high)
  778. return -EINVAL;
  779. if (!ethcoal->rx_coalesce_usecs ||
  780. !ethcoal->rx_max_coalesced_frames) {
  781. adapter->ahw->coal.flag = QLCNIC_INTR_DEFAULT;
  782. adapter->ahw->coal.rx_time_us =
  783. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  784. adapter->ahw->coal.rx_packets =
  785. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  786. } else {
  787. adapter->ahw->coal.flag = 0;
  788. adapter->ahw->coal.rx_time_us = ethcoal->rx_coalesce_usecs;
  789. adapter->ahw->coal.rx_packets =
  790. ethcoal->rx_max_coalesced_frames;
  791. }
  792. qlcnic_config_intr_coalesce(adapter);
  793. return 0;
  794. }
  795. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  796. struct ethtool_coalesce *ethcoal)
  797. {
  798. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  799. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  800. return -EINVAL;
  801. ethcoal->rx_coalesce_usecs = adapter->ahw->coal.rx_time_us;
  802. ethcoal->rx_max_coalesced_frames = adapter->ahw->coal.rx_packets;
  803. return 0;
  804. }
  805. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  806. {
  807. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  808. return adapter->msg_enable;
  809. }
  810. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  811. {
  812. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  813. adapter->msg_enable = msglvl;
  814. }
  815. static int
  816. qlcnic_get_dump_flag(struct net_device *netdev, struct ethtool_dump *dump)
  817. {
  818. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  819. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  820. dump->len = fw_dump->tmpl_hdr->size + fw_dump->size;
  821. dump->flag = fw_dump->tmpl_hdr->drv_cap_mask;
  822. dump->version = adapter->fw_version;
  823. return 0;
  824. }
  825. static int
  826. qlcnic_get_dump_data(struct net_device *netdev, struct ethtool_dump *dump,
  827. void *buffer)
  828. {
  829. int i, copy_sz;
  830. u32 *hdr_ptr, *data;
  831. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  832. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  833. if (qlcnic_api_lock(adapter))
  834. return -EIO;
  835. if (!fw_dump->clr) {
  836. netdev_info(netdev, "Dump not available\n");
  837. qlcnic_api_unlock(adapter);
  838. return -EINVAL;
  839. }
  840. /* Copy template header first */
  841. copy_sz = fw_dump->tmpl_hdr->size;
  842. hdr_ptr = (u32 *) fw_dump->tmpl_hdr;
  843. data = (u32 *) buffer;
  844. for (i = 0; i < copy_sz/sizeof(u32); i++)
  845. *data++ = cpu_to_le32(*hdr_ptr++);
  846. /* Copy captured dump data */
  847. memcpy(buffer + copy_sz, fw_dump->data, fw_dump->size);
  848. dump->len = copy_sz + fw_dump->size;
  849. dump->flag = fw_dump->tmpl_hdr->drv_cap_mask;
  850. /* Free dump area once data has been captured */
  851. vfree(fw_dump->data);
  852. fw_dump->data = NULL;
  853. fw_dump->clr = 0;
  854. qlcnic_api_unlock(adapter);
  855. return 0;
  856. }
  857. static int
  858. qlcnic_set_dump(struct net_device *netdev, struct ethtool_dump *val)
  859. {
  860. int ret = 0;
  861. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  862. struct qlcnic_fw_dump *fw_dump = &adapter->ahw->fw_dump;
  863. if (val->flag == QLCNIC_FORCE_FW_DUMP_KEY) {
  864. netdev_info(netdev, "Forcing a FW dump\n");
  865. qlcnic_dev_request_reset(adapter);
  866. } else {
  867. if (val->flag > QLCNIC_DUMP_MASK_MAX ||
  868. val->flag < QLCNIC_DUMP_MASK_MIN) {
  869. netdev_info(netdev,
  870. "Invalid dump level: 0x%x\n", val->flag);
  871. ret = -EINVAL;
  872. goto out;
  873. }
  874. if (qlcnic_api_lock(adapter))
  875. return -EIO;
  876. fw_dump->tmpl_hdr->drv_cap_mask = val->flag & 0xff;
  877. qlcnic_api_unlock(adapter);
  878. netdev_info(netdev, "Driver mask changed to: 0x%x\n",
  879. fw_dump->tmpl_hdr->drv_cap_mask);
  880. }
  881. out:
  882. return ret;
  883. }
  884. const struct ethtool_ops qlcnic_ethtool_ops = {
  885. .get_settings = qlcnic_get_settings,
  886. .set_settings = qlcnic_set_settings,
  887. .get_drvinfo = qlcnic_get_drvinfo,
  888. .get_regs_len = qlcnic_get_regs_len,
  889. .get_regs = qlcnic_get_regs,
  890. .get_link = ethtool_op_get_link,
  891. .get_eeprom_len = qlcnic_get_eeprom_len,
  892. .get_eeprom = qlcnic_get_eeprom,
  893. .get_ringparam = qlcnic_get_ringparam,
  894. .set_ringparam = qlcnic_set_ringparam,
  895. .get_channels = qlcnic_get_channels,
  896. .set_channels = qlcnic_set_channels,
  897. .get_pauseparam = qlcnic_get_pauseparam,
  898. .set_pauseparam = qlcnic_set_pauseparam,
  899. .get_wol = qlcnic_get_wol,
  900. .set_wol = qlcnic_set_wol,
  901. .self_test = qlcnic_diag_test,
  902. .get_strings = qlcnic_get_strings,
  903. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  904. .get_sset_count = qlcnic_get_sset_count,
  905. .get_coalesce = qlcnic_get_intr_coalesce,
  906. .set_coalesce = qlcnic_set_intr_coalesce,
  907. .set_phys_id = qlcnic_set_led,
  908. .set_msglevel = qlcnic_set_msglevel,
  909. .get_msglevel = qlcnic_get_msglevel,
  910. .get_dump_flag = qlcnic_get_dump_flag,
  911. .get_dump_data = qlcnic_get_dump_data,
  912. .set_dump = qlcnic_set_dump,
  913. };