ks8851.c 44 KB

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  1. /* drivers/net/ks8851.c
  2. *
  3. * Copyright 2009 Simtec Electronics
  4. * http://www.simtec.co.uk/
  5. * Ben Dooks <ben@simtec.co.uk>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12. #define DEBUG
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/netdevice.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/ethtool.h>
  18. #include <linux/cache.h>
  19. #include <linux/crc32.h>
  20. #include <linux/mii.h>
  21. #include <linux/spi/spi.h>
  22. #include "ks8851.h"
  23. /**
  24. * struct ks8851_rxctrl - KS8851 driver rx control
  25. * @mchash: Multicast hash-table data.
  26. * @rxcr1: KS_RXCR1 register setting
  27. * @rxcr2: KS_RXCR2 register setting
  28. *
  29. * Representation of the settings needs to control the receive filtering
  30. * such as the multicast hash-filter and the receive register settings. This
  31. * is used to make the job of working out if the receive settings change and
  32. * then issuing the new settings to the worker that will send the necessary
  33. * commands.
  34. */
  35. struct ks8851_rxctrl {
  36. u16 mchash[4];
  37. u16 rxcr1;
  38. u16 rxcr2;
  39. };
  40. /**
  41. * union ks8851_tx_hdr - tx header data
  42. * @txb: The header as bytes
  43. * @txw: The header as 16bit, little-endian words
  44. *
  45. * A dual representation of the tx header data to allow
  46. * access to individual bytes, and to allow 16bit accesses
  47. * with 16bit alignment.
  48. */
  49. union ks8851_tx_hdr {
  50. u8 txb[6];
  51. __le16 txw[3];
  52. };
  53. /**
  54. * struct ks8851_net - KS8851 driver private data
  55. * @netdev: The network device we're bound to
  56. * @spidev: The spi device we're bound to.
  57. * @lock: Lock to ensure that the device is not accessed when busy.
  58. * @statelock: Lock on this structure for tx list.
  59. * @mii: The MII state information for the mii calls.
  60. * @rxctrl: RX settings for @rxctrl_work.
  61. * @tx_work: Work queue for tx packets
  62. * @irq_work: Work queue for servicing interrupts
  63. * @rxctrl_work: Work queue for updating RX mode and multicast lists
  64. * @txq: Queue of packets for transmission.
  65. * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1.
  66. * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2.
  67. * @txh: Space for generating packet TX header in DMA-able data
  68. * @rxd: Space for receiving SPI data, in DMA-able space.
  69. * @txd: Space for transmitting SPI data, in DMA-able space.
  70. * @msg_enable: The message flags controlling driver output (see ethtool).
  71. * @fid: Incrementing frame id tag.
  72. * @rc_ier: Cached copy of KS_IER.
  73. * @rc_ccr: Cached copy of KS_CCR.
  74. * @rc_rxqcr: Cached copy of KS_RXQCR.
  75. * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
  76. *
  77. * The @lock ensures that the chip is protected when certain operations are
  78. * in progress. When the read or write packet transfer is in progress, most
  79. * of the chip registers are not ccessible until the transfer is finished and
  80. * the DMA has been de-asserted.
  81. *
  82. * The @statelock is used to protect information in the structure which may
  83. * need to be accessed via several sources, such as the network driver layer
  84. * or one of the work queues.
  85. *
  86. * We align the buffers we may use for rx/tx to ensure that if the SPI driver
  87. * wants to DMA map them, it will not have any problems with data the driver
  88. * modifies.
  89. */
  90. struct ks8851_net {
  91. struct net_device *netdev;
  92. struct spi_device *spidev;
  93. struct mutex lock;
  94. spinlock_t statelock;
  95. union ks8851_tx_hdr txh ____cacheline_aligned;
  96. u8 rxd[8];
  97. u8 txd[8];
  98. u32 msg_enable ____cacheline_aligned;
  99. u16 tx_space;
  100. u8 fid;
  101. u16 rc_ier;
  102. u16 rc_rxqcr;
  103. u16 rc_ccr;
  104. u16 eeprom_size;
  105. struct mii_if_info mii;
  106. struct ks8851_rxctrl rxctrl;
  107. struct work_struct tx_work;
  108. struct work_struct irq_work;
  109. struct work_struct rxctrl_work;
  110. struct sk_buff_head txq;
  111. struct spi_message spi_msg1;
  112. struct spi_message spi_msg2;
  113. struct spi_transfer spi_xfer1;
  114. struct spi_transfer spi_xfer2[2];
  115. };
  116. static int msg_enable;
  117. /* shift for byte-enable data */
  118. #define BYTE_EN(_x) ((_x) << 2)
  119. /* turn register number and byte-enable mask into data for start of packet */
  120. #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6)
  121. /* SPI register read/write calls.
  122. *
  123. * All these calls issue SPI transactions to access the chip's registers. They
  124. * all require that the necessary lock is held to prevent accesses when the
  125. * chip is busy transferring packet data (RX/TX FIFO accesses).
  126. */
  127. /**
  128. * ks8851_wrreg16 - write 16bit register value to chip
  129. * @ks: The chip state
  130. * @reg: The register address
  131. * @val: The value to write
  132. *
  133. * Issue a write to put the value @val into the register specified in @reg.
  134. */
  135. static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
  136. {
  137. struct spi_transfer *xfer = &ks->spi_xfer1;
  138. struct spi_message *msg = &ks->spi_msg1;
  139. __le16 txb[2];
  140. int ret;
  141. txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR);
  142. txb[1] = cpu_to_le16(val);
  143. xfer->tx_buf = txb;
  144. xfer->rx_buf = NULL;
  145. xfer->len = 4;
  146. ret = spi_sync(ks->spidev, msg);
  147. if (ret < 0)
  148. netdev_err(ks->netdev, "spi_sync() failed\n");
  149. }
  150. /**
  151. * ks8851_wrreg8 - write 8bit register value to chip
  152. * @ks: The chip state
  153. * @reg: The register address
  154. * @val: The value to write
  155. *
  156. * Issue a write to put the value @val into the register specified in @reg.
  157. */
  158. static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
  159. {
  160. struct spi_transfer *xfer = &ks->spi_xfer1;
  161. struct spi_message *msg = &ks->spi_msg1;
  162. __le16 txb[2];
  163. int ret;
  164. int bit;
  165. bit = 1 << (reg & 3);
  166. txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
  167. txb[1] = val;
  168. xfer->tx_buf = txb;
  169. xfer->rx_buf = NULL;
  170. xfer->len = 3;
  171. ret = spi_sync(ks->spidev, msg);
  172. if (ret < 0)
  173. netdev_err(ks->netdev, "spi_sync() failed\n");
  174. }
  175. /**
  176. * ks8851_rx_1msg - select whether to use one or two messages for spi read
  177. * @ks: The device structure
  178. *
  179. * Return whether to generate a single message with a tx and rx buffer
  180. * supplied to spi_sync(), or alternatively send the tx and rx buffers
  181. * as separate messages.
  182. *
  183. * Depending on the hardware in use, a single message may be more efficient
  184. * on interrupts or work done by the driver.
  185. *
  186. * This currently always returns true until we add some per-device data passed
  187. * from the platform code to specify which mode is better.
  188. */
  189. static inline bool ks8851_rx_1msg(struct ks8851_net *ks)
  190. {
  191. return true;
  192. }
  193. /**
  194. * ks8851_rdreg - issue read register command and return the data
  195. * @ks: The device state
  196. * @op: The register address and byte enables in message format.
  197. * @rxb: The RX buffer to return the result into
  198. * @rxl: The length of data expected.
  199. *
  200. * This is the low level read call that issues the necessary spi message(s)
  201. * to read data from the register specified in @op.
  202. */
  203. static void ks8851_rdreg(struct ks8851_net *ks, unsigned op,
  204. u8 *rxb, unsigned rxl)
  205. {
  206. struct spi_transfer *xfer;
  207. struct spi_message *msg;
  208. __le16 *txb = (__le16 *)ks->txd;
  209. u8 *trx = ks->rxd;
  210. int ret;
  211. txb[0] = cpu_to_le16(op | KS_SPIOP_RD);
  212. if (ks8851_rx_1msg(ks)) {
  213. msg = &ks->spi_msg1;
  214. xfer = &ks->spi_xfer1;
  215. xfer->tx_buf = txb;
  216. xfer->rx_buf = trx;
  217. xfer->len = rxl + 2;
  218. } else {
  219. msg = &ks->spi_msg2;
  220. xfer = ks->spi_xfer2;
  221. xfer->tx_buf = txb;
  222. xfer->rx_buf = NULL;
  223. xfer->len = 2;
  224. xfer++;
  225. xfer->tx_buf = NULL;
  226. xfer->rx_buf = trx;
  227. xfer->len = rxl;
  228. }
  229. ret = spi_sync(ks->spidev, msg);
  230. if (ret < 0)
  231. netdev_err(ks->netdev, "read: spi_sync() failed\n");
  232. else if (ks8851_rx_1msg(ks))
  233. memcpy(rxb, trx + 2, rxl);
  234. else
  235. memcpy(rxb, trx, rxl);
  236. }
  237. /**
  238. * ks8851_rdreg8 - read 8 bit register from device
  239. * @ks: The chip information
  240. * @reg: The register address
  241. *
  242. * Read a 8bit register from the chip, returning the result
  243. */
  244. static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg)
  245. {
  246. u8 rxb[1];
  247. ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1);
  248. return rxb[0];
  249. }
  250. /**
  251. * ks8851_rdreg16 - read 16 bit register from device
  252. * @ks: The chip information
  253. * @reg: The register address
  254. *
  255. * Read a 16bit register from the chip, returning the result
  256. */
  257. static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg)
  258. {
  259. __le16 rx = 0;
  260. ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2);
  261. return le16_to_cpu(rx);
  262. }
  263. /**
  264. * ks8851_rdreg32 - read 32 bit register from device
  265. * @ks: The chip information
  266. * @reg: The register address
  267. *
  268. * Read a 32bit register from the chip.
  269. *
  270. * Note, this read requires the address be aligned to 4 bytes.
  271. */
  272. static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg)
  273. {
  274. __le32 rx = 0;
  275. WARN_ON(reg & 3);
  276. ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4);
  277. return le32_to_cpu(rx);
  278. }
  279. /**
  280. * ks8851_soft_reset - issue one of the soft reset to the device
  281. * @ks: The device state.
  282. * @op: The bit(s) to set in the GRR
  283. *
  284. * Issue the relevant soft-reset command to the device's GRR register
  285. * specified by @op.
  286. *
  287. * Note, the delays are in there as a caution to ensure that the reset
  288. * has time to take effect and then complete. Since the datasheet does
  289. * not currently specify the exact sequence, we have chosen something
  290. * that seems to work with our device.
  291. */
  292. static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
  293. {
  294. ks8851_wrreg16(ks, KS_GRR, op);
  295. mdelay(1); /* wait a short time to effect reset */
  296. ks8851_wrreg16(ks, KS_GRR, 0);
  297. mdelay(1); /* wait for condition to clear */
  298. }
  299. /**
  300. * ks8851_write_mac_addr - write mac address to device registers
  301. * @dev: The network device
  302. *
  303. * Update the KS8851 MAC address registers from the address in @dev.
  304. *
  305. * This call assumes that the chip is not running, so there is no need to
  306. * shutdown the RXQ process whilst setting this.
  307. */
  308. static int ks8851_write_mac_addr(struct net_device *dev)
  309. {
  310. struct ks8851_net *ks = netdev_priv(dev);
  311. int i;
  312. mutex_lock(&ks->lock);
  313. for (i = 0; i < ETH_ALEN; i++)
  314. ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
  315. mutex_unlock(&ks->lock);
  316. return 0;
  317. }
  318. /**
  319. * ks8851_init_mac - initialise the mac address
  320. * @ks: The device structure
  321. *
  322. * Get or create the initial mac address for the device and then set that
  323. * into the station address register. Currently we assume that the device
  324. * does not have a valid mac address in it, and so we use random_ether_addr()
  325. * to create a new one.
  326. *
  327. * In future, the driver should check to see if the device has an EEPROM
  328. * attached and whether that has a valid ethernet address in it.
  329. */
  330. static void ks8851_init_mac(struct ks8851_net *ks)
  331. {
  332. struct net_device *dev = ks->netdev;
  333. random_ether_addr(dev->dev_addr);
  334. ks8851_write_mac_addr(dev);
  335. }
  336. /**
  337. * ks8851_irq - device interrupt handler
  338. * @irq: Interrupt number passed from the IRQ hnalder.
  339. * @pw: The private word passed to register_irq(), our struct ks8851_net.
  340. *
  341. * Disable the interrupt from happening again until we've processed the
  342. * current status by scheduling ks8851_irq_work().
  343. */
  344. static irqreturn_t ks8851_irq(int irq, void *pw)
  345. {
  346. struct ks8851_net *ks = pw;
  347. disable_irq_nosync(irq);
  348. schedule_work(&ks->irq_work);
  349. return IRQ_HANDLED;
  350. }
  351. /**
  352. * ks8851_rdfifo - read data from the receive fifo
  353. * @ks: The device state.
  354. * @buff: The buffer address
  355. * @len: The length of the data to read
  356. *
  357. * Issue an RXQ FIFO read command and read the @len amount of data from
  358. * the FIFO into the buffer specified by @buff.
  359. */
  360. static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len)
  361. {
  362. struct spi_transfer *xfer = ks->spi_xfer2;
  363. struct spi_message *msg = &ks->spi_msg2;
  364. u8 txb[1];
  365. int ret;
  366. netif_dbg(ks, rx_status, ks->netdev,
  367. "%s: %d@%p\n", __func__, len, buff);
  368. /* set the operation we're issuing */
  369. txb[0] = KS_SPIOP_RXFIFO;
  370. xfer->tx_buf = txb;
  371. xfer->rx_buf = NULL;
  372. xfer->len = 1;
  373. xfer++;
  374. xfer->rx_buf = buff;
  375. xfer->tx_buf = NULL;
  376. xfer->len = len;
  377. ret = spi_sync(ks->spidev, msg);
  378. if (ret < 0)
  379. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  380. }
  381. /**
  382. * ks8851_dbg_dumpkkt - dump initial packet contents to debug
  383. * @ks: The device state
  384. * @rxpkt: The data for the received packet
  385. *
  386. * Dump the initial data from the packet to dev_dbg().
  387. */
  388. static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt)
  389. {
  390. netdev_dbg(ks->netdev,
  391. "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
  392. rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7],
  393. rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11],
  394. rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]);
  395. }
  396. /**
  397. * ks8851_rx_pkts - receive packets from the host
  398. * @ks: The device information.
  399. *
  400. * This is called from the IRQ work queue when the system detects that there
  401. * are packets in the receive queue. Find out how many packets there are and
  402. * read them from the FIFO.
  403. */
  404. static void ks8851_rx_pkts(struct ks8851_net *ks)
  405. {
  406. struct sk_buff *skb;
  407. unsigned rxfc;
  408. unsigned rxlen;
  409. unsigned rxstat;
  410. u32 rxh;
  411. u8 *rxpkt;
  412. rxfc = ks8851_rdreg8(ks, KS_RXFC);
  413. netif_dbg(ks, rx_status, ks->netdev,
  414. "%s: %d packets\n", __func__, rxfc);
  415. /* Currently we're issuing a read per packet, but we could possibly
  416. * improve the code by issuing a single read, getting the receive
  417. * header, allocating the packet and then reading the packet data
  418. * out in one go.
  419. *
  420. * This form of operation would require us to hold the SPI bus'
  421. * chipselect low during the entie transaction to avoid any
  422. * reset to the data stream coming from the chip.
  423. */
  424. for (; rxfc != 0; rxfc--) {
  425. rxh = ks8851_rdreg32(ks, KS_RXFHSR);
  426. rxstat = rxh & 0xffff;
  427. rxlen = rxh >> 16;
  428. netif_dbg(ks, rx_status, ks->netdev,
  429. "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen);
  430. /* the length of the packet includes the 32bit CRC */
  431. /* set dma read address */
  432. ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00);
  433. /* start the packet dma process, and set auto-dequeue rx */
  434. ks8851_wrreg16(ks, KS_RXQCR,
  435. ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE);
  436. if (rxlen > 4) {
  437. unsigned int rxalign;
  438. rxlen -= 4;
  439. rxalign = ALIGN(rxlen, 4);
  440. skb = netdev_alloc_skb_ip_align(ks->netdev, rxalign);
  441. if (skb) {
  442. /* 4 bytes of status header + 4 bytes of
  443. * garbage: we put them before ethernet
  444. * header, so that they are copied,
  445. * but ignored.
  446. */
  447. rxpkt = skb_put(skb, rxlen) - 8;
  448. ks8851_rdfifo(ks, rxpkt, rxalign + 8);
  449. if (netif_msg_pktdata(ks))
  450. ks8851_dbg_dumpkkt(ks, rxpkt);
  451. skb->protocol = eth_type_trans(skb, ks->netdev);
  452. netif_rx(skb);
  453. ks->netdev->stats.rx_packets++;
  454. ks->netdev->stats.rx_bytes += rxlen;
  455. }
  456. }
  457. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  458. }
  459. }
  460. /**
  461. * ks8851_irq_work - work queue handler for dealing with interrupt requests
  462. * @work: The work structure that was scheduled by schedule_work()
  463. *
  464. * This is the handler invoked when the ks8851_irq() is called to find out
  465. * what happened, as we cannot allow ourselves to sleep whilst waiting for
  466. * anything other process has the chip's lock.
  467. *
  468. * Read the interrupt status, work out what needs to be done and then clear
  469. * any of the interrupts that are not needed.
  470. */
  471. static void ks8851_irq_work(struct work_struct *work)
  472. {
  473. struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work);
  474. unsigned status;
  475. unsigned handled = 0;
  476. mutex_lock(&ks->lock);
  477. status = ks8851_rdreg16(ks, KS_ISR);
  478. netif_dbg(ks, intr, ks->netdev,
  479. "%s: status 0x%04x\n", __func__, status);
  480. if (status & IRQ_LCI) {
  481. /* should do something about checking link status */
  482. handled |= IRQ_LCI;
  483. }
  484. if (status & IRQ_LDI) {
  485. u16 pmecr = ks8851_rdreg16(ks, KS_PMECR);
  486. pmecr &= ~PMECR_WKEVT_MASK;
  487. ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
  488. handled |= IRQ_LDI;
  489. }
  490. if (status & IRQ_RXPSI)
  491. handled |= IRQ_RXPSI;
  492. if (status & IRQ_TXI) {
  493. handled |= IRQ_TXI;
  494. /* no lock here, tx queue should have been stopped */
  495. /* update our idea of how much tx space is available to the
  496. * system */
  497. ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR);
  498. netif_dbg(ks, intr, ks->netdev,
  499. "%s: txspace %d\n", __func__, ks->tx_space);
  500. }
  501. if (status & IRQ_RXI)
  502. handled |= IRQ_RXI;
  503. if (status & IRQ_SPIBEI) {
  504. dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__);
  505. handled |= IRQ_SPIBEI;
  506. }
  507. ks8851_wrreg16(ks, KS_ISR, handled);
  508. if (status & IRQ_RXI) {
  509. /* the datasheet says to disable the rx interrupt during
  510. * packet read-out, however we're masking the interrupt
  511. * from the device so do not bother masking just the RX
  512. * from the device. */
  513. ks8851_rx_pkts(ks);
  514. }
  515. /* if something stopped the rx process, probably due to wanting
  516. * to change the rx settings, then do something about restarting
  517. * it. */
  518. if (status & IRQ_RXPSI) {
  519. struct ks8851_rxctrl *rxc = &ks->rxctrl;
  520. /* update the multicast hash table */
  521. ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]);
  522. ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]);
  523. ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]);
  524. ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]);
  525. ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2);
  526. ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1);
  527. }
  528. mutex_unlock(&ks->lock);
  529. if (status & IRQ_TXI)
  530. netif_wake_queue(ks->netdev);
  531. enable_irq(ks->netdev->irq);
  532. }
  533. /**
  534. * calc_txlen - calculate size of message to send packet
  535. * @len: Length of data
  536. *
  537. * Returns the size of the TXFIFO message needed to send
  538. * this packet.
  539. */
  540. static inline unsigned calc_txlen(unsigned len)
  541. {
  542. return ALIGN(len + 4, 4);
  543. }
  544. /**
  545. * ks8851_wrpkt - write packet to TX FIFO
  546. * @ks: The device state.
  547. * @txp: The sk_buff to transmit.
  548. * @irq: IRQ on completion of the packet.
  549. *
  550. * Send the @txp to the chip. This means creating the relevant packet header
  551. * specifying the length of the packet and the other information the chip
  552. * needs, such as IRQ on completion. Send the header and the packet data to
  553. * the device.
  554. */
  555. static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq)
  556. {
  557. struct spi_transfer *xfer = ks->spi_xfer2;
  558. struct spi_message *msg = &ks->spi_msg2;
  559. unsigned fid = 0;
  560. int ret;
  561. netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n",
  562. __func__, txp, txp->len, txp->data, irq);
  563. fid = ks->fid++;
  564. fid &= TXFR_TXFID_MASK;
  565. if (irq)
  566. fid |= TXFR_TXIC; /* irq on completion */
  567. /* start header at txb[1] to align txw entries */
  568. ks->txh.txb[1] = KS_SPIOP_TXFIFO;
  569. ks->txh.txw[1] = cpu_to_le16(fid);
  570. ks->txh.txw[2] = cpu_to_le16(txp->len);
  571. xfer->tx_buf = &ks->txh.txb[1];
  572. xfer->rx_buf = NULL;
  573. xfer->len = 5;
  574. xfer++;
  575. xfer->tx_buf = txp->data;
  576. xfer->rx_buf = NULL;
  577. xfer->len = ALIGN(txp->len, 4);
  578. ret = spi_sync(ks->spidev, msg);
  579. if (ret < 0)
  580. netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__);
  581. }
  582. /**
  583. * ks8851_done_tx - update and then free skbuff after transmitting
  584. * @ks: The device state
  585. * @txb: The buffer transmitted
  586. */
  587. static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb)
  588. {
  589. struct net_device *dev = ks->netdev;
  590. dev->stats.tx_bytes += txb->len;
  591. dev->stats.tx_packets++;
  592. dev_kfree_skb(txb);
  593. }
  594. /**
  595. * ks8851_tx_work - process tx packet(s)
  596. * @work: The work strucutre what was scheduled.
  597. *
  598. * This is called when a number of packets have been scheduled for
  599. * transmission and need to be sent to the device.
  600. */
  601. static void ks8851_tx_work(struct work_struct *work)
  602. {
  603. struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work);
  604. struct sk_buff *txb;
  605. bool last = skb_queue_empty(&ks->txq);
  606. mutex_lock(&ks->lock);
  607. while (!last) {
  608. txb = skb_dequeue(&ks->txq);
  609. last = skb_queue_empty(&ks->txq);
  610. if (txb != NULL) {
  611. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA);
  612. ks8851_wrpkt(ks, txb, last);
  613. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  614. ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
  615. ks8851_done_tx(ks, txb);
  616. }
  617. }
  618. mutex_unlock(&ks->lock);
  619. }
  620. /**
  621. * ks8851_set_powermode - set power mode of the device
  622. * @ks: The device state
  623. * @pwrmode: The power mode value to write to KS_PMECR.
  624. *
  625. * Change the power mode of the chip.
  626. */
  627. static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode)
  628. {
  629. unsigned pmecr;
  630. netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode);
  631. pmecr = ks8851_rdreg16(ks, KS_PMECR);
  632. pmecr &= ~PMECR_PM_MASK;
  633. pmecr |= pwrmode;
  634. ks8851_wrreg16(ks, KS_PMECR, pmecr);
  635. }
  636. /**
  637. * ks8851_net_open - open network device
  638. * @dev: The network device being opened.
  639. *
  640. * Called when the network device is marked active, such as a user executing
  641. * 'ifconfig up' on the device.
  642. */
  643. static int ks8851_net_open(struct net_device *dev)
  644. {
  645. struct ks8851_net *ks = netdev_priv(dev);
  646. /* lock the card, even if we may not actually be doing anything
  647. * else at the moment */
  648. mutex_lock(&ks->lock);
  649. netif_dbg(ks, ifup, ks->netdev, "opening\n");
  650. /* bring chip out of any power saving mode it was in */
  651. ks8851_set_powermode(ks, PMECR_PM_NORMAL);
  652. /* issue a soft reset to the RX/TX QMU to put it into a known
  653. * state. */
  654. ks8851_soft_reset(ks, GRR_QMU);
  655. /* setup transmission parameters */
  656. ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */
  657. TXCR_TXPE | /* pad to min length */
  658. TXCR_TXCRC | /* add CRC */
  659. TXCR_TXFCE)); /* enable flow control */
  660. /* auto-increment tx data, reset tx pointer */
  661. ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
  662. /* setup receiver control */
  663. ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */
  664. RXCR1_RXFCE | /* enable flow control */
  665. RXCR1_RXBE | /* broadcast enable */
  666. RXCR1_RXUE | /* unicast enable */
  667. RXCR1_RXE)); /* enable rx block */
  668. /* transfer entire frames out in one go */
  669. ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME);
  670. /* set receive counter timeouts */
  671. ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */
  672. ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */
  673. ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */
  674. ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */
  675. RXQCR_RXDBCTE | /* IRQ on byte count exceeded */
  676. RXQCR_RXDTTE); /* IRQ on time exceeded */
  677. ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr);
  678. /* clear then enable interrupts */
  679. #define STD_IRQ (IRQ_LCI | /* Link Change */ \
  680. IRQ_TXI | /* TX done */ \
  681. IRQ_RXI | /* RX done */ \
  682. IRQ_SPIBEI | /* SPI bus error */ \
  683. IRQ_TXPSI | /* TX process stop */ \
  684. IRQ_RXPSI) /* RX process stop */
  685. ks->rc_ier = STD_IRQ;
  686. ks8851_wrreg16(ks, KS_ISR, STD_IRQ);
  687. ks8851_wrreg16(ks, KS_IER, STD_IRQ);
  688. netif_start_queue(ks->netdev);
  689. netif_dbg(ks, ifup, ks->netdev, "network device up\n");
  690. mutex_unlock(&ks->lock);
  691. return 0;
  692. }
  693. /**
  694. * ks8851_net_stop - close network device
  695. * @dev: The device being closed.
  696. *
  697. * Called to close down a network device which has been active. Cancell any
  698. * work, shutdown the RX and TX process and then place the chip into a low
  699. * power state whilst it is not being used.
  700. */
  701. static int ks8851_net_stop(struct net_device *dev)
  702. {
  703. struct ks8851_net *ks = netdev_priv(dev);
  704. netif_info(ks, ifdown, dev, "shutting down\n");
  705. netif_stop_queue(dev);
  706. mutex_lock(&ks->lock);
  707. /* stop any outstanding work */
  708. flush_work(&ks->irq_work);
  709. flush_work(&ks->tx_work);
  710. flush_work(&ks->rxctrl_work);
  711. /* turn off the IRQs and ack any outstanding */
  712. ks8851_wrreg16(ks, KS_IER, 0x0000);
  713. ks8851_wrreg16(ks, KS_ISR, 0xffff);
  714. /* shutdown RX process */
  715. ks8851_wrreg16(ks, KS_RXCR1, 0x0000);
  716. /* shutdown TX process */
  717. ks8851_wrreg16(ks, KS_TXCR, 0x0000);
  718. /* set powermode to soft power down to save power */
  719. ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN);
  720. /* ensure any queued tx buffers are dumped */
  721. while (!skb_queue_empty(&ks->txq)) {
  722. struct sk_buff *txb = skb_dequeue(&ks->txq);
  723. netif_dbg(ks, ifdown, ks->netdev,
  724. "%s: freeing txb %p\n", __func__, txb);
  725. dev_kfree_skb(txb);
  726. }
  727. mutex_unlock(&ks->lock);
  728. return 0;
  729. }
  730. /**
  731. * ks8851_start_xmit - transmit packet
  732. * @skb: The buffer to transmit
  733. * @dev: The device used to transmit the packet.
  734. *
  735. * Called by the network layer to transmit the @skb. Queue the packet for
  736. * the device and schedule the necessary work to transmit the packet when
  737. * it is free.
  738. *
  739. * We do this to firstly avoid sleeping with the network device locked,
  740. * and secondly so we can round up more than one packet to transmit which
  741. * means we can try and avoid generating too many transmit done interrupts.
  742. */
  743. static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb,
  744. struct net_device *dev)
  745. {
  746. struct ks8851_net *ks = netdev_priv(dev);
  747. unsigned needed = calc_txlen(skb->len);
  748. netdev_tx_t ret = NETDEV_TX_OK;
  749. netif_dbg(ks, tx_queued, ks->netdev,
  750. "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data);
  751. spin_lock(&ks->statelock);
  752. if (needed > ks->tx_space) {
  753. netif_stop_queue(dev);
  754. ret = NETDEV_TX_BUSY;
  755. } else {
  756. ks->tx_space -= needed;
  757. skb_queue_tail(&ks->txq, skb);
  758. }
  759. spin_unlock(&ks->statelock);
  760. schedule_work(&ks->tx_work);
  761. return ret;
  762. }
  763. /**
  764. * ks8851_rxctrl_work - work handler to change rx mode
  765. * @work: The work structure this belongs to.
  766. *
  767. * Lock the device and issue the necessary changes to the receive mode from
  768. * the network device layer. This is done so that we can do this without
  769. * having to sleep whilst holding the network device lock.
  770. *
  771. * Since the recommendation from Micrel is that the RXQ is shutdown whilst the
  772. * receive parameters are programmed, we issue a write to disable the RXQ and
  773. * then wait for the interrupt handler to be triggered once the RXQ shutdown is
  774. * complete. The interrupt handler then writes the new values into the chip.
  775. */
  776. static void ks8851_rxctrl_work(struct work_struct *work)
  777. {
  778. struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work);
  779. mutex_lock(&ks->lock);
  780. /* need to shutdown RXQ before modifying filter parameters */
  781. ks8851_wrreg16(ks, KS_RXCR1, 0x00);
  782. mutex_unlock(&ks->lock);
  783. }
  784. static void ks8851_set_rx_mode(struct net_device *dev)
  785. {
  786. struct ks8851_net *ks = netdev_priv(dev);
  787. struct ks8851_rxctrl rxctrl;
  788. memset(&rxctrl, 0, sizeof(rxctrl));
  789. if (dev->flags & IFF_PROMISC) {
  790. /* interface to receive everything */
  791. rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF;
  792. } else if (dev->flags & IFF_ALLMULTI) {
  793. /* accept all multicast packets */
  794. rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE |
  795. RXCR1_RXPAFMA | RXCR1_RXMAFMA);
  796. } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) {
  797. struct netdev_hw_addr *ha;
  798. u32 crc;
  799. /* accept some multicast */
  800. netdev_for_each_mc_addr(ha, dev) {
  801. crc = ether_crc(ETH_ALEN, ha->addr);
  802. crc >>= (32 - 6); /* get top six bits */
  803. rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf));
  804. }
  805. rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
  806. } else {
  807. /* just accept broadcast / unicast */
  808. rxctrl.rxcr1 = RXCR1_RXPAFMA;
  809. }
  810. rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */
  811. RXCR1_RXBE | /* broadcast enable */
  812. RXCR1_RXE | /* RX process enable */
  813. RXCR1_RXFCE); /* enable flow control */
  814. rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME;
  815. /* schedule work to do the actual set of the data if needed */
  816. spin_lock(&ks->statelock);
  817. if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) {
  818. memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl));
  819. schedule_work(&ks->rxctrl_work);
  820. }
  821. spin_unlock(&ks->statelock);
  822. }
  823. static int ks8851_set_mac_address(struct net_device *dev, void *addr)
  824. {
  825. struct sockaddr *sa = addr;
  826. if (netif_running(dev))
  827. return -EBUSY;
  828. if (!is_valid_ether_addr(sa->sa_data))
  829. return -EADDRNOTAVAIL;
  830. memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
  831. return ks8851_write_mac_addr(dev);
  832. }
  833. static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
  834. {
  835. struct ks8851_net *ks = netdev_priv(dev);
  836. if (!netif_running(dev))
  837. return -EINVAL;
  838. return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL);
  839. }
  840. static const struct net_device_ops ks8851_netdev_ops = {
  841. .ndo_open = ks8851_net_open,
  842. .ndo_stop = ks8851_net_stop,
  843. .ndo_do_ioctl = ks8851_net_ioctl,
  844. .ndo_start_xmit = ks8851_start_xmit,
  845. .ndo_set_mac_address = ks8851_set_mac_address,
  846. .ndo_set_rx_mode = ks8851_set_rx_mode,
  847. .ndo_change_mtu = eth_change_mtu,
  848. .ndo_validate_addr = eth_validate_addr,
  849. };
  850. /* Companion eeprom access */
  851. enum { /* EEPROM programming states */
  852. EEPROM_CONTROL,
  853. EEPROM_ADDRESS,
  854. EEPROM_DATA,
  855. EEPROM_COMPLETE
  856. };
  857. /**
  858. * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
  859. * @dev: The network device the PHY is on.
  860. * @addr: EEPROM address to read
  861. *
  862. * eeprom_size: used to define the data coding length. Can be changed
  863. * through debug-fs.
  864. *
  865. * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
  866. * Warning: The READ feature is not supported on ks8851 revision 0.
  867. *
  868. * Rough programming model:
  869. * - on period start: set clock high and read value on bus
  870. * - on period / 2: set clock low and program value on bus
  871. * - start on period / 2
  872. */
  873. unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
  874. {
  875. struct ks8851_net *ks = netdev_priv(dev);
  876. int eepcr;
  877. int ctrl = EEPROM_OP_READ;
  878. int state = EEPROM_CONTROL;
  879. int bit_count = EEPROM_OP_LEN - 1;
  880. unsigned int data = 0;
  881. int dummy;
  882. unsigned int addr_len;
  883. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  884. /* start transaction: chip select high, authorize write */
  885. mutex_lock(&ks->lock);
  886. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  887. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  888. eepcr |= EEPCR_EECS;
  889. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  890. mutex_unlock(&ks->lock);
  891. while (state != EEPROM_COMPLETE) {
  892. /* falling clock period starts... */
  893. /* set EED_IO pin for control and address */
  894. eepcr &= ~EEPCR_EEDO;
  895. switch (state) {
  896. case EEPROM_CONTROL:
  897. eepcr |= ((ctrl >> bit_count) & 1) << 2;
  898. if (bit_count-- <= 0) {
  899. bit_count = addr_len - 1;
  900. state = EEPROM_ADDRESS;
  901. }
  902. break;
  903. case EEPROM_ADDRESS:
  904. eepcr |= ((addr >> bit_count) & 1) << 2;
  905. bit_count--;
  906. break;
  907. case EEPROM_DATA:
  908. /* Change to receive mode */
  909. eepcr &= ~EEPCR_EESRWA;
  910. break;
  911. }
  912. /* lower clock */
  913. eepcr &= ~EEPCR_EESCK;
  914. mutex_lock(&ks->lock);
  915. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  916. mutex_unlock(&ks->lock);
  917. /* waitread period / 2 */
  918. udelay(EEPROM_SK_PERIOD / 2);
  919. /* rising clock period starts... */
  920. /* raise clock */
  921. mutex_lock(&ks->lock);
  922. eepcr |= EEPCR_EESCK;
  923. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  924. mutex_unlock(&ks->lock);
  925. /* Manage read */
  926. switch (state) {
  927. case EEPROM_ADDRESS:
  928. if (bit_count < 0) {
  929. bit_count = EEPROM_DATA_LEN - 1;
  930. state = EEPROM_DATA;
  931. }
  932. break;
  933. case EEPROM_DATA:
  934. mutex_lock(&ks->lock);
  935. dummy = ks8851_rdreg16(ks, KS_EEPCR);
  936. mutex_unlock(&ks->lock);
  937. data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
  938. if (bit_count-- <= 0)
  939. state = EEPROM_COMPLETE;
  940. break;
  941. }
  942. /* wait period / 2 */
  943. udelay(EEPROM_SK_PERIOD / 2);
  944. }
  945. /* close transaction */
  946. mutex_lock(&ks->lock);
  947. eepcr &= ~EEPCR_EECS;
  948. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  949. eepcr = 0;
  950. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  951. mutex_unlock(&ks->lock);
  952. return data;
  953. }
  954. /**
  955. * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
  956. * @dev: The network device the PHY is on.
  957. * @op: operand (can be WRITE, EWEN, EWDS)
  958. * @addr: EEPROM address to write
  959. * @data: data to write
  960. *
  961. * eeprom_size: used to define the data coding length. Can be changed
  962. * through debug-fs.
  963. *
  964. * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
  965. *
  966. * Note that a write enable is required before writing data.
  967. *
  968. * Rough programming model:
  969. * - on period start: set clock high
  970. * - on period / 2: set clock low and program value on bus
  971. * - start on period / 2
  972. */
  973. void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
  974. unsigned int addr, unsigned int data)
  975. {
  976. struct ks8851_net *ks = netdev_priv(dev);
  977. int eepcr;
  978. int state = EEPROM_CONTROL;
  979. int bit_count = EEPROM_OP_LEN - 1;
  980. unsigned int addr_len;
  981. addr_len = (ks->eeprom_size == 128) ? 6 : 8;
  982. switch (op) {
  983. case EEPROM_OP_EWEN:
  984. addr = 0x30;
  985. break;
  986. case EEPROM_OP_EWDS:
  987. addr = 0;
  988. break;
  989. }
  990. /* start transaction: chip select high, authorize write */
  991. mutex_lock(&ks->lock);
  992. eepcr = EEPCR_EESA | EEPCR_EESRWA;
  993. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  994. eepcr |= EEPCR_EECS;
  995. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  996. mutex_unlock(&ks->lock);
  997. while (state != EEPROM_COMPLETE) {
  998. /* falling clock period starts... */
  999. /* set EED_IO pin for control and address */
  1000. eepcr &= ~EEPCR_EEDO;
  1001. switch (state) {
  1002. case EEPROM_CONTROL:
  1003. eepcr |= ((op >> bit_count) & 1) << 2;
  1004. if (bit_count-- <= 0) {
  1005. bit_count = addr_len - 1;
  1006. state = EEPROM_ADDRESS;
  1007. }
  1008. break;
  1009. case EEPROM_ADDRESS:
  1010. eepcr |= ((addr >> bit_count) & 1) << 2;
  1011. if (bit_count-- <= 0) {
  1012. if (op == EEPROM_OP_WRITE) {
  1013. bit_count = EEPROM_DATA_LEN - 1;
  1014. state = EEPROM_DATA;
  1015. } else {
  1016. state = EEPROM_COMPLETE;
  1017. }
  1018. }
  1019. break;
  1020. case EEPROM_DATA:
  1021. eepcr |= ((data >> bit_count) & 1) << 2;
  1022. if (bit_count-- <= 0)
  1023. state = EEPROM_COMPLETE;
  1024. break;
  1025. }
  1026. /* lower clock */
  1027. eepcr &= ~EEPCR_EESCK;
  1028. mutex_lock(&ks->lock);
  1029. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1030. mutex_unlock(&ks->lock);
  1031. /* wait period / 2 */
  1032. udelay(EEPROM_SK_PERIOD / 2);
  1033. /* rising clock period starts... */
  1034. /* raise clock */
  1035. eepcr |= EEPCR_EESCK;
  1036. mutex_lock(&ks->lock);
  1037. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1038. mutex_unlock(&ks->lock);
  1039. /* wait period / 2 */
  1040. udelay(EEPROM_SK_PERIOD / 2);
  1041. }
  1042. /* close transaction */
  1043. mutex_lock(&ks->lock);
  1044. eepcr &= ~EEPCR_EECS;
  1045. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1046. eepcr = 0;
  1047. ks8851_wrreg16(ks, KS_EEPCR, eepcr);
  1048. mutex_unlock(&ks->lock);
  1049. }
  1050. /* ethtool support */
  1051. static void ks8851_get_drvinfo(struct net_device *dev,
  1052. struct ethtool_drvinfo *di)
  1053. {
  1054. strlcpy(di->driver, "KS8851", sizeof(di->driver));
  1055. strlcpy(di->version, "1.00", sizeof(di->version));
  1056. strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info));
  1057. }
  1058. static u32 ks8851_get_msglevel(struct net_device *dev)
  1059. {
  1060. struct ks8851_net *ks = netdev_priv(dev);
  1061. return ks->msg_enable;
  1062. }
  1063. static void ks8851_set_msglevel(struct net_device *dev, u32 to)
  1064. {
  1065. struct ks8851_net *ks = netdev_priv(dev);
  1066. ks->msg_enable = to;
  1067. }
  1068. static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1069. {
  1070. struct ks8851_net *ks = netdev_priv(dev);
  1071. return mii_ethtool_gset(&ks->mii, cmd);
  1072. }
  1073. static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1074. {
  1075. struct ks8851_net *ks = netdev_priv(dev);
  1076. return mii_ethtool_sset(&ks->mii, cmd);
  1077. }
  1078. static u32 ks8851_get_link(struct net_device *dev)
  1079. {
  1080. struct ks8851_net *ks = netdev_priv(dev);
  1081. return mii_link_ok(&ks->mii);
  1082. }
  1083. static int ks8851_nway_reset(struct net_device *dev)
  1084. {
  1085. struct ks8851_net *ks = netdev_priv(dev);
  1086. return mii_nway_restart(&ks->mii);
  1087. }
  1088. static int ks8851_get_eeprom_len(struct net_device *dev)
  1089. {
  1090. struct ks8851_net *ks = netdev_priv(dev);
  1091. return ks->eeprom_size;
  1092. }
  1093. static int ks8851_get_eeprom(struct net_device *dev,
  1094. struct ethtool_eeprom *eeprom, u8 *bytes)
  1095. {
  1096. struct ks8851_net *ks = netdev_priv(dev);
  1097. u16 *eeprom_buff;
  1098. int first_word;
  1099. int last_word;
  1100. int ret_val = 0;
  1101. u16 i;
  1102. if (eeprom->len == 0)
  1103. return -EINVAL;
  1104. if (eeprom->len > ks->eeprom_size)
  1105. return -EINVAL;
  1106. eeprom->magic = ks8851_rdreg16(ks, KS_CIDER);
  1107. first_word = eeprom->offset >> 1;
  1108. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1109. eeprom_buff = kmalloc(sizeof(u16) *
  1110. (last_word - first_word + 1), GFP_KERNEL);
  1111. if (!eeprom_buff)
  1112. return -ENOMEM;
  1113. for (i = 0; i < last_word - first_word + 1; i++)
  1114. eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
  1115. /* Device's eeprom is little-endian, word addressable */
  1116. for (i = 0; i < last_word - first_word + 1; i++)
  1117. le16_to_cpus(&eeprom_buff[i]);
  1118. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
  1119. kfree(eeprom_buff);
  1120. return ret_val;
  1121. }
  1122. static int ks8851_set_eeprom(struct net_device *dev,
  1123. struct ethtool_eeprom *eeprom, u8 *bytes)
  1124. {
  1125. struct ks8851_net *ks = netdev_priv(dev);
  1126. u16 *eeprom_buff;
  1127. void *ptr;
  1128. int max_len;
  1129. int first_word;
  1130. int last_word;
  1131. int ret_val = 0;
  1132. u16 i;
  1133. if (eeprom->len == 0)
  1134. return -EOPNOTSUPP;
  1135. if (eeprom->len > ks->eeprom_size)
  1136. return -EINVAL;
  1137. if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER))
  1138. return -EFAULT;
  1139. first_word = eeprom->offset >> 1;
  1140. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  1141. max_len = (last_word - first_word + 1) * 2;
  1142. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  1143. if (!eeprom_buff)
  1144. return -ENOMEM;
  1145. ptr = (void *)eeprom_buff;
  1146. if (eeprom->offset & 1) {
  1147. /* need read/modify/write of first changed EEPROM word */
  1148. /* only the second byte of the word is being modified */
  1149. eeprom_buff[0] = ks8851_eeprom_read(dev, first_word);
  1150. ptr++;
  1151. }
  1152. if ((eeprom->offset + eeprom->len) & 1)
  1153. /* need read/modify/write of last changed EEPROM word */
  1154. /* only the first byte of the word is being modified */
  1155. eeprom_buff[last_word - first_word] =
  1156. ks8851_eeprom_read(dev, last_word);
  1157. /* Device's eeprom is little-endian, word addressable */
  1158. le16_to_cpus(&eeprom_buff[0]);
  1159. le16_to_cpus(&eeprom_buff[last_word - first_word]);
  1160. memcpy(ptr, bytes, eeprom->len);
  1161. for (i = 0; i < last_word - first_word + 1; i++)
  1162. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  1163. ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0);
  1164. for (i = 0; i < last_word - first_word + 1; i++) {
  1165. ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i,
  1166. eeprom_buff[i]);
  1167. mdelay(EEPROM_WRITE_TIME);
  1168. }
  1169. ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0);
  1170. kfree(eeprom_buff);
  1171. return ret_val;
  1172. }
  1173. static const struct ethtool_ops ks8851_ethtool_ops = {
  1174. .get_drvinfo = ks8851_get_drvinfo,
  1175. .get_msglevel = ks8851_get_msglevel,
  1176. .set_msglevel = ks8851_set_msglevel,
  1177. .get_settings = ks8851_get_settings,
  1178. .set_settings = ks8851_set_settings,
  1179. .get_link = ks8851_get_link,
  1180. .nway_reset = ks8851_nway_reset,
  1181. .get_eeprom_len = ks8851_get_eeprom_len,
  1182. .get_eeprom = ks8851_get_eeprom,
  1183. .set_eeprom = ks8851_set_eeprom,
  1184. };
  1185. /* MII interface controls */
  1186. /**
  1187. * ks8851_phy_reg - convert MII register into a KS8851 register
  1188. * @reg: MII register number.
  1189. *
  1190. * Return the KS8851 register number for the corresponding MII PHY register
  1191. * if possible. Return zero if the MII register has no direct mapping to the
  1192. * KS8851 register set.
  1193. */
  1194. static int ks8851_phy_reg(int reg)
  1195. {
  1196. switch (reg) {
  1197. case MII_BMCR:
  1198. return KS_P1MBCR;
  1199. case MII_BMSR:
  1200. return KS_P1MBSR;
  1201. case MII_PHYSID1:
  1202. return KS_PHY1ILR;
  1203. case MII_PHYSID2:
  1204. return KS_PHY1IHR;
  1205. case MII_ADVERTISE:
  1206. return KS_P1ANAR;
  1207. case MII_LPA:
  1208. return KS_P1ANLPR;
  1209. }
  1210. return 0x0;
  1211. }
  1212. /**
  1213. * ks8851_phy_read - MII interface PHY register read.
  1214. * @dev: The network device the PHY is on.
  1215. * @phy_addr: Address of PHY (ignored as we only have one)
  1216. * @reg: The register to read.
  1217. *
  1218. * This call reads data from the PHY register specified in @reg. Since the
  1219. * device does not support all the MII registers, the non-existent values
  1220. * are always returned as zero.
  1221. *
  1222. * We return zero for unsupported registers as the MII code does not check
  1223. * the value returned for any error status, and simply returns it to the
  1224. * caller. The mii-tool that the driver was tested with takes any -ve error
  1225. * as real PHY capabilities, thus displaying incorrect data to the user.
  1226. */
  1227. static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg)
  1228. {
  1229. struct ks8851_net *ks = netdev_priv(dev);
  1230. int ksreg;
  1231. int result;
  1232. ksreg = ks8851_phy_reg(reg);
  1233. if (!ksreg)
  1234. return 0x0; /* no error return allowed, so use zero */
  1235. mutex_lock(&ks->lock);
  1236. result = ks8851_rdreg16(ks, ksreg);
  1237. mutex_unlock(&ks->lock);
  1238. return result;
  1239. }
  1240. static void ks8851_phy_write(struct net_device *dev,
  1241. int phy, int reg, int value)
  1242. {
  1243. struct ks8851_net *ks = netdev_priv(dev);
  1244. int ksreg;
  1245. ksreg = ks8851_phy_reg(reg);
  1246. if (ksreg) {
  1247. mutex_lock(&ks->lock);
  1248. ks8851_wrreg16(ks, ksreg, value);
  1249. mutex_unlock(&ks->lock);
  1250. }
  1251. }
  1252. /**
  1253. * ks8851_read_selftest - read the selftest memory info.
  1254. * @ks: The device state
  1255. *
  1256. * Read and check the TX/RX memory selftest information.
  1257. */
  1258. static int ks8851_read_selftest(struct ks8851_net *ks)
  1259. {
  1260. unsigned both_done = MBIR_TXMBF | MBIR_RXMBF;
  1261. int ret = 0;
  1262. unsigned rd;
  1263. rd = ks8851_rdreg16(ks, KS_MBIR);
  1264. if ((rd & both_done) != both_done) {
  1265. netdev_warn(ks->netdev, "Memory selftest not finished\n");
  1266. return 0;
  1267. }
  1268. if (rd & MBIR_TXMBFA) {
  1269. netdev_err(ks->netdev, "TX memory selftest fail\n");
  1270. ret |= 1;
  1271. }
  1272. if (rd & MBIR_RXMBFA) {
  1273. netdev_err(ks->netdev, "RX memory selftest fail\n");
  1274. ret |= 2;
  1275. }
  1276. return 0;
  1277. }
  1278. /* driver bus management functions */
  1279. #ifdef CONFIG_PM
  1280. static int ks8851_suspend(struct spi_device *spi, pm_message_t state)
  1281. {
  1282. struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
  1283. struct net_device *dev = ks->netdev;
  1284. if (netif_running(dev)) {
  1285. netif_device_detach(dev);
  1286. ks8851_net_stop(dev);
  1287. }
  1288. return 0;
  1289. }
  1290. static int ks8851_resume(struct spi_device *spi)
  1291. {
  1292. struct ks8851_net *ks = dev_get_drvdata(&spi->dev);
  1293. struct net_device *dev = ks->netdev;
  1294. if (netif_running(dev)) {
  1295. ks8851_net_open(dev);
  1296. netif_device_attach(dev);
  1297. }
  1298. return 0;
  1299. }
  1300. #else
  1301. #define ks8851_suspend NULL
  1302. #define ks8851_resume NULL
  1303. #endif
  1304. static int __devinit ks8851_probe(struct spi_device *spi)
  1305. {
  1306. struct net_device *ndev;
  1307. struct ks8851_net *ks;
  1308. int ret;
  1309. ndev = alloc_etherdev(sizeof(struct ks8851_net));
  1310. if (!ndev) {
  1311. dev_err(&spi->dev, "failed to alloc ethernet device\n");
  1312. return -ENOMEM;
  1313. }
  1314. spi->bits_per_word = 8;
  1315. ks = netdev_priv(ndev);
  1316. ks->netdev = ndev;
  1317. ks->spidev = spi;
  1318. ks->tx_space = 6144;
  1319. mutex_init(&ks->lock);
  1320. spin_lock_init(&ks->statelock);
  1321. INIT_WORK(&ks->tx_work, ks8851_tx_work);
  1322. INIT_WORK(&ks->irq_work, ks8851_irq_work);
  1323. INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work);
  1324. /* initialise pre-made spi transfer messages */
  1325. spi_message_init(&ks->spi_msg1);
  1326. spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1);
  1327. spi_message_init(&ks->spi_msg2);
  1328. spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
  1329. spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
  1330. /* setup mii state */
  1331. ks->mii.dev = ndev;
  1332. ks->mii.phy_id = 1,
  1333. ks->mii.phy_id_mask = 1;
  1334. ks->mii.reg_num_mask = 0xf;
  1335. ks->mii.mdio_read = ks8851_phy_read;
  1336. ks->mii.mdio_write = ks8851_phy_write;
  1337. dev_info(&spi->dev, "message enable is %d\n", msg_enable);
  1338. /* set the default message enable */
  1339. ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV |
  1340. NETIF_MSG_PROBE |
  1341. NETIF_MSG_LINK));
  1342. skb_queue_head_init(&ks->txq);
  1343. SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops);
  1344. SET_NETDEV_DEV(ndev, &spi->dev);
  1345. dev_set_drvdata(&spi->dev, ks);
  1346. ndev->if_port = IF_PORT_100BASET;
  1347. ndev->netdev_ops = &ks8851_netdev_ops;
  1348. ndev->irq = spi->irq;
  1349. /* issue a global soft reset to reset the device. */
  1350. ks8851_soft_reset(ks, GRR_GSR);
  1351. /* simple check for a valid chip being connected to the bus */
  1352. if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
  1353. dev_err(&spi->dev, "failed to read device ID\n");
  1354. ret = -ENODEV;
  1355. goto err_id;
  1356. }
  1357. /* cache the contents of the CCR register for EEPROM, etc. */
  1358. ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR);
  1359. if (ks->rc_ccr & CCR_EEPROM)
  1360. ks->eeprom_size = 128;
  1361. else
  1362. ks->eeprom_size = 0;
  1363. ks8851_read_selftest(ks);
  1364. ks8851_init_mac(ks);
  1365. ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW,
  1366. ndev->name, ks);
  1367. if (ret < 0) {
  1368. dev_err(&spi->dev, "failed to get irq\n");
  1369. goto err_irq;
  1370. }
  1371. ret = register_netdev(ndev);
  1372. if (ret) {
  1373. dev_err(&spi->dev, "failed to register network device\n");
  1374. goto err_netdev;
  1375. }
  1376. netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n",
  1377. CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)),
  1378. ndev->dev_addr, ndev->irq);
  1379. return 0;
  1380. err_netdev:
  1381. free_irq(ndev->irq, ndev);
  1382. err_id:
  1383. err_irq:
  1384. free_netdev(ndev);
  1385. return ret;
  1386. }
  1387. static int __devexit ks8851_remove(struct spi_device *spi)
  1388. {
  1389. struct ks8851_net *priv = dev_get_drvdata(&spi->dev);
  1390. if (netif_msg_drv(priv))
  1391. dev_info(&spi->dev, "remove\n");
  1392. unregister_netdev(priv->netdev);
  1393. free_irq(spi->irq, priv);
  1394. free_netdev(priv->netdev);
  1395. return 0;
  1396. }
  1397. static struct spi_driver ks8851_driver = {
  1398. .driver = {
  1399. .name = "ks8851",
  1400. .owner = THIS_MODULE,
  1401. },
  1402. .probe = ks8851_probe,
  1403. .remove = __devexit_p(ks8851_remove),
  1404. .suspend = ks8851_suspend,
  1405. .resume = ks8851_resume,
  1406. };
  1407. static int __init ks8851_init(void)
  1408. {
  1409. return spi_register_driver(&ks8851_driver);
  1410. }
  1411. static void __exit ks8851_exit(void)
  1412. {
  1413. spi_unregister_driver(&ks8851_driver);
  1414. }
  1415. module_init(ks8851_init);
  1416. module_exit(ks8851_exit);
  1417. MODULE_DESCRIPTION("KS8851 Network driver");
  1418. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  1419. MODULE_LICENSE("GPL");
  1420. module_param_named(message, msg_enable, int, 0);
  1421. MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)");
  1422. MODULE_ALIAS("spi:ks8851");