sdhci-of-core.c 6.1 KB

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  1. /*
  2. * OpenFirmware bindings for Secure Digital Host Controller Interface.
  3. *
  4. * Copyright (c) 2007 Freescale Semiconductor, Inc.
  5. * Copyright (c) 2009 MontaVista Software, Inc.
  6. *
  7. * Authors: Xiaobo Xie <X.Xie@freescale.com>
  8. * Anton Vorontsov <avorontsov@ru.mvista.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/delay.h>
  21. #include <linux/of.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/of_address.h>
  24. #include <linux/of_irq.h>
  25. #include <linux/mmc/host.h>
  26. #ifdef CONFIG_PPC
  27. #include <asm/machdep.h>
  28. #endif
  29. #include "sdhci-of.h"
  30. #include "sdhci.h"
  31. #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
  32. /*
  33. * These accessors are designed for big endian hosts doing I/O to
  34. * little endian controllers incorporating a 32-bit hardware byte swapper.
  35. */
  36. u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
  37. {
  38. return in_be32(host->ioaddr + reg);
  39. }
  40. u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
  41. {
  42. return in_be16(host->ioaddr + (reg ^ 0x2));
  43. }
  44. u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
  45. {
  46. return in_8(host->ioaddr + (reg ^ 0x3));
  47. }
  48. void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
  49. {
  50. out_be32(host->ioaddr + reg, val);
  51. }
  52. void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
  53. {
  54. struct sdhci_of_host *of_host = sdhci_priv(host);
  55. int base = reg & ~0x3;
  56. int shift = (reg & 0x2) * 8;
  57. switch (reg) {
  58. case SDHCI_TRANSFER_MODE:
  59. /*
  60. * Postpone this write, we must do it together with a
  61. * command write that is down below.
  62. */
  63. of_host->xfer_mode_shadow = val;
  64. return;
  65. case SDHCI_COMMAND:
  66. sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
  67. SDHCI_TRANSFER_MODE);
  68. return;
  69. }
  70. clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
  71. }
  72. void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
  73. {
  74. int base = reg & ~0x3;
  75. int shift = (reg & 0x3) * 8;
  76. clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
  77. }
  78. #endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
  79. #ifdef CONFIG_PM
  80. static int sdhci_of_suspend(struct platform_device *ofdev, pm_message_t state)
  81. {
  82. struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
  83. return mmc_suspend_host(host->mmc);
  84. }
  85. static int sdhci_of_resume(struct platform_device *ofdev)
  86. {
  87. struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
  88. return mmc_resume_host(host->mmc);
  89. }
  90. #else
  91. #define sdhci_of_suspend NULL
  92. #define sdhci_of_resume NULL
  93. #endif
  94. static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
  95. {
  96. if (of_get_property(np, "sdhci,wp-inverted", NULL))
  97. return true;
  98. /* Old device trees don't have the wp-inverted property. */
  99. #ifdef CONFIG_PPC
  100. return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
  101. #else
  102. return false;
  103. #endif
  104. }
  105. static const struct of_device_id sdhci_of_match[];
  106. static int __devinit sdhci_of_probe(struct platform_device *ofdev)
  107. {
  108. const struct of_device_id *match;
  109. struct device_node *np = ofdev->dev.of_node;
  110. struct sdhci_of_data *sdhci_of_data;
  111. struct sdhci_host *host;
  112. struct sdhci_of_host *of_host;
  113. const __be32 *clk;
  114. int size;
  115. int ret;
  116. match = of_match_device(sdhci_of_match, &ofdev->dev);
  117. if (!match)
  118. return -EINVAL;
  119. sdhci_of_data = match->data;
  120. if (!of_device_is_available(np))
  121. return -ENODEV;
  122. host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
  123. if (IS_ERR(host))
  124. return -ENOMEM;
  125. of_host = sdhci_priv(host);
  126. dev_set_drvdata(&ofdev->dev, host);
  127. host->ioaddr = of_iomap(np, 0);
  128. if (!host->ioaddr) {
  129. ret = -ENOMEM;
  130. goto err_addr_map;
  131. }
  132. host->irq = irq_of_parse_and_map(np, 0);
  133. if (!host->irq) {
  134. ret = -EINVAL;
  135. goto err_no_irq;
  136. }
  137. host->hw_name = dev_name(&ofdev->dev);
  138. if (sdhci_of_data) {
  139. host->quirks = sdhci_of_data->quirks;
  140. host->ops = &sdhci_of_data->ops;
  141. }
  142. if (of_get_property(np, "sdhci,auto-cmd12", NULL))
  143. host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
  144. if (of_get_property(np, "sdhci,1-bit-only", NULL))
  145. host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
  146. if (sdhci_of_wp_inverted(np))
  147. host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
  148. clk = of_get_property(np, "clock-frequency", &size);
  149. if (clk && size == sizeof(*clk) && *clk)
  150. of_host->clock = be32_to_cpup(clk);
  151. ret = sdhci_add_host(host);
  152. if (ret)
  153. goto err_add_host;
  154. return 0;
  155. err_add_host:
  156. irq_dispose_mapping(host->irq);
  157. err_no_irq:
  158. iounmap(host->ioaddr);
  159. err_addr_map:
  160. sdhci_free_host(host);
  161. return ret;
  162. }
  163. static int __devexit sdhci_of_remove(struct platform_device *ofdev)
  164. {
  165. struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
  166. sdhci_remove_host(host, 0);
  167. sdhci_free_host(host);
  168. irq_dispose_mapping(host->irq);
  169. iounmap(host->ioaddr);
  170. return 0;
  171. }
  172. static const struct of_device_id sdhci_of_match[] = {
  173. #ifdef CONFIG_MMC_SDHCI_OF_ESDHC
  174. { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
  175. { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
  176. { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
  177. #endif
  178. #ifdef CONFIG_MMC_SDHCI_OF_HLWD
  179. { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
  180. #endif
  181. { .compatible = "generic-sdhci", },
  182. {},
  183. };
  184. MODULE_DEVICE_TABLE(of, sdhci_of_match);
  185. static struct platform_driver sdhci_of_driver = {
  186. .driver = {
  187. .name = "sdhci-of",
  188. .owner = THIS_MODULE,
  189. .of_match_table = sdhci_of_match,
  190. },
  191. .probe = sdhci_of_probe,
  192. .remove = __devexit_p(sdhci_of_remove),
  193. .suspend = sdhci_of_suspend,
  194. .resume = sdhci_of_resume,
  195. };
  196. static int __init sdhci_of_init(void)
  197. {
  198. return platform_driver_register(&sdhci_of_driver);
  199. }
  200. module_init(sdhci_of_init);
  201. static void __exit sdhci_of_exit(void)
  202. {
  203. platform_driver_unregister(&sdhci_of_driver);
  204. }
  205. module_exit(sdhci_of_exit);
  206. MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
  207. MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
  208. "Anton Vorontsov <avorontsov@ru.mvista.com>");
  209. MODULE_LICENSE("GPL");