grumain.c 26 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * DRIVER TABLE MANAGER + GRU CONTEXT LOAD/UNLOAD
  5. *
  6. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/slab.h>
  24. #include <linux/mm.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sched.h>
  27. #include <linux/device.h>
  28. #include <linux/list.h>
  29. #include <linux/err.h>
  30. #include <linux/prefetch.h>
  31. #include <asm/uv/uv_hub.h>
  32. #include "gru.h"
  33. #include "grutables.h"
  34. #include "gruhandles.h"
  35. unsigned long gru_options __read_mostly;
  36. static struct device_driver gru_driver = {
  37. .name = "gru"
  38. };
  39. static struct device gru_device = {
  40. .init_name = "",
  41. .driver = &gru_driver,
  42. };
  43. struct device *grudev = &gru_device;
  44. /*
  45. * Select a gru fault map to be used by the current cpu. Note that
  46. * multiple cpus may be using the same map.
  47. * ZZZ should be inline but did not work on emulator
  48. */
  49. int gru_cpu_fault_map_id(void)
  50. {
  51. #ifdef CONFIG_IA64
  52. return uv_blade_processor_id() % GRU_NUM_TFM;
  53. #else
  54. int cpu = smp_processor_id();
  55. int id, core;
  56. core = uv_cpu_core_number(cpu);
  57. id = core + UV_MAX_INT_CORES * uv_cpu_socket_number(cpu);
  58. return id;
  59. #endif
  60. }
  61. /*--------- ASID Management -------------------------------------------
  62. *
  63. * Initially, assign asids sequentially from MIN_ASID .. MAX_ASID.
  64. * Once MAX is reached, flush the TLB & start over. However,
  65. * some asids may still be in use. There won't be many (percentage wise) still
  66. * in use. Search active contexts & determine the value of the first
  67. * asid in use ("x"s below). Set "limit" to this value.
  68. * This defines a block of assignable asids.
  69. *
  70. * When "limit" is reached, search forward from limit+1 and determine the
  71. * next block of assignable asids.
  72. *
  73. * Repeat until MAX_ASID is reached, then start over again.
  74. *
  75. * Each time MAX_ASID is reached, increment the asid generation. Since
  76. * the search for in-use asids only checks contexts with GRUs currently
  77. * assigned, asids in some contexts will be missed. Prior to loading
  78. * a context, the asid generation of the GTS asid is rechecked. If it
  79. * doesn't match the current generation, a new asid will be assigned.
  80. *
  81. * 0---------------x------------x---------------------x----|
  82. * ^-next ^-limit ^-MAX_ASID
  83. *
  84. * All asid manipulation & context loading/unloading is protected by the
  85. * gs_lock.
  86. */
  87. /* Hit the asid limit. Start over */
  88. static int gru_wrap_asid(struct gru_state *gru)
  89. {
  90. gru_dbg(grudev, "gid %d\n", gru->gs_gid);
  91. STAT(asid_wrap);
  92. gru->gs_asid_gen++;
  93. return MIN_ASID;
  94. }
  95. /* Find the next chunk of unused asids */
  96. static int gru_reset_asid_limit(struct gru_state *gru, int asid)
  97. {
  98. int i, gid, inuse_asid, limit;
  99. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  100. STAT(asid_next);
  101. limit = MAX_ASID;
  102. if (asid >= limit)
  103. asid = gru_wrap_asid(gru);
  104. gru_flush_all_tlb(gru);
  105. gid = gru->gs_gid;
  106. again:
  107. for (i = 0; i < GRU_NUM_CCH; i++) {
  108. if (!gru->gs_gts[i] || is_kernel_context(gru->gs_gts[i]))
  109. continue;
  110. inuse_asid = gru->gs_gts[i]->ts_gms->ms_asids[gid].mt_asid;
  111. gru_dbg(grudev, "gid %d, gts %p, gms %p, inuse 0x%x, cxt %d\n",
  112. gru->gs_gid, gru->gs_gts[i], gru->gs_gts[i]->ts_gms,
  113. inuse_asid, i);
  114. if (inuse_asid == asid) {
  115. asid += ASID_INC;
  116. if (asid >= limit) {
  117. /*
  118. * empty range: reset the range limit and
  119. * start over
  120. */
  121. limit = MAX_ASID;
  122. if (asid >= MAX_ASID)
  123. asid = gru_wrap_asid(gru);
  124. goto again;
  125. }
  126. }
  127. if ((inuse_asid > asid) && (inuse_asid < limit))
  128. limit = inuse_asid;
  129. }
  130. gru->gs_asid_limit = limit;
  131. gru->gs_asid = asid;
  132. gru_dbg(grudev, "gid %d, new asid 0x%x, new_limit 0x%x\n", gru->gs_gid,
  133. asid, limit);
  134. return asid;
  135. }
  136. /* Assign a new ASID to a thread context. */
  137. static int gru_assign_asid(struct gru_state *gru)
  138. {
  139. int asid;
  140. gru->gs_asid += ASID_INC;
  141. asid = gru->gs_asid;
  142. if (asid >= gru->gs_asid_limit)
  143. asid = gru_reset_asid_limit(gru, asid);
  144. gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid);
  145. return asid;
  146. }
  147. /*
  148. * Clear n bits in a word. Return a word indicating the bits that were cleared.
  149. * Optionally, build an array of chars that contain the bit numbers allocated.
  150. */
  151. static unsigned long reserve_resources(unsigned long *p, int n, int mmax,
  152. char *idx)
  153. {
  154. unsigned long bits = 0;
  155. int i;
  156. while (n--) {
  157. i = find_first_bit(p, mmax);
  158. if (i == mmax)
  159. BUG();
  160. __clear_bit(i, p);
  161. __set_bit(i, &bits);
  162. if (idx)
  163. *idx++ = i;
  164. }
  165. return bits;
  166. }
  167. unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,
  168. char *cbmap)
  169. {
  170. return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,
  171. cbmap);
  172. }
  173. unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,
  174. char *dsmap)
  175. {
  176. return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,
  177. dsmap);
  178. }
  179. static void reserve_gru_resources(struct gru_state *gru,
  180. struct gru_thread_state *gts)
  181. {
  182. gru->gs_active_contexts++;
  183. gts->ts_cbr_map =
  184. gru_reserve_cb_resources(gru, gts->ts_cbr_au_count,
  185. gts->ts_cbr_idx);
  186. gts->ts_dsr_map =
  187. gru_reserve_ds_resources(gru, gts->ts_dsr_au_count, NULL);
  188. }
  189. static void free_gru_resources(struct gru_state *gru,
  190. struct gru_thread_state *gts)
  191. {
  192. gru->gs_active_contexts--;
  193. gru->gs_cbr_map |= gts->ts_cbr_map;
  194. gru->gs_dsr_map |= gts->ts_dsr_map;
  195. }
  196. /*
  197. * Check if a GRU has sufficient free resources to satisfy an allocation
  198. * request. Note: GRU locks may or may not be held when this is called. If
  199. * not held, recheck after acquiring the appropriate locks.
  200. *
  201. * Returns 1 if sufficient resources, 0 if not
  202. */
  203. static int check_gru_resources(struct gru_state *gru, int cbr_au_count,
  204. int dsr_au_count, int max_active_contexts)
  205. {
  206. return hweight64(gru->gs_cbr_map) >= cbr_au_count
  207. && hweight64(gru->gs_dsr_map) >= dsr_au_count
  208. && gru->gs_active_contexts < max_active_contexts;
  209. }
  210. /*
  211. * TLB manangment requires tracking all GRU chiplets that have loaded a GSEG
  212. * context.
  213. */
  214. static int gru_load_mm_tracker(struct gru_state *gru,
  215. struct gru_thread_state *gts)
  216. {
  217. struct gru_mm_struct *gms = gts->ts_gms;
  218. struct gru_mm_tracker *asids = &gms->ms_asids[gru->gs_gid];
  219. unsigned short ctxbitmap = (1 << gts->ts_ctxnum);
  220. int asid;
  221. spin_lock(&gms->ms_asid_lock);
  222. asid = asids->mt_asid;
  223. spin_lock(&gru->gs_asid_lock);
  224. if (asid == 0 || (asids->mt_ctxbitmap == 0 && asids->mt_asid_gen !=
  225. gru->gs_asid_gen)) {
  226. asid = gru_assign_asid(gru);
  227. asids->mt_asid = asid;
  228. asids->mt_asid_gen = gru->gs_asid_gen;
  229. STAT(asid_new);
  230. } else {
  231. STAT(asid_reuse);
  232. }
  233. spin_unlock(&gru->gs_asid_lock);
  234. BUG_ON(asids->mt_ctxbitmap & ctxbitmap);
  235. asids->mt_ctxbitmap |= ctxbitmap;
  236. if (!test_bit(gru->gs_gid, gms->ms_asidmap))
  237. __set_bit(gru->gs_gid, gms->ms_asidmap);
  238. spin_unlock(&gms->ms_asid_lock);
  239. gru_dbg(grudev,
  240. "gid %d, gts %p, gms %p, ctxnum %d, asid 0x%x, asidmap 0x%lx\n",
  241. gru->gs_gid, gts, gms, gts->ts_ctxnum, asid,
  242. gms->ms_asidmap[0]);
  243. return asid;
  244. }
  245. static void gru_unload_mm_tracker(struct gru_state *gru,
  246. struct gru_thread_state *gts)
  247. {
  248. struct gru_mm_struct *gms = gts->ts_gms;
  249. struct gru_mm_tracker *asids;
  250. unsigned short ctxbitmap;
  251. asids = &gms->ms_asids[gru->gs_gid];
  252. ctxbitmap = (1 << gts->ts_ctxnum);
  253. spin_lock(&gms->ms_asid_lock);
  254. spin_lock(&gru->gs_asid_lock);
  255. BUG_ON((asids->mt_ctxbitmap & ctxbitmap) != ctxbitmap);
  256. asids->mt_ctxbitmap ^= ctxbitmap;
  257. gru_dbg(grudev, "gid %d, gts %p, gms %p, ctxnum 0x%d, asidmap 0x%lx\n",
  258. gru->gs_gid, gts, gms, gts->ts_ctxnum, gms->ms_asidmap[0]);
  259. spin_unlock(&gru->gs_asid_lock);
  260. spin_unlock(&gms->ms_asid_lock);
  261. }
  262. /*
  263. * Decrement the reference count on a GTS structure. Free the structure
  264. * if the reference count goes to zero.
  265. */
  266. void gts_drop(struct gru_thread_state *gts)
  267. {
  268. if (gts && atomic_dec_return(&gts->ts_refcnt) == 0) {
  269. if (gts->ts_gms)
  270. gru_drop_mmu_notifier(gts->ts_gms);
  271. kfree(gts);
  272. STAT(gts_free);
  273. }
  274. }
  275. /*
  276. * Locate the GTS structure for the current thread.
  277. */
  278. static struct gru_thread_state *gru_find_current_gts_nolock(struct gru_vma_data
  279. *vdata, int tsid)
  280. {
  281. struct gru_thread_state *gts;
  282. list_for_each_entry(gts, &vdata->vd_head, ts_next)
  283. if (gts->ts_tsid == tsid)
  284. return gts;
  285. return NULL;
  286. }
  287. /*
  288. * Allocate a thread state structure.
  289. */
  290. struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
  291. int cbr_au_count, int dsr_au_count,
  292. unsigned char tlb_preload_count, int options, int tsid)
  293. {
  294. struct gru_thread_state *gts;
  295. struct gru_mm_struct *gms;
  296. int bytes;
  297. bytes = DSR_BYTES(dsr_au_count) + CBR_BYTES(cbr_au_count);
  298. bytes += sizeof(struct gru_thread_state);
  299. gts = kmalloc(bytes, GFP_KERNEL);
  300. if (!gts)
  301. return ERR_PTR(-ENOMEM);
  302. STAT(gts_alloc);
  303. memset(gts, 0, sizeof(struct gru_thread_state)); /* zero out header */
  304. atomic_set(&gts->ts_refcnt, 1);
  305. mutex_init(&gts->ts_ctxlock);
  306. gts->ts_cbr_au_count = cbr_au_count;
  307. gts->ts_dsr_au_count = dsr_au_count;
  308. gts->ts_tlb_preload_count = tlb_preload_count;
  309. gts->ts_user_options = options;
  310. gts->ts_user_blade_id = -1;
  311. gts->ts_user_chiplet_id = -1;
  312. gts->ts_tsid = tsid;
  313. gts->ts_ctxnum = NULLCTX;
  314. gts->ts_tlb_int_select = -1;
  315. gts->ts_cch_req_slice = -1;
  316. gts->ts_sizeavail = GRU_SIZEAVAIL(PAGE_SHIFT);
  317. if (vma) {
  318. gts->ts_mm = current->mm;
  319. gts->ts_vma = vma;
  320. gms = gru_register_mmu_notifier();
  321. if (IS_ERR(gms))
  322. goto err;
  323. gts->ts_gms = gms;
  324. }
  325. gru_dbg(grudev, "alloc gts %p\n", gts);
  326. return gts;
  327. err:
  328. gts_drop(gts);
  329. return ERR_CAST(gms);
  330. }
  331. /*
  332. * Allocate a vma private data structure.
  333. */
  334. struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma, int tsid)
  335. {
  336. struct gru_vma_data *vdata = NULL;
  337. vdata = kmalloc(sizeof(*vdata), GFP_KERNEL);
  338. if (!vdata)
  339. return NULL;
  340. STAT(vdata_alloc);
  341. INIT_LIST_HEAD(&vdata->vd_head);
  342. spin_lock_init(&vdata->vd_lock);
  343. gru_dbg(grudev, "alloc vdata %p\n", vdata);
  344. return vdata;
  345. }
  346. /*
  347. * Find the thread state structure for the current thread.
  348. */
  349. struct gru_thread_state *gru_find_thread_state(struct vm_area_struct *vma,
  350. int tsid)
  351. {
  352. struct gru_vma_data *vdata = vma->vm_private_data;
  353. struct gru_thread_state *gts;
  354. spin_lock(&vdata->vd_lock);
  355. gts = gru_find_current_gts_nolock(vdata, tsid);
  356. spin_unlock(&vdata->vd_lock);
  357. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  358. return gts;
  359. }
  360. /*
  361. * Allocate a new thread state for a GSEG. Note that races may allow
  362. * another thread to race to create a gts.
  363. */
  364. struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct *vma,
  365. int tsid)
  366. {
  367. struct gru_vma_data *vdata = vma->vm_private_data;
  368. struct gru_thread_state *gts, *ngts;
  369. gts = gru_alloc_gts(vma, vdata->vd_cbr_au_count,
  370. vdata->vd_dsr_au_count,
  371. vdata->vd_tlb_preload_count,
  372. vdata->vd_user_options, tsid);
  373. if (IS_ERR(gts))
  374. return gts;
  375. spin_lock(&vdata->vd_lock);
  376. ngts = gru_find_current_gts_nolock(vdata, tsid);
  377. if (ngts) {
  378. gts_drop(gts);
  379. gts = ngts;
  380. STAT(gts_double_allocate);
  381. } else {
  382. list_add(&gts->ts_next, &vdata->vd_head);
  383. }
  384. spin_unlock(&vdata->vd_lock);
  385. gru_dbg(grudev, "vma %p, gts %p\n", vma, gts);
  386. return gts;
  387. }
  388. /*
  389. * Free the GRU context assigned to the thread state.
  390. */
  391. static void gru_free_gru_context(struct gru_thread_state *gts)
  392. {
  393. struct gru_state *gru;
  394. gru = gts->ts_gru;
  395. gru_dbg(grudev, "gts %p, gid %d\n", gts, gru->gs_gid);
  396. spin_lock(&gru->gs_lock);
  397. gru->gs_gts[gts->ts_ctxnum] = NULL;
  398. free_gru_resources(gru, gts);
  399. BUG_ON(test_bit(gts->ts_ctxnum, &gru->gs_context_map) == 0);
  400. __clear_bit(gts->ts_ctxnum, &gru->gs_context_map);
  401. gts->ts_ctxnum = NULLCTX;
  402. gts->ts_gru = NULL;
  403. gts->ts_blade = -1;
  404. spin_unlock(&gru->gs_lock);
  405. gts_drop(gts);
  406. STAT(free_context);
  407. }
  408. /*
  409. * Prefetching cachelines help hardware performance.
  410. * (Strictly a performance enhancement. Not functionally required).
  411. */
  412. static void prefetch_data(void *p, int num, int stride)
  413. {
  414. while (num-- > 0) {
  415. prefetchw(p);
  416. p += stride;
  417. }
  418. }
  419. static inline long gru_copy_handle(void *d, void *s)
  420. {
  421. memcpy(d, s, GRU_HANDLE_BYTES);
  422. return GRU_HANDLE_BYTES;
  423. }
  424. static void gru_prefetch_context(void *gseg, void *cb, void *cbe,
  425. unsigned long cbrmap, unsigned long length)
  426. {
  427. int i, scr;
  428. prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES,
  429. GRU_CACHE_LINE_BYTES);
  430. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  431. prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES);
  432. prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1,
  433. GRU_CACHE_LINE_BYTES);
  434. cb += GRU_HANDLE_STRIDE;
  435. }
  436. }
  437. static void gru_load_context_data(void *save, void *grubase, int ctxnum,
  438. unsigned long cbrmap, unsigned long dsrmap,
  439. int data_valid)
  440. {
  441. void *gseg, *cb, *cbe;
  442. unsigned long length;
  443. int i, scr;
  444. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  445. cb = gseg + GRU_CB_BASE;
  446. cbe = grubase + GRU_CBE_BASE;
  447. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  448. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  449. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  450. if (data_valid) {
  451. save += gru_copy_handle(cb, save);
  452. save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE,
  453. save);
  454. } else {
  455. memset(cb, 0, GRU_CACHE_LINE_BYTES);
  456. memset(cbe + i * GRU_HANDLE_STRIDE, 0,
  457. GRU_CACHE_LINE_BYTES);
  458. }
  459. /* Flush CBE to hide race in context restart */
  460. mb();
  461. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  462. cb += GRU_HANDLE_STRIDE;
  463. }
  464. if (data_valid)
  465. memcpy(gseg + GRU_DS_BASE, save, length);
  466. else
  467. memset(gseg + GRU_DS_BASE, 0, length);
  468. }
  469. static void gru_unload_context_data(void *save, void *grubase, int ctxnum,
  470. unsigned long cbrmap, unsigned long dsrmap)
  471. {
  472. void *gseg, *cb, *cbe;
  473. unsigned long length;
  474. int i, scr;
  475. gseg = grubase + ctxnum * GRU_GSEG_STRIDE;
  476. cb = gseg + GRU_CB_BASE;
  477. cbe = grubase + GRU_CBE_BASE;
  478. length = hweight64(dsrmap) * GRU_DSR_AU_BYTES;
  479. /* CBEs may not be coherent. Flush them from cache */
  480. for_each_cbr_in_allocation_map(i, &cbrmap, scr)
  481. gru_flush_cache(cbe + i * GRU_HANDLE_STRIDE);
  482. mb(); /* Let the CL flush complete */
  483. gru_prefetch_context(gseg, cb, cbe, cbrmap, length);
  484. for_each_cbr_in_allocation_map(i, &cbrmap, scr) {
  485. save += gru_copy_handle(save, cb);
  486. save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE);
  487. cb += GRU_HANDLE_STRIDE;
  488. }
  489. memcpy(save, gseg + GRU_DS_BASE, length);
  490. }
  491. void gru_unload_context(struct gru_thread_state *gts, int savestate)
  492. {
  493. struct gru_state *gru = gts->ts_gru;
  494. struct gru_context_configuration_handle *cch;
  495. int ctxnum = gts->ts_ctxnum;
  496. if (!is_kernel_context(gts))
  497. zap_vma_ptes(gts->ts_vma, UGRUADDR(gts), GRU_GSEG_PAGESIZE);
  498. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  499. gru_dbg(grudev, "gts %p, cbrmap 0x%lx, dsrmap 0x%lx\n",
  500. gts, gts->ts_cbr_map, gts->ts_dsr_map);
  501. lock_cch_handle(cch);
  502. if (cch_interrupt_sync(cch))
  503. BUG();
  504. if (!is_kernel_context(gts))
  505. gru_unload_mm_tracker(gru, gts);
  506. if (savestate) {
  507. gru_unload_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr,
  508. ctxnum, gts->ts_cbr_map,
  509. gts->ts_dsr_map);
  510. gts->ts_data_valid = 1;
  511. }
  512. if (cch_deallocate(cch))
  513. BUG();
  514. unlock_cch_handle(cch);
  515. gru_free_gru_context(gts);
  516. }
  517. /*
  518. * Load a GRU context by copying it from the thread data structure in memory
  519. * to the GRU.
  520. */
  521. void gru_load_context(struct gru_thread_state *gts)
  522. {
  523. struct gru_state *gru = gts->ts_gru;
  524. struct gru_context_configuration_handle *cch;
  525. int i, err, asid, ctxnum = gts->ts_ctxnum;
  526. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  527. lock_cch_handle(cch);
  528. cch->tfm_fault_bit_enable =
  529. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  530. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  531. cch->tlb_int_enable = (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  532. if (cch->tlb_int_enable) {
  533. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  534. cch->tlb_int_select = gts->ts_tlb_int_select;
  535. }
  536. if (gts->ts_cch_req_slice >= 0) {
  537. cch->req_slice_set_enable = 1;
  538. cch->req_slice = gts->ts_cch_req_slice;
  539. } else {
  540. cch->req_slice_set_enable =0;
  541. }
  542. cch->tfm_done_bit_enable = 0;
  543. cch->dsr_allocation_map = gts->ts_dsr_map;
  544. cch->cbr_allocation_map = gts->ts_cbr_map;
  545. if (is_kernel_context(gts)) {
  546. cch->unmap_enable = 1;
  547. cch->tfm_done_bit_enable = 1;
  548. cch->cb_int_enable = 1;
  549. cch->tlb_int_select = 0; /* For now, ints go to cpu 0 */
  550. } else {
  551. cch->unmap_enable = 0;
  552. cch->tfm_done_bit_enable = 0;
  553. cch->cb_int_enable = 0;
  554. asid = gru_load_mm_tracker(gru, gts);
  555. for (i = 0; i < 8; i++) {
  556. cch->asid[i] = asid + i;
  557. cch->sizeavail[i] = gts->ts_sizeavail;
  558. }
  559. }
  560. err = cch_allocate(cch);
  561. if (err) {
  562. gru_dbg(grudev,
  563. "err %d: cch %p, gts %p, cbr 0x%lx, dsr 0x%lx\n",
  564. err, cch, gts, gts->ts_cbr_map, gts->ts_dsr_map);
  565. BUG();
  566. }
  567. gru_load_context_data(gts->ts_gdata, gru->gs_gru_base_vaddr, ctxnum,
  568. gts->ts_cbr_map, gts->ts_dsr_map, gts->ts_data_valid);
  569. if (cch_start(cch))
  570. BUG();
  571. unlock_cch_handle(cch);
  572. gru_dbg(grudev, "gid %d, gts %p, cbrmap 0x%lx, dsrmap 0x%lx, tie %d, tis %d\n",
  573. gts->ts_gru->gs_gid, gts, gts->ts_cbr_map, gts->ts_dsr_map,
  574. (gts->ts_user_options == GRU_OPT_MISS_FMM_INTR), gts->ts_tlb_int_select);
  575. }
  576. /*
  577. * Update fields in an active CCH:
  578. * - retarget interrupts on local blade
  579. * - update sizeavail mask
  580. */
  581. int gru_update_cch(struct gru_thread_state *gts)
  582. {
  583. struct gru_context_configuration_handle *cch;
  584. struct gru_state *gru = gts->ts_gru;
  585. int i, ctxnum = gts->ts_ctxnum, ret = 0;
  586. cch = get_cch(gru->gs_gru_base_vaddr, ctxnum);
  587. lock_cch_handle(cch);
  588. if (cch->state == CCHSTATE_ACTIVE) {
  589. if (gru->gs_gts[gts->ts_ctxnum] != gts)
  590. goto exit;
  591. if (cch_interrupt(cch))
  592. BUG();
  593. for (i = 0; i < 8; i++)
  594. cch->sizeavail[i] = gts->ts_sizeavail;
  595. gts->ts_tlb_int_select = gru_cpu_fault_map_id();
  596. cch->tlb_int_select = gru_cpu_fault_map_id();
  597. cch->tfm_fault_bit_enable =
  598. (gts->ts_user_options == GRU_OPT_MISS_FMM_POLL
  599. || gts->ts_user_options == GRU_OPT_MISS_FMM_INTR);
  600. if (cch_start(cch))
  601. BUG();
  602. ret = 1;
  603. }
  604. exit:
  605. unlock_cch_handle(cch);
  606. return ret;
  607. }
  608. /*
  609. * Update CCH tlb interrupt select. Required when all the following is true:
  610. * - task's GRU context is loaded into a GRU
  611. * - task is using interrupt notification for TLB faults
  612. * - task has migrated to a different cpu on the same blade where
  613. * it was previously running.
  614. */
  615. static int gru_retarget_intr(struct gru_thread_state *gts)
  616. {
  617. if (gts->ts_tlb_int_select < 0
  618. || gts->ts_tlb_int_select == gru_cpu_fault_map_id())
  619. return 0;
  620. gru_dbg(grudev, "retarget from %d to %d\n", gts->ts_tlb_int_select,
  621. gru_cpu_fault_map_id());
  622. return gru_update_cch(gts);
  623. }
  624. /*
  625. * Check if a GRU context is allowed to use a specific chiplet. By default
  626. * a context is assigned to any blade-local chiplet. However, users can
  627. * override this.
  628. * Returns 1 if assignment allowed, 0 otherwise
  629. */
  630. static int gru_check_chiplet_assignment(struct gru_state *gru,
  631. struct gru_thread_state *gts)
  632. {
  633. int blade_id;
  634. int chiplet_id;
  635. blade_id = gts->ts_user_blade_id;
  636. if (blade_id < 0)
  637. blade_id = uv_numa_blade_id();
  638. chiplet_id = gts->ts_user_chiplet_id;
  639. return gru->gs_blade_id == blade_id &&
  640. (chiplet_id < 0 || chiplet_id == gru->gs_chiplet_id);
  641. }
  642. /*
  643. * Unload the gru context if it is not assigned to the correct blade or
  644. * chiplet. Misassignment can occur if the process migrates to a different
  645. * blade or if the user changes the selected blade/chiplet.
  646. */
  647. void gru_check_context_placement(struct gru_thread_state *gts)
  648. {
  649. struct gru_state *gru;
  650. /*
  651. * If the current task is the context owner, verify that the
  652. * context is correctly placed. This test is skipped for non-owner
  653. * references. Pthread apps use non-owner references to the CBRs.
  654. */
  655. gru = gts->ts_gru;
  656. if (!gru || gts->ts_tgid_owner != current->tgid)
  657. return;
  658. if (!gru_check_chiplet_assignment(gru, gts)) {
  659. STAT(check_context_unload);
  660. gru_unload_context(gts, 1);
  661. } else if (gru_retarget_intr(gts)) {
  662. STAT(check_context_retarget_intr);
  663. }
  664. }
  665. /*
  666. * Insufficient GRU resources available on the local blade. Steal a context from
  667. * a process. This is a hack until a _real_ resource scheduler is written....
  668. */
  669. #define next_ctxnum(n) ((n) < GRU_NUM_CCH - 2 ? (n) + 1 : 0)
  670. #define next_gru(b, g) (((g) < &(b)->bs_grus[GRU_CHIPLETS_PER_BLADE - 1]) ? \
  671. ((g)+1) : &(b)->bs_grus[0])
  672. static int is_gts_stealable(struct gru_thread_state *gts,
  673. struct gru_blade_state *bs)
  674. {
  675. if (is_kernel_context(gts))
  676. return down_write_trylock(&bs->bs_kgts_sema);
  677. else
  678. return mutex_trylock(&gts->ts_ctxlock);
  679. }
  680. static void gts_stolen(struct gru_thread_state *gts,
  681. struct gru_blade_state *bs)
  682. {
  683. if (is_kernel_context(gts)) {
  684. up_write(&bs->bs_kgts_sema);
  685. STAT(steal_kernel_context);
  686. } else {
  687. mutex_unlock(&gts->ts_ctxlock);
  688. STAT(steal_user_context);
  689. }
  690. }
  691. void gru_steal_context(struct gru_thread_state *gts)
  692. {
  693. struct gru_blade_state *blade;
  694. struct gru_state *gru, *gru0;
  695. struct gru_thread_state *ngts = NULL;
  696. int ctxnum, ctxnum0, flag = 0, cbr, dsr;
  697. int blade_id;
  698. blade_id = gts->ts_user_blade_id;
  699. if (blade_id < 0)
  700. blade_id = uv_numa_blade_id();
  701. cbr = gts->ts_cbr_au_count;
  702. dsr = gts->ts_dsr_au_count;
  703. blade = gru_base[blade_id];
  704. spin_lock(&blade->bs_lock);
  705. ctxnum = next_ctxnum(blade->bs_lru_ctxnum);
  706. gru = blade->bs_lru_gru;
  707. if (ctxnum == 0)
  708. gru = next_gru(blade, gru);
  709. blade->bs_lru_gru = gru;
  710. blade->bs_lru_ctxnum = ctxnum;
  711. ctxnum0 = ctxnum;
  712. gru0 = gru;
  713. while (1) {
  714. if (gru_check_chiplet_assignment(gru, gts)) {
  715. if (check_gru_resources(gru, cbr, dsr, GRU_NUM_CCH))
  716. break;
  717. spin_lock(&gru->gs_lock);
  718. for (; ctxnum < GRU_NUM_CCH; ctxnum++) {
  719. if (flag && gru == gru0 && ctxnum == ctxnum0)
  720. break;
  721. ngts = gru->gs_gts[ctxnum];
  722. /*
  723. * We are grabbing locks out of order, so trylock is
  724. * needed. GTSs are usually not locked, so the odds of
  725. * success are high. If trylock fails, try to steal a
  726. * different GSEG.
  727. */
  728. if (ngts && is_gts_stealable(ngts, blade))
  729. break;
  730. ngts = NULL;
  731. }
  732. spin_unlock(&gru->gs_lock);
  733. if (ngts || (flag && gru == gru0 && ctxnum == ctxnum0))
  734. break;
  735. }
  736. if (flag && gru == gru0)
  737. break;
  738. flag = 1;
  739. ctxnum = 0;
  740. gru = next_gru(blade, gru);
  741. }
  742. spin_unlock(&blade->bs_lock);
  743. if (ngts) {
  744. gts->ustats.context_stolen++;
  745. ngts->ts_steal_jiffies = jiffies;
  746. gru_unload_context(ngts, is_kernel_context(ngts) ? 0 : 1);
  747. gts_stolen(ngts, blade);
  748. } else {
  749. STAT(steal_context_failed);
  750. }
  751. gru_dbg(grudev,
  752. "stole gid %d, ctxnum %d from gts %p. Need cb %d, ds %d;"
  753. " avail cb %ld, ds %ld\n",
  754. gru->gs_gid, ctxnum, ngts, cbr, dsr, hweight64(gru->gs_cbr_map),
  755. hweight64(gru->gs_dsr_map));
  756. }
  757. /*
  758. * Assign a gru context.
  759. */
  760. static int gru_assign_context_number(struct gru_state *gru)
  761. {
  762. int ctxnum;
  763. ctxnum = find_first_zero_bit(&gru->gs_context_map, GRU_NUM_CCH);
  764. __set_bit(ctxnum, &gru->gs_context_map);
  765. return ctxnum;
  766. }
  767. /*
  768. * Scan the GRUs on the local blade & assign a GRU context.
  769. */
  770. struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts)
  771. {
  772. struct gru_state *gru, *grux;
  773. int i, max_active_contexts;
  774. int blade_id = gts->ts_user_blade_id;
  775. if (blade_id < 0)
  776. blade_id = uv_numa_blade_id();
  777. again:
  778. gru = NULL;
  779. max_active_contexts = GRU_NUM_CCH;
  780. for_each_gru_on_blade(grux, blade_id, i) {
  781. if (!gru_check_chiplet_assignment(grux, gts))
  782. continue;
  783. if (check_gru_resources(grux, gts->ts_cbr_au_count,
  784. gts->ts_dsr_au_count,
  785. max_active_contexts)) {
  786. gru = grux;
  787. max_active_contexts = grux->gs_active_contexts;
  788. if (max_active_contexts == 0)
  789. break;
  790. }
  791. }
  792. if (gru) {
  793. spin_lock(&gru->gs_lock);
  794. if (!check_gru_resources(gru, gts->ts_cbr_au_count,
  795. gts->ts_dsr_au_count, GRU_NUM_CCH)) {
  796. spin_unlock(&gru->gs_lock);
  797. goto again;
  798. }
  799. reserve_gru_resources(gru, gts);
  800. gts->ts_gru = gru;
  801. gts->ts_blade = gru->gs_blade_id;
  802. gts->ts_ctxnum = gru_assign_context_number(gru);
  803. atomic_inc(&gts->ts_refcnt);
  804. gru->gs_gts[gts->ts_ctxnum] = gts;
  805. spin_unlock(&gru->gs_lock);
  806. STAT(assign_context);
  807. gru_dbg(grudev,
  808. "gseg %p, gts %p, gid %d, ctx %d, cbr %d, dsr %d\n",
  809. gseg_virtual_address(gts->ts_gru, gts->ts_ctxnum), gts,
  810. gts->ts_gru->gs_gid, gts->ts_ctxnum,
  811. gts->ts_cbr_au_count, gts->ts_dsr_au_count);
  812. } else {
  813. gru_dbg(grudev, "failed to allocate a GTS %s\n", "");
  814. STAT(assign_context_failed);
  815. }
  816. return gru;
  817. }
  818. /*
  819. * gru_nopage
  820. *
  821. * Map the user's GRU segment
  822. *
  823. * Note: gru segments alway mmaped on GRU_GSEG_PAGESIZE boundaries.
  824. */
  825. int gru_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
  826. {
  827. struct gru_thread_state *gts;
  828. unsigned long paddr, vaddr;
  829. vaddr = (unsigned long)vmf->virtual_address;
  830. gru_dbg(grudev, "vma %p, vaddr 0x%lx (0x%lx)\n",
  831. vma, vaddr, GSEG_BASE(vaddr));
  832. STAT(nopfn);
  833. /* The following check ensures vaddr is a valid address in the VMA */
  834. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  835. if (!gts)
  836. return VM_FAULT_SIGBUS;
  837. again:
  838. mutex_lock(&gts->ts_ctxlock);
  839. preempt_disable();
  840. gru_check_context_placement(gts);
  841. if (!gts->ts_gru) {
  842. STAT(load_user_context);
  843. if (!gru_assign_gru_context(gts)) {
  844. preempt_enable();
  845. mutex_unlock(&gts->ts_ctxlock);
  846. set_current_state(TASK_INTERRUPTIBLE);
  847. schedule_timeout(GRU_ASSIGN_DELAY); /* true hack ZZZ */
  848. if (gts->ts_steal_jiffies + GRU_STEAL_DELAY < jiffies)
  849. gru_steal_context(gts);
  850. goto again;
  851. }
  852. gru_load_context(gts);
  853. paddr = gseg_physical_address(gts->ts_gru, gts->ts_ctxnum);
  854. remap_pfn_range(vma, vaddr & ~(GRU_GSEG_PAGESIZE - 1),
  855. paddr >> PAGE_SHIFT, GRU_GSEG_PAGESIZE,
  856. vma->vm_page_prot);
  857. }
  858. preempt_enable();
  859. mutex_unlock(&gts->ts_ctxlock);
  860. return VM_FAULT_NOPAGE;
  861. }