core.c 21 KB

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  1. /*
  2. * Silicon Labs C2 port core Linux support
  3. *
  4. * Copyright (c) 2007 Rodolfo Giometti <giometti@linux.it>
  5. * Copyright (c) 2007 Eurotech S.p.A. <info@eurotech.it>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/err.h>
  16. #include <linux/kernel.h>
  17. #include <linux/kmemcheck.h>
  18. #include <linux/ctype.h>
  19. #include <linux/delay.h>
  20. #include <linux/idr.h>
  21. #include <linux/sched.h>
  22. #include <linux/slab.h>
  23. #include <linux/c2port.h>
  24. #define DRIVER_NAME "c2port"
  25. #define DRIVER_VERSION "0.51.0"
  26. static DEFINE_SPINLOCK(c2port_idr_lock);
  27. static DEFINE_IDR(c2port_idr);
  28. /*
  29. * Local variables
  30. */
  31. static struct class *c2port_class;
  32. /*
  33. * C2 registers & commands defines
  34. */
  35. /* C2 registers */
  36. #define C2PORT_DEVICEID 0x00
  37. #define C2PORT_REVID 0x01
  38. #define C2PORT_FPCTL 0x02
  39. #define C2PORT_FPDAT 0xB4
  40. /* C2 interface commands */
  41. #define C2PORT_GET_VERSION 0x01
  42. #define C2PORT_DEVICE_ERASE 0x03
  43. #define C2PORT_BLOCK_READ 0x06
  44. #define C2PORT_BLOCK_WRITE 0x07
  45. #define C2PORT_PAGE_ERASE 0x08
  46. /* C2 status return codes */
  47. #define C2PORT_INVALID_COMMAND 0x00
  48. #define C2PORT_COMMAND_FAILED 0x02
  49. #define C2PORT_COMMAND_OK 0x0d
  50. /*
  51. * C2 port low level signal managements
  52. */
  53. static void c2port_reset(struct c2port_device *dev)
  54. {
  55. struct c2port_ops *ops = dev->ops;
  56. /* To reset the device we have to keep clock line low for at least
  57. * 20us.
  58. */
  59. local_irq_disable();
  60. ops->c2ck_set(dev, 0);
  61. udelay(25);
  62. ops->c2ck_set(dev, 1);
  63. local_irq_enable();
  64. udelay(1);
  65. }
  66. static void c2port_strobe_ck(struct c2port_device *dev)
  67. {
  68. struct c2port_ops *ops = dev->ops;
  69. /* During hi-low-hi transition we disable local IRQs to avoid
  70. * interructions since C2 port specification says that it must be
  71. * shorter than 5us, otherwise the microcontroller may consider
  72. * it as a reset signal!
  73. */
  74. local_irq_disable();
  75. ops->c2ck_set(dev, 0);
  76. udelay(1);
  77. ops->c2ck_set(dev, 1);
  78. local_irq_enable();
  79. udelay(1);
  80. }
  81. /*
  82. * C2 port basic functions
  83. */
  84. static void c2port_write_ar(struct c2port_device *dev, u8 addr)
  85. {
  86. struct c2port_ops *ops = dev->ops;
  87. int i;
  88. /* START field */
  89. c2port_strobe_ck(dev);
  90. /* INS field (11b, LSB first) */
  91. ops->c2d_dir(dev, 0);
  92. ops->c2d_set(dev, 1);
  93. c2port_strobe_ck(dev);
  94. ops->c2d_set(dev, 1);
  95. c2port_strobe_ck(dev);
  96. /* ADDRESS field */
  97. for (i = 0; i < 8; i++) {
  98. ops->c2d_set(dev, addr & 0x01);
  99. c2port_strobe_ck(dev);
  100. addr >>= 1;
  101. }
  102. /* STOP field */
  103. ops->c2d_dir(dev, 1);
  104. c2port_strobe_ck(dev);
  105. }
  106. static int c2port_read_ar(struct c2port_device *dev, u8 *addr)
  107. {
  108. struct c2port_ops *ops = dev->ops;
  109. int i;
  110. /* START field */
  111. c2port_strobe_ck(dev);
  112. /* INS field (10b, LSB first) */
  113. ops->c2d_dir(dev, 0);
  114. ops->c2d_set(dev, 0);
  115. c2port_strobe_ck(dev);
  116. ops->c2d_set(dev, 1);
  117. c2port_strobe_ck(dev);
  118. /* ADDRESS field */
  119. ops->c2d_dir(dev, 1);
  120. *addr = 0;
  121. for (i = 0; i < 8; i++) {
  122. *addr >>= 1; /* shift in 8-bit ADDRESS field LSB first */
  123. c2port_strobe_ck(dev);
  124. if (ops->c2d_get(dev))
  125. *addr |= 0x80;
  126. }
  127. /* STOP field */
  128. c2port_strobe_ck(dev);
  129. return 0;
  130. }
  131. static int c2port_write_dr(struct c2port_device *dev, u8 data)
  132. {
  133. struct c2port_ops *ops = dev->ops;
  134. int timeout, i;
  135. /* START field */
  136. c2port_strobe_ck(dev);
  137. /* INS field (01b, LSB first) */
  138. ops->c2d_dir(dev, 0);
  139. ops->c2d_set(dev, 1);
  140. c2port_strobe_ck(dev);
  141. ops->c2d_set(dev, 0);
  142. c2port_strobe_ck(dev);
  143. /* LENGTH field (00b, LSB first -> 1 byte) */
  144. ops->c2d_set(dev, 0);
  145. c2port_strobe_ck(dev);
  146. ops->c2d_set(dev, 0);
  147. c2port_strobe_ck(dev);
  148. /* DATA field */
  149. for (i = 0; i < 8; i++) {
  150. ops->c2d_set(dev, data & 0x01);
  151. c2port_strobe_ck(dev);
  152. data >>= 1;
  153. }
  154. /* WAIT field */
  155. ops->c2d_dir(dev, 1);
  156. timeout = 20;
  157. do {
  158. c2port_strobe_ck(dev);
  159. if (ops->c2d_get(dev))
  160. break;
  161. udelay(1);
  162. } while (--timeout > 0);
  163. if (timeout == 0)
  164. return -EIO;
  165. /* STOP field */
  166. c2port_strobe_ck(dev);
  167. return 0;
  168. }
  169. static int c2port_read_dr(struct c2port_device *dev, u8 *data)
  170. {
  171. struct c2port_ops *ops = dev->ops;
  172. int timeout, i;
  173. /* START field */
  174. c2port_strobe_ck(dev);
  175. /* INS field (00b, LSB first) */
  176. ops->c2d_dir(dev, 0);
  177. ops->c2d_set(dev, 0);
  178. c2port_strobe_ck(dev);
  179. ops->c2d_set(dev, 0);
  180. c2port_strobe_ck(dev);
  181. /* LENGTH field (00b, LSB first -> 1 byte) */
  182. ops->c2d_set(dev, 0);
  183. c2port_strobe_ck(dev);
  184. ops->c2d_set(dev, 0);
  185. c2port_strobe_ck(dev);
  186. /* WAIT field */
  187. ops->c2d_dir(dev, 1);
  188. timeout = 20;
  189. do {
  190. c2port_strobe_ck(dev);
  191. if (ops->c2d_get(dev))
  192. break;
  193. udelay(1);
  194. } while (--timeout > 0);
  195. if (timeout == 0)
  196. return -EIO;
  197. /* DATA field */
  198. *data = 0;
  199. for (i = 0; i < 8; i++) {
  200. *data >>= 1; /* shift in 8-bit DATA field LSB first */
  201. c2port_strobe_ck(dev);
  202. if (ops->c2d_get(dev))
  203. *data |= 0x80;
  204. }
  205. /* STOP field */
  206. c2port_strobe_ck(dev);
  207. return 0;
  208. }
  209. static int c2port_poll_in_busy(struct c2port_device *dev)
  210. {
  211. u8 addr;
  212. int ret, timeout = 20;
  213. do {
  214. ret = (c2port_read_ar(dev, &addr));
  215. if (ret < 0)
  216. return -EIO;
  217. if (!(addr & 0x02))
  218. break;
  219. udelay(1);
  220. } while (--timeout > 0);
  221. if (timeout == 0)
  222. return -EIO;
  223. return 0;
  224. }
  225. static int c2port_poll_out_ready(struct c2port_device *dev)
  226. {
  227. u8 addr;
  228. int ret, timeout = 10000; /* erase flash needs long time... */
  229. do {
  230. ret = (c2port_read_ar(dev, &addr));
  231. if (ret < 0)
  232. return -EIO;
  233. if (addr & 0x01)
  234. break;
  235. udelay(1);
  236. } while (--timeout > 0);
  237. if (timeout == 0)
  238. return -EIO;
  239. return 0;
  240. }
  241. /*
  242. * sysfs methods
  243. */
  244. static ssize_t c2port_show_name(struct device *dev,
  245. struct device_attribute *attr, char *buf)
  246. {
  247. struct c2port_device *c2dev = dev_get_drvdata(dev);
  248. return sprintf(buf, "%s\n", c2dev->name);
  249. }
  250. static ssize_t c2port_show_flash_blocks_num(struct device *dev,
  251. struct device_attribute *attr, char *buf)
  252. {
  253. struct c2port_device *c2dev = dev_get_drvdata(dev);
  254. struct c2port_ops *ops = c2dev->ops;
  255. return sprintf(buf, "%d\n", ops->blocks_num);
  256. }
  257. static ssize_t c2port_show_flash_block_size(struct device *dev,
  258. struct device_attribute *attr, char *buf)
  259. {
  260. struct c2port_device *c2dev = dev_get_drvdata(dev);
  261. struct c2port_ops *ops = c2dev->ops;
  262. return sprintf(buf, "%d\n", ops->block_size);
  263. }
  264. static ssize_t c2port_show_flash_size(struct device *dev,
  265. struct device_attribute *attr, char *buf)
  266. {
  267. struct c2port_device *c2dev = dev_get_drvdata(dev);
  268. struct c2port_ops *ops = c2dev->ops;
  269. return sprintf(buf, "%d\n", ops->blocks_num * ops->block_size);
  270. }
  271. static ssize_t c2port_show_access(struct device *dev,
  272. struct device_attribute *attr, char *buf)
  273. {
  274. struct c2port_device *c2dev = dev_get_drvdata(dev);
  275. return sprintf(buf, "%d\n", c2dev->access);
  276. }
  277. static ssize_t c2port_store_access(struct device *dev,
  278. struct device_attribute *attr,
  279. const char *buf, size_t count)
  280. {
  281. struct c2port_device *c2dev = dev_get_drvdata(dev);
  282. struct c2port_ops *ops = c2dev->ops;
  283. int status, ret;
  284. ret = sscanf(buf, "%d", &status);
  285. if (ret != 1)
  286. return -EINVAL;
  287. mutex_lock(&c2dev->mutex);
  288. c2dev->access = !!status;
  289. /* If access is "on" clock should be HIGH _before_ setting the line
  290. * as output and data line should be set as INPUT anyway */
  291. if (c2dev->access)
  292. ops->c2ck_set(c2dev, 1);
  293. ops->access(c2dev, c2dev->access);
  294. if (c2dev->access)
  295. ops->c2d_dir(c2dev, 1);
  296. mutex_unlock(&c2dev->mutex);
  297. return count;
  298. }
  299. static ssize_t c2port_store_reset(struct device *dev,
  300. struct device_attribute *attr,
  301. const char *buf, size_t count)
  302. {
  303. struct c2port_device *c2dev = dev_get_drvdata(dev);
  304. /* Check the device access status */
  305. if (!c2dev->access)
  306. return -EBUSY;
  307. mutex_lock(&c2dev->mutex);
  308. c2port_reset(c2dev);
  309. c2dev->flash_access = 0;
  310. mutex_unlock(&c2dev->mutex);
  311. return count;
  312. }
  313. static ssize_t __c2port_show_dev_id(struct c2port_device *dev, char *buf)
  314. {
  315. u8 data;
  316. int ret;
  317. /* Select DEVICEID register for C2 data register accesses */
  318. c2port_write_ar(dev, C2PORT_DEVICEID);
  319. /* Read and return the device ID register */
  320. ret = c2port_read_dr(dev, &data);
  321. if (ret < 0)
  322. return ret;
  323. return sprintf(buf, "%d\n", data);
  324. }
  325. static ssize_t c2port_show_dev_id(struct device *dev,
  326. struct device_attribute *attr, char *buf)
  327. {
  328. struct c2port_device *c2dev = dev_get_drvdata(dev);
  329. ssize_t ret;
  330. /* Check the device access status */
  331. if (!c2dev->access)
  332. return -EBUSY;
  333. mutex_lock(&c2dev->mutex);
  334. ret = __c2port_show_dev_id(c2dev, buf);
  335. mutex_unlock(&c2dev->mutex);
  336. if (ret < 0)
  337. dev_err(dev, "cannot read from %s\n", c2dev->name);
  338. return ret;
  339. }
  340. static ssize_t __c2port_show_rev_id(struct c2port_device *dev, char *buf)
  341. {
  342. u8 data;
  343. int ret;
  344. /* Select REVID register for C2 data register accesses */
  345. c2port_write_ar(dev, C2PORT_REVID);
  346. /* Read and return the revision ID register */
  347. ret = c2port_read_dr(dev, &data);
  348. if (ret < 0)
  349. return ret;
  350. return sprintf(buf, "%d\n", data);
  351. }
  352. static ssize_t c2port_show_rev_id(struct device *dev,
  353. struct device_attribute *attr, char *buf)
  354. {
  355. struct c2port_device *c2dev = dev_get_drvdata(dev);
  356. ssize_t ret;
  357. /* Check the device access status */
  358. if (!c2dev->access)
  359. return -EBUSY;
  360. mutex_lock(&c2dev->mutex);
  361. ret = __c2port_show_rev_id(c2dev, buf);
  362. mutex_unlock(&c2dev->mutex);
  363. if (ret < 0)
  364. dev_err(c2dev->dev, "cannot read from %s\n", c2dev->name);
  365. return ret;
  366. }
  367. static ssize_t c2port_show_flash_access(struct device *dev,
  368. struct device_attribute *attr, char *buf)
  369. {
  370. struct c2port_device *c2dev = dev_get_drvdata(dev);
  371. return sprintf(buf, "%d\n", c2dev->flash_access);
  372. }
  373. static ssize_t __c2port_store_flash_access(struct c2port_device *dev,
  374. int status)
  375. {
  376. int ret;
  377. /* Check the device access status */
  378. if (!dev->access)
  379. return -EBUSY;
  380. dev->flash_access = !!status;
  381. /* If flash_access is off we have nothing to do... */
  382. if (dev->flash_access == 0)
  383. return 0;
  384. /* Target the C2 flash programming control register for C2 data
  385. * register access */
  386. c2port_write_ar(dev, C2PORT_FPCTL);
  387. /* Write the first keycode to enable C2 Flash programming */
  388. ret = c2port_write_dr(dev, 0x02);
  389. if (ret < 0)
  390. return ret;
  391. /* Write the second keycode to enable C2 Flash programming */
  392. ret = c2port_write_dr(dev, 0x01);
  393. if (ret < 0)
  394. return ret;
  395. /* Delay for at least 20ms to ensure the target is ready for
  396. * C2 flash programming */
  397. mdelay(25);
  398. return 0;
  399. }
  400. static ssize_t c2port_store_flash_access(struct device *dev,
  401. struct device_attribute *attr,
  402. const char *buf, size_t count)
  403. {
  404. struct c2port_device *c2dev = dev_get_drvdata(dev);
  405. int status;
  406. ssize_t ret;
  407. ret = sscanf(buf, "%d", &status);
  408. if (ret != 1)
  409. return -EINVAL;
  410. mutex_lock(&c2dev->mutex);
  411. ret = __c2port_store_flash_access(c2dev, status);
  412. mutex_unlock(&c2dev->mutex);
  413. if (ret < 0) {
  414. dev_err(c2dev->dev, "cannot enable %s flash programming\n",
  415. c2dev->name);
  416. return ret;
  417. }
  418. return count;
  419. }
  420. static ssize_t __c2port_write_flash_erase(struct c2port_device *dev)
  421. {
  422. u8 status;
  423. int ret;
  424. /* Target the C2 flash programming data register for C2 data register
  425. * access.
  426. */
  427. c2port_write_ar(dev, C2PORT_FPDAT);
  428. /* Send device erase command */
  429. c2port_write_dr(dev, C2PORT_DEVICE_ERASE);
  430. /* Wait for input acknowledge */
  431. ret = c2port_poll_in_busy(dev);
  432. if (ret < 0)
  433. return ret;
  434. /* Should check status before starting FLASH access sequence */
  435. /* Wait for status information */
  436. ret = c2port_poll_out_ready(dev);
  437. if (ret < 0)
  438. return ret;
  439. /* Read flash programming interface status */
  440. ret = c2port_read_dr(dev, &status);
  441. if (ret < 0)
  442. return ret;
  443. if (status != C2PORT_COMMAND_OK)
  444. return -EBUSY;
  445. /* Send a three-byte arming sequence to enable the device erase.
  446. * If the sequence is not received correctly, the command will be
  447. * ignored.
  448. * Sequence is: 0xde, 0xad, 0xa5.
  449. */
  450. c2port_write_dr(dev, 0xde);
  451. ret = c2port_poll_in_busy(dev);
  452. if (ret < 0)
  453. return ret;
  454. c2port_write_dr(dev, 0xad);
  455. ret = c2port_poll_in_busy(dev);
  456. if (ret < 0)
  457. return ret;
  458. c2port_write_dr(dev, 0xa5);
  459. ret = c2port_poll_in_busy(dev);
  460. if (ret < 0)
  461. return ret;
  462. ret = c2port_poll_out_ready(dev);
  463. if (ret < 0)
  464. return ret;
  465. return 0;
  466. }
  467. static ssize_t c2port_store_flash_erase(struct device *dev,
  468. struct device_attribute *attr,
  469. const char *buf, size_t count)
  470. {
  471. struct c2port_device *c2dev = dev_get_drvdata(dev);
  472. int ret;
  473. /* Check the device and flash access status */
  474. if (!c2dev->access || !c2dev->flash_access)
  475. return -EBUSY;
  476. mutex_lock(&c2dev->mutex);
  477. ret = __c2port_write_flash_erase(c2dev);
  478. mutex_unlock(&c2dev->mutex);
  479. if (ret < 0) {
  480. dev_err(c2dev->dev, "cannot erase %s flash\n", c2dev->name);
  481. return ret;
  482. }
  483. return count;
  484. }
  485. static ssize_t __c2port_read_flash_data(struct c2port_device *dev,
  486. char *buffer, loff_t offset, size_t count)
  487. {
  488. struct c2port_ops *ops = dev->ops;
  489. u8 status, nread = 128;
  490. int i, ret;
  491. /* Check for flash end */
  492. if (offset >= ops->block_size * ops->blocks_num)
  493. return 0;
  494. if (ops->block_size * ops->blocks_num - offset < nread)
  495. nread = ops->block_size * ops->blocks_num - offset;
  496. if (count < nread)
  497. nread = count;
  498. if (nread == 0)
  499. return nread;
  500. /* Target the C2 flash programming data register for C2 data register
  501. * access */
  502. c2port_write_ar(dev, C2PORT_FPDAT);
  503. /* Send flash block read command */
  504. c2port_write_dr(dev, C2PORT_BLOCK_READ);
  505. /* Wait for input acknowledge */
  506. ret = c2port_poll_in_busy(dev);
  507. if (ret < 0)
  508. return ret;
  509. /* Should check status before starting FLASH access sequence */
  510. /* Wait for status information */
  511. ret = c2port_poll_out_ready(dev);
  512. if (ret < 0)
  513. return ret;
  514. /* Read flash programming interface status */
  515. ret = c2port_read_dr(dev, &status);
  516. if (ret < 0)
  517. return ret;
  518. if (status != C2PORT_COMMAND_OK)
  519. return -EBUSY;
  520. /* Send address high byte */
  521. c2port_write_dr(dev, offset >> 8);
  522. ret = c2port_poll_in_busy(dev);
  523. if (ret < 0)
  524. return ret;
  525. /* Send address low byte */
  526. c2port_write_dr(dev, offset & 0x00ff);
  527. ret = c2port_poll_in_busy(dev);
  528. if (ret < 0)
  529. return ret;
  530. /* Send address block size */
  531. c2port_write_dr(dev, nread);
  532. ret = c2port_poll_in_busy(dev);
  533. if (ret < 0)
  534. return ret;
  535. /* Should check status before reading FLASH block */
  536. /* Wait for status information */
  537. ret = c2port_poll_out_ready(dev);
  538. if (ret < 0)
  539. return ret;
  540. /* Read flash programming interface status */
  541. ret = c2port_read_dr(dev, &status);
  542. if (ret < 0)
  543. return ret;
  544. if (status != C2PORT_COMMAND_OK)
  545. return -EBUSY;
  546. /* Read flash block */
  547. for (i = 0; i < nread; i++) {
  548. ret = c2port_poll_out_ready(dev);
  549. if (ret < 0)
  550. return ret;
  551. ret = c2port_read_dr(dev, buffer+i);
  552. if (ret < 0)
  553. return ret;
  554. }
  555. return nread;
  556. }
  557. static ssize_t c2port_read_flash_data(struct file *filp, struct kobject *kobj,
  558. struct bin_attribute *attr,
  559. char *buffer, loff_t offset, size_t count)
  560. {
  561. struct c2port_device *c2dev =
  562. dev_get_drvdata(container_of(kobj,
  563. struct device, kobj));
  564. ssize_t ret;
  565. /* Check the device and flash access status */
  566. if (!c2dev->access || !c2dev->flash_access)
  567. return -EBUSY;
  568. mutex_lock(&c2dev->mutex);
  569. ret = __c2port_read_flash_data(c2dev, buffer, offset, count);
  570. mutex_unlock(&c2dev->mutex);
  571. if (ret < 0)
  572. dev_err(c2dev->dev, "cannot read %s flash\n", c2dev->name);
  573. return ret;
  574. }
  575. static ssize_t __c2port_write_flash_data(struct c2port_device *dev,
  576. char *buffer, loff_t offset, size_t count)
  577. {
  578. struct c2port_ops *ops = dev->ops;
  579. u8 status, nwrite = 128;
  580. int i, ret;
  581. if (nwrite > count)
  582. nwrite = count;
  583. if (ops->block_size * ops->blocks_num - offset < nwrite)
  584. nwrite = ops->block_size * ops->blocks_num - offset;
  585. /* Check for flash end */
  586. if (offset >= ops->block_size * ops->blocks_num)
  587. return -EINVAL;
  588. /* Target the C2 flash programming data register for C2 data register
  589. * access */
  590. c2port_write_ar(dev, C2PORT_FPDAT);
  591. /* Send flash block write command */
  592. c2port_write_dr(dev, C2PORT_BLOCK_WRITE);
  593. /* Wait for input acknowledge */
  594. ret = c2port_poll_in_busy(dev);
  595. if (ret < 0)
  596. return ret;
  597. /* Should check status before starting FLASH access sequence */
  598. /* Wait for status information */
  599. ret = c2port_poll_out_ready(dev);
  600. if (ret < 0)
  601. return ret;
  602. /* Read flash programming interface status */
  603. ret = c2port_read_dr(dev, &status);
  604. if (ret < 0)
  605. return ret;
  606. if (status != C2PORT_COMMAND_OK)
  607. return -EBUSY;
  608. /* Send address high byte */
  609. c2port_write_dr(dev, offset >> 8);
  610. ret = c2port_poll_in_busy(dev);
  611. if (ret < 0)
  612. return ret;
  613. /* Send address low byte */
  614. c2port_write_dr(dev, offset & 0x00ff);
  615. ret = c2port_poll_in_busy(dev);
  616. if (ret < 0)
  617. return ret;
  618. /* Send address block size */
  619. c2port_write_dr(dev, nwrite);
  620. ret = c2port_poll_in_busy(dev);
  621. if (ret < 0)
  622. return ret;
  623. /* Should check status before writing FLASH block */
  624. /* Wait for status information */
  625. ret = c2port_poll_out_ready(dev);
  626. if (ret < 0)
  627. return ret;
  628. /* Read flash programming interface status */
  629. ret = c2port_read_dr(dev, &status);
  630. if (ret < 0)
  631. return ret;
  632. if (status != C2PORT_COMMAND_OK)
  633. return -EBUSY;
  634. /* Write flash block */
  635. for (i = 0; i < nwrite; i++) {
  636. ret = c2port_write_dr(dev, *(buffer+i));
  637. if (ret < 0)
  638. return ret;
  639. ret = c2port_poll_in_busy(dev);
  640. if (ret < 0)
  641. return ret;
  642. }
  643. /* Wait for last flash write to complete */
  644. ret = c2port_poll_out_ready(dev);
  645. if (ret < 0)
  646. return ret;
  647. return nwrite;
  648. }
  649. static ssize_t c2port_write_flash_data(struct file *filp, struct kobject *kobj,
  650. struct bin_attribute *attr,
  651. char *buffer, loff_t offset, size_t count)
  652. {
  653. struct c2port_device *c2dev =
  654. dev_get_drvdata(container_of(kobj,
  655. struct device, kobj));
  656. int ret;
  657. /* Check the device access status */
  658. if (!c2dev->access || !c2dev->flash_access)
  659. return -EBUSY;
  660. mutex_lock(&c2dev->mutex);
  661. ret = __c2port_write_flash_data(c2dev, buffer, offset, count);
  662. mutex_unlock(&c2dev->mutex);
  663. if (ret < 0)
  664. dev_err(c2dev->dev, "cannot write %s flash\n", c2dev->name);
  665. return ret;
  666. }
  667. /*
  668. * Class attributes
  669. */
  670. static struct device_attribute c2port_attrs[] = {
  671. __ATTR(name, 0444, c2port_show_name, NULL),
  672. __ATTR(flash_blocks_num, 0444, c2port_show_flash_blocks_num, NULL),
  673. __ATTR(flash_block_size, 0444, c2port_show_flash_block_size, NULL),
  674. __ATTR(flash_size, 0444, c2port_show_flash_size, NULL),
  675. __ATTR(access, 0644, c2port_show_access, c2port_store_access),
  676. __ATTR(reset, 0200, NULL, c2port_store_reset),
  677. __ATTR(dev_id, 0444, c2port_show_dev_id, NULL),
  678. __ATTR(rev_id, 0444, c2port_show_rev_id, NULL),
  679. __ATTR(flash_access, 0644, c2port_show_flash_access,
  680. c2port_store_flash_access),
  681. __ATTR(flash_erase, 0200, NULL, c2port_store_flash_erase),
  682. __ATTR_NULL,
  683. };
  684. static struct bin_attribute c2port_bin_attrs = {
  685. .attr = {
  686. .name = "flash_data",
  687. .mode = 0644
  688. },
  689. .read = c2port_read_flash_data,
  690. .write = c2port_write_flash_data,
  691. /* .size is computed at run-time */
  692. };
  693. /*
  694. * Exported functions
  695. */
  696. struct c2port_device *c2port_device_register(char *name,
  697. struct c2port_ops *ops, void *devdata)
  698. {
  699. struct c2port_device *c2dev;
  700. int id, ret;
  701. if (unlikely(!ops) || unlikely(!ops->access) || \
  702. unlikely(!ops->c2d_dir) || unlikely(!ops->c2ck_set) || \
  703. unlikely(!ops->c2d_get) || unlikely(!ops->c2d_set))
  704. return ERR_PTR(-EINVAL);
  705. c2dev = kmalloc(sizeof(struct c2port_device), GFP_KERNEL);
  706. kmemcheck_annotate_bitfield(c2dev, flags);
  707. if (unlikely(!c2dev))
  708. return ERR_PTR(-ENOMEM);
  709. ret = idr_pre_get(&c2port_idr, GFP_KERNEL);
  710. if (!ret) {
  711. ret = -ENOMEM;
  712. goto error_idr_get_new;
  713. }
  714. spin_lock_irq(&c2port_idr_lock);
  715. ret = idr_get_new(&c2port_idr, c2dev, &id);
  716. spin_unlock_irq(&c2port_idr_lock);
  717. if (ret < 0)
  718. goto error_idr_get_new;
  719. c2dev->id = id;
  720. c2dev->dev = device_create(c2port_class, NULL, 0, c2dev,
  721. "c2port%d", id);
  722. if (unlikely(IS_ERR(c2dev->dev))) {
  723. ret = PTR_ERR(c2dev->dev);
  724. goto error_device_create;
  725. }
  726. dev_set_drvdata(c2dev->dev, c2dev);
  727. strncpy(c2dev->name, name, C2PORT_NAME_LEN);
  728. c2dev->ops = ops;
  729. mutex_init(&c2dev->mutex);
  730. /* Create binary file */
  731. c2port_bin_attrs.size = ops->blocks_num * ops->block_size;
  732. ret = device_create_bin_file(c2dev->dev, &c2port_bin_attrs);
  733. if (unlikely(ret))
  734. goto error_device_create_bin_file;
  735. /* By default C2 port access is off */
  736. c2dev->access = c2dev->flash_access = 0;
  737. ops->access(c2dev, 0);
  738. dev_info(c2dev->dev, "C2 port %s added\n", name);
  739. dev_info(c2dev->dev, "%s flash has %d blocks x %d bytes "
  740. "(%d bytes total)\n",
  741. name, ops->blocks_num, ops->block_size,
  742. ops->blocks_num * ops->block_size);
  743. return c2dev;
  744. error_device_create_bin_file:
  745. device_destroy(c2port_class, 0);
  746. error_device_create:
  747. spin_lock_irq(&c2port_idr_lock);
  748. idr_remove(&c2port_idr, id);
  749. spin_unlock_irq(&c2port_idr_lock);
  750. error_idr_get_new:
  751. kfree(c2dev);
  752. return ERR_PTR(ret);
  753. }
  754. EXPORT_SYMBOL(c2port_device_register);
  755. void c2port_device_unregister(struct c2port_device *c2dev)
  756. {
  757. if (!c2dev)
  758. return;
  759. dev_info(c2dev->dev, "C2 port %s removed\n", c2dev->name);
  760. device_remove_bin_file(c2dev->dev, &c2port_bin_attrs);
  761. spin_lock_irq(&c2port_idr_lock);
  762. idr_remove(&c2port_idr, c2dev->id);
  763. spin_unlock_irq(&c2port_idr_lock);
  764. device_destroy(c2port_class, c2dev->id);
  765. kfree(c2dev);
  766. }
  767. EXPORT_SYMBOL(c2port_device_unregister);
  768. /*
  769. * Module stuff
  770. */
  771. static int __init c2port_init(void)
  772. {
  773. printk(KERN_INFO "Silicon Labs C2 port support v. " DRIVER_VERSION
  774. " - (C) 2007 Rodolfo Giometti\n");
  775. c2port_class = class_create(THIS_MODULE, "c2port");
  776. if (!c2port_class) {
  777. printk(KERN_ERR "c2port: failed to allocate class\n");
  778. return -ENOMEM;
  779. }
  780. c2port_class->dev_attrs = c2port_attrs;
  781. return 0;
  782. }
  783. static void __exit c2port_exit(void)
  784. {
  785. class_destroy(c2port_class);
  786. }
  787. module_init(c2port_init);
  788. module_exit(c2port_exit);
  789. MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
  790. MODULE_DESCRIPTION("Silicon Labs C2 port support v. " DRIVER_VERSION);
  791. MODULE_LICENSE("GPL");