ucb1x00-core.c 19 KB

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  1. /*
  2. * linux/drivers/mfd/ucb1x00-core.c
  3. *
  4. * Copyright (C) 2001 Russell King, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License.
  9. *
  10. * The UCB1x00 core driver provides basic services for handling IO,
  11. * the ADC, interrupts, and accessing registers. It is designed
  12. * such that everything goes through this layer, thereby providing
  13. * a consistent locking methodology, as well as allowing the drivers
  14. * to be used on other non-MCP-enabled hardware platforms.
  15. *
  16. * Note that all locks are private to this file. Nothing else may
  17. * touch them.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/sched.h>
  22. #include <linux/slab.h>
  23. #include <linux/init.h>
  24. #include <linux/errno.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/device.h>
  27. #include <linux/mutex.h>
  28. #include <linux/mfd/ucb1x00.h>
  29. #include <linux/gpio.h>
  30. #include <linux/semaphore.h>
  31. #include <mach/dma.h>
  32. #include <mach/hardware.h>
  33. static DEFINE_MUTEX(ucb1x00_mutex);
  34. static LIST_HEAD(ucb1x00_drivers);
  35. static LIST_HEAD(ucb1x00_devices);
  36. /**
  37. * ucb1x00_io_set_dir - set IO direction
  38. * @ucb: UCB1x00 structure describing chip
  39. * @in: bitfield of IO pins to be set as inputs
  40. * @out: bitfield of IO pins to be set as outputs
  41. *
  42. * Set the IO direction of the ten general purpose IO pins on
  43. * the UCB1x00 chip. The @in bitfield has priority over the
  44. * @out bitfield, in that if you specify a pin as both input
  45. * and output, it will end up as an input.
  46. *
  47. * ucb1x00_enable must have been called to enable the comms
  48. * before using this function.
  49. *
  50. * This function takes a spinlock, disabling interrupts.
  51. */
  52. void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
  53. {
  54. unsigned long flags;
  55. spin_lock_irqsave(&ucb->io_lock, flags);
  56. ucb->io_dir |= out;
  57. ucb->io_dir &= ~in;
  58. ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
  59. spin_unlock_irqrestore(&ucb->io_lock, flags);
  60. }
  61. /**
  62. * ucb1x00_io_write - set or clear IO outputs
  63. * @ucb: UCB1x00 structure describing chip
  64. * @set: bitfield of IO pins to set to logic '1'
  65. * @clear: bitfield of IO pins to set to logic '0'
  66. *
  67. * Set the IO output state of the specified IO pins. The value
  68. * is retained if the pins are subsequently configured as inputs.
  69. * The @clear bitfield has priority over the @set bitfield -
  70. * outputs will be cleared.
  71. *
  72. * ucb1x00_enable must have been called to enable the comms
  73. * before using this function.
  74. *
  75. * This function takes a spinlock, disabling interrupts.
  76. */
  77. void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
  78. {
  79. unsigned long flags;
  80. spin_lock_irqsave(&ucb->io_lock, flags);
  81. ucb->io_out |= set;
  82. ucb->io_out &= ~clear;
  83. ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
  84. spin_unlock_irqrestore(&ucb->io_lock, flags);
  85. }
  86. /**
  87. * ucb1x00_io_read - read the current state of the IO pins
  88. * @ucb: UCB1x00 structure describing chip
  89. *
  90. * Return a bitfield describing the logic state of the ten
  91. * general purpose IO pins.
  92. *
  93. * ucb1x00_enable must have been called to enable the comms
  94. * before using this function.
  95. *
  96. * This function does not take any semaphores or spinlocks.
  97. */
  98. unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
  99. {
  100. return ucb1x00_reg_read(ucb, UCB_IO_DATA);
  101. }
  102. static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  103. {
  104. struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
  105. unsigned long flags;
  106. spin_lock_irqsave(&ucb->io_lock, flags);
  107. if (value)
  108. ucb->io_out |= 1 << offset;
  109. else
  110. ucb->io_out &= ~(1 << offset);
  111. ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
  112. spin_unlock_irqrestore(&ucb->io_lock, flags);
  113. }
  114. static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset)
  115. {
  116. struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
  117. return ucb1x00_reg_read(ucb, UCB_IO_DATA) & (1 << offset);
  118. }
  119. static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  120. {
  121. struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
  122. unsigned long flags;
  123. spin_lock_irqsave(&ucb->io_lock, flags);
  124. ucb->io_dir &= ~(1 << offset);
  125. ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
  126. spin_unlock_irqrestore(&ucb->io_lock, flags);
  127. return 0;
  128. }
  129. static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset
  130. , int value)
  131. {
  132. struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
  133. unsigned long flags;
  134. spin_lock_irqsave(&ucb->io_lock, flags);
  135. ucb->io_dir |= (1 << offset);
  136. ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
  137. if (value)
  138. ucb->io_out |= 1 << offset;
  139. else
  140. ucb->io_out &= ~(1 << offset);
  141. ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
  142. spin_unlock_irqrestore(&ucb->io_lock, flags);
  143. return 0;
  144. }
  145. /*
  146. * UCB1300 data sheet says we must:
  147. * 1. enable ADC => 5us (including reference startup time)
  148. * 2. select input => 51*tsibclk => 4.3us
  149. * 3. start conversion => 102*tsibclk => 8.5us
  150. * (tsibclk = 1/11981000)
  151. * Period between SIB 128-bit frames = 10.7us
  152. */
  153. /**
  154. * ucb1x00_adc_enable - enable the ADC converter
  155. * @ucb: UCB1x00 structure describing chip
  156. *
  157. * Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
  158. * Any code wishing to use the ADC converter must call this
  159. * function prior to using it.
  160. *
  161. * This function takes the ADC semaphore to prevent two or more
  162. * concurrent uses, and therefore may sleep. As a result, it
  163. * can only be called from process context, not interrupt
  164. * context.
  165. *
  166. * You should release the ADC as soon as possible using
  167. * ucb1x00_adc_disable.
  168. */
  169. void ucb1x00_adc_enable(struct ucb1x00 *ucb)
  170. {
  171. down(&ucb->adc_sem);
  172. ucb->adc_cr |= UCB_ADC_ENA;
  173. ucb1x00_enable(ucb);
  174. ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
  175. }
  176. /**
  177. * ucb1x00_adc_read - read the specified ADC channel
  178. * @ucb: UCB1x00 structure describing chip
  179. * @adc_channel: ADC channel mask
  180. * @sync: wait for syncronisation pulse.
  181. *
  182. * Start an ADC conversion and wait for the result. Note that
  183. * synchronised ADC conversions (via the ADCSYNC pin) must wait
  184. * until the trigger is asserted and the conversion is finished.
  185. *
  186. * This function currently spins waiting for the conversion to
  187. * complete (2 frames max without sync).
  188. *
  189. * If called for a synchronised ADC conversion, it may sleep
  190. * with the ADC semaphore held.
  191. */
  192. unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
  193. {
  194. unsigned int val;
  195. if (sync)
  196. adc_channel |= UCB_ADC_SYNC_ENA;
  197. ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
  198. ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
  199. for (;;) {
  200. val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
  201. if (val & UCB_ADC_DAT_VAL)
  202. break;
  203. /* yield to other processes */
  204. set_current_state(TASK_INTERRUPTIBLE);
  205. schedule_timeout(1);
  206. }
  207. return UCB_ADC_DAT(val);
  208. }
  209. /**
  210. * ucb1x00_adc_disable - disable the ADC converter
  211. * @ucb: UCB1x00 structure describing chip
  212. *
  213. * Disable the ADC converter and release the ADC semaphore.
  214. */
  215. void ucb1x00_adc_disable(struct ucb1x00 *ucb)
  216. {
  217. ucb->adc_cr &= ~UCB_ADC_ENA;
  218. ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
  219. ucb1x00_disable(ucb);
  220. up(&ucb->adc_sem);
  221. }
  222. /*
  223. * UCB1x00 Interrupt handling.
  224. *
  225. * The UCB1x00 can generate interrupts when the SIBCLK is stopped.
  226. * Since we need to read an internal register, we must re-enable
  227. * SIBCLK to talk to the chip. We leave the clock running until
  228. * we have finished processing all interrupts from the chip.
  229. */
  230. static irqreturn_t ucb1x00_irq(int irqnr, void *devid)
  231. {
  232. struct ucb1x00 *ucb = devid;
  233. struct ucb1x00_irq *irq;
  234. unsigned int isr, i;
  235. ucb1x00_enable(ucb);
  236. isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
  237. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
  238. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
  239. for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)
  240. if (isr & 1 && irq->fn)
  241. irq->fn(i, irq->devid);
  242. ucb1x00_disable(ucb);
  243. return IRQ_HANDLED;
  244. }
  245. /**
  246. * ucb1x00_hook_irq - hook a UCB1x00 interrupt
  247. * @ucb: UCB1x00 structure describing chip
  248. * @idx: interrupt index
  249. * @fn: function to call when interrupt is triggered
  250. * @devid: device id to pass to interrupt handler
  251. *
  252. * Hook the specified interrupt. You can only register one handler
  253. * for each interrupt source. The interrupt source is not enabled
  254. * by this function; use ucb1x00_enable_irq instead.
  255. *
  256. * Interrupt handlers will be called with other interrupts enabled.
  257. *
  258. * Returns zero on success, or one of the following errors:
  259. * -EINVAL if the interrupt index is invalid
  260. * -EBUSY if the interrupt has already been hooked
  261. */
  262. int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid)
  263. {
  264. struct ucb1x00_irq *irq;
  265. int ret = -EINVAL;
  266. if (idx < 16) {
  267. irq = ucb->irq_handler + idx;
  268. ret = -EBUSY;
  269. spin_lock_irq(&ucb->lock);
  270. if (irq->fn == NULL) {
  271. irq->devid = devid;
  272. irq->fn = fn;
  273. ret = 0;
  274. }
  275. spin_unlock_irq(&ucb->lock);
  276. }
  277. return ret;
  278. }
  279. /**
  280. * ucb1x00_enable_irq - enable an UCB1x00 interrupt source
  281. * @ucb: UCB1x00 structure describing chip
  282. * @idx: interrupt index
  283. * @edges: interrupt edges to enable
  284. *
  285. * Enable the specified interrupt to trigger on %UCB_RISING,
  286. * %UCB_FALLING or both edges. The interrupt should have been
  287. * hooked by ucb1x00_hook_irq.
  288. */
  289. void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
  290. {
  291. unsigned long flags;
  292. if (idx < 16) {
  293. spin_lock_irqsave(&ucb->lock, flags);
  294. ucb1x00_enable(ucb);
  295. if (edges & UCB_RISING) {
  296. ucb->irq_ris_enbl |= 1 << idx;
  297. ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
  298. }
  299. if (edges & UCB_FALLING) {
  300. ucb->irq_fal_enbl |= 1 << idx;
  301. ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
  302. }
  303. ucb1x00_disable(ucb);
  304. spin_unlock_irqrestore(&ucb->lock, flags);
  305. }
  306. }
  307. /**
  308. * ucb1x00_disable_irq - disable an UCB1x00 interrupt source
  309. * @ucb: UCB1x00 structure describing chip
  310. * @edges: interrupt edges to disable
  311. *
  312. * Disable the specified interrupt triggering on the specified
  313. * (%UCB_RISING, %UCB_FALLING or both) edges.
  314. */
  315. void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
  316. {
  317. unsigned long flags;
  318. if (idx < 16) {
  319. spin_lock_irqsave(&ucb->lock, flags);
  320. ucb1x00_enable(ucb);
  321. if (edges & UCB_RISING) {
  322. ucb->irq_ris_enbl &= ~(1 << idx);
  323. ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
  324. }
  325. if (edges & UCB_FALLING) {
  326. ucb->irq_fal_enbl &= ~(1 << idx);
  327. ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
  328. }
  329. ucb1x00_disable(ucb);
  330. spin_unlock_irqrestore(&ucb->lock, flags);
  331. }
  332. }
  333. /**
  334. * ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt
  335. * @ucb: UCB1x00 structure describing chip
  336. * @idx: interrupt index
  337. * @devid: device id.
  338. *
  339. * Disable the interrupt source and remove the handler. devid must
  340. * match the devid passed when hooking the interrupt.
  341. *
  342. * Returns zero on success, or one of the following errors:
  343. * -EINVAL if the interrupt index is invalid
  344. * -ENOENT if devid does not match
  345. */
  346. int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid)
  347. {
  348. struct ucb1x00_irq *irq;
  349. int ret;
  350. if (idx >= 16)
  351. goto bad;
  352. irq = ucb->irq_handler + idx;
  353. ret = -ENOENT;
  354. spin_lock_irq(&ucb->lock);
  355. if (irq->devid == devid) {
  356. ucb->irq_ris_enbl &= ~(1 << idx);
  357. ucb->irq_fal_enbl &= ~(1 << idx);
  358. ucb1x00_enable(ucb);
  359. ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
  360. ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
  361. ucb1x00_disable(ucb);
  362. irq->fn = NULL;
  363. irq->devid = NULL;
  364. ret = 0;
  365. }
  366. spin_unlock_irq(&ucb->lock);
  367. return ret;
  368. bad:
  369. printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx);
  370. return -EINVAL;
  371. }
  372. static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)
  373. {
  374. struct ucb1x00_dev *dev;
  375. int ret = -ENOMEM;
  376. dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);
  377. if (dev) {
  378. dev->ucb = ucb;
  379. dev->drv = drv;
  380. ret = drv->add(dev);
  381. if (ret == 0) {
  382. list_add(&dev->dev_node, &ucb->devs);
  383. list_add(&dev->drv_node, &drv->devs);
  384. } else {
  385. kfree(dev);
  386. }
  387. }
  388. return ret;
  389. }
  390. static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)
  391. {
  392. dev->drv->remove(dev);
  393. list_del(&dev->dev_node);
  394. list_del(&dev->drv_node);
  395. kfree(dev);
  396. }
  397. /*
  398. * Try to probe our interrupt, rather than relying on lots of
  399. * hard-coded machine dependencies. For reference, the expected
  400. * IRQ mappings are:
  401. *
  402. * Machine Default IRQ
  403. * adsbitsy IRQ_GPCIN4
  404. * cerf IRQ_GPIO_UCB1200_IRQ
  405. * flexanet IRQ_GPIO_GUI
  406. * freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
  407. * graphicsclient ADS_EXT_IRQ(8)
  408. * graphicsmaster ADS_EXT_IRQ(8)
  409. * lart LART_IRQ_UCB1200
  410. * omnimeter IRQ_GPIO23
  411. * pfs168 IRQ_GPIO_UCB1300_IRQ
  412. * simpad IRQ_GPIO_UCB1300_IRQ
  413. * shannon SHANNON_IRQ_GPIO_IRQ_CODEC
  414. * yopy IRQ_GPIO_UCB1200_IRQ
  415. */
  416. static int ucb1x00_detect_irq(struct ucb1x00 *ucb)
  417. {
  418. unsigned long mask;
  419. mask = probe_irq_on();
  420. if (!mask) {
  421. probe_irq_off(mask);
  422. return NO_IRQ;
  423. }
  424. /*
  425. * Enable the ADC interrupt.
  426. */
  427. ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
  428. ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
  429. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  430. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
  431. /*
  432. * Cause an ADC interrupt.
  433. */
  434. ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
  435. ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
  436. /*
  437. * Wait for the conversion to complete.
  438. */
  439. while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
  440. ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
  441. /*
  442. * Disable and clear interrupt.
  443. */
  444. ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
  445. ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
  446. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  447. ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
  448. /*
  449. * Read triggered interrupt.
  450. */
  451. return probe_irq_off(mask);
  452. }
  453. static void ucb1x00_release(struct device *dev)
  454. {
  455. struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);
  456. kfree(ucb);
  457. }
  458. static struct class ucb1x00_class = {
  459. .name = "ucb1x00",
  460. .dev_release = ucb1x00_release,
  461. };
  462. static int ucb1x00_probe(struct mcp *mcp)
  463. {
  464. struct ucb1x00 *ucb;
  465. struct ucb1x00_driver *drv;
  466. unsigned int id;
  467. int ret = -ENODEV;
  468. int temp;
  469. mcp_enable(mcp);
  470. id = mcp_reg_read(mcp, UCB_ID);
  471. if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) {
  472. printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
  473. goto err_disable;
  474. }
  475. ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL);
  476. ret = -ENOMEM;
  477. if (!ucb)
  478. goto err_disable;
  479. ucb->dev.class = &ucb1x00_class;
  480. ucb->dev.parent = &mcp->attached_device;
  481. dev_set_name(&ucb->dev, "ucb1x00");
  482. spin_lock_init(&ucb->lock);
  483. spin_lock_init(&ucb->io_lock);
  484. sema_init(&ucb->adc_sem, 1);
  485. ucb->id = id;
  486. ucb->mcp = mcp;
  487. ucb->irq = ucb1x00_detect_irq(ucb);
  488. if (ucb->irq == NO_IRQ) {
  489. printk(KERN_ERR "UCB1x00: IRQ probe failed\n");
  490. ret = -ENODEV;
  491. goto err_free;
  492. }
  493. ucb->gpio.base = -1;
  494. if (mcp->gpio_base != 0) {
  495. ucb->gpio.label = dev_name(&ucb->dev);
  496. ucb->gpio.base = mcp->gpio_base;
  497. ucb->gpio.ngpio = 10;
  498. ucb->gpio.set = ucb1x00_gpio_set;
  499. ucb->gpio.get = ucb1x00_gpio_get;
  500. ucb->gpio.direction_input = ucb1x00_gpio_direction_input;
  501. ucb->gpio.direction_output = ucb1x00_gpio_direction_output;
  502. ret = gpiochip_add(&ucb->gpio);
  503. if (ret)
  504. goto err_free;
  505. } else
  506. dev_info(&ucb->dev, "gpio_base not set so no gpiolib support");
  507. ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING,
  508. "UCB1x00", ucb);
  509. if (ret) {
  510. printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",
  511. ucb->irq, ret);
  512. goto err_gpio;
  513. }
  514. mcp_set_drvdata(mcp, ucb);
  515. ret = device_register(&ucb->dev);
  516. if (ret)
  517. goto err_irq;
  518. INIT_LIST_HEAD(&ucb->devs);
  519. mutex_lock(&ucb1x00_mutex);
  520. list_add(&ucb->node, &ucb1x00_devices);
  521. list_for_each_entry(drv, &ucb1x00_drivers, node) {
  522. ucb1x00_add_dev(ucb, drv);
  523. }
  524. mutex_unlock(&ucb1x00_mutex);
  525. goto out;
  526. err_irq:
  527. free_irq(ucb->irq, ucb);
  528. err_gpio:
  529. if (ucb->gpio.base != -1)
  530. temp = gpiochip_remove(&ucb->gpio);
  531. err_free:
  532. kfree(ucb);
  533. err_disable:
  534. mcp_disable(mcp);
  535. out:
  536. return ret;
  537. }
  538. static void ucb1x00_remove(struct mcp *mcp)
  539. {
  540. struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
  541. struct list_head *l, *n;
  542. int ret;
  543. mutex_lock(&ucb1x00_mutex);
  544. list_del(&ucb->node);
  545. list_for_each_safe(l, n, &ucb->devs) {
  546. struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);
  547. ucb1x00_remove_dev(dev);
  548. }
  549. mutex_unlock(&ucb1x00_mutex);
  550. if (ucb->gpio.base != -1) {
  551. ret = gpiochip_remove(&ucb->gpio);
  552. if (ret)
  553. dev_err(&ucb->dev, "Can't remove gpio chip: %d\n", ret);
  554. }
  555. free_irq(ucb->irq, ucb);
  556. device_unregister(&ucb->dev);
  557. }
  558. int ucb1x00_register_driver(struct ucb1x00_driver *drv)
  559. {
  560. struct ucb1x00 *ucb;
  561. INIT_LIST_HEAD(&drv->devs);
  562. mutex_lock(&ucb1x00_mutex);
  563. list_add(&drv->node, &ucb1x00_drivers);
  564. list_for_each_entry(ucb, &ucb1x00_devices, node) {
  565. ucb1x00_add_dev(ucb, drv);
  566. }
  567. mutex_unlock(&ucb1x00_mutex);
  568. return 0;
  569. }
  570. void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)
  571. {
  572. struct list_head *n, *l;
  573. mutex_lock(&ucb1x00_mutex);
  574. list_del(&drv->node);
  575. list_for_each_safe(l, n, &drv->devs) {
  576. struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);
  577. ucb1x00_remove_dev(dev);
  578. }
  579. mutex_unlock(&ucb1x00_mutex);
  580. }
  581. static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state)
  582. {
  583. struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
  584. struct ucb1x00_dev *dev;
  585. mutex_lock(&ucb1x00_mutex);
  586. list_for_each_entry(dev, &ucb->devs, dev_node) {
  587. if (dev->drv->suspend)
  588. dev->drv->suspend(dev, state);
  589. }
  590. mutex_unlock(&ucb1x00_mutex);
  591. return 0;
  592. }
  593. static int ucb1x00_resume(struct mcp *mcp)
  594. {
  595. struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
  596. struct ucb1x00_dev *dev;
  597. ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
  598. mutex_lock(&ucb1x00_mutex);
  599. list_for_each_entry(dev, &ucb->devs, dev_node) {
  600. if (dev->drv->resume)
  601. dev->drv->resume(dev);
  602. }
  603. mutex_unlock(&ucb1x00_mutex);
  604. return 0;
  605. }
  606. static struct mcp_driver ucb1x00_driver = {
  607. .drv = {
  608. .name = "ucb1x00",
  609. },
  610. .probe = ucb1x00_probe,
  611. .remove = ucb1x00_remove,
  612. .suspend = ucb1x00_suspend,
  613. .resume = ucb1x00_resume,
  614. };
  615. static int __init ucb1x00_init(void)
  616. {
  617. int ret = class_register(&ucb1x00_class);
  618. if (ret == 0) {
  619. ret = mcp_driver_register(&ucb1x00_driver);
  620. if (ret)
  621. class_unregister(&ucb1x00_class);
  622. }
  623. return ret;
  624. }
  625. static void __exit ucb1x00_exit(void)
  626. {
  627. mcp_driver_unregister(&ucb1x00_driver);
  628. class_unregister(&ucb1x00_class);
  629. }
  630. module_init(ucb1x00_init);
  631. module_exit(ucb1x00_exit);
  632. EXPORT_SYMBOL(ucb1x00_io_set_dir);
  633. EXPORT_SYMBOL(ucb1x00_io_write);
  634. EXPORT_SYMBOL(ucb1x00_io_read);
  635. EXPORT_SYMBOL(ucb1x00_adc_enable);
  636. EXPORT_SYMBOL(ucb1x00_adc_read);
  637. EXPORT_SYMBOL(ucb1x00_adc_disable);
  638. EXPORT_SYMBOL(ucb1x00_hook_irq);
  639. EXPORT_SYMBOL(ucb1x00_free_irq);
  640. EXPORT_SYMBOL(ucb1x00_enable_irq);
  641. EXPORT_SYMBOL(ucb1x00_disable_irq);
  642. EXPORT_SYMBOL(ucb1x00_register_driver);
  643. EXPORT_SYMBOL(ucb1x00_unregister_driver);
  644. MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
  645. MODULE_DESCRIPTION("UCB1x00 core driver");
  646. MODULE_LICENSE("GPL");