stmpe.c 23 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License, version 2
  5. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/irq.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/mfd/core.h>
  14. #include <linux/mfd/stmpe.h>
  15. #include "stmpe.h"
  16. static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  17. {
  18. return stmpe->variant->enable(stmpe, blocks, true);
  19. }
  20. static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  21. {
  22. return stmpe->variant->enable(stmpe, blocks, false);
  23. }
  24. static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  25. {
  26. int ret;
  27. ret = i2c_smbus_read_byte_data(stmpe->i2c, reg);
  28. if (ret < 0)
  29. dev_err(stmpe->dev, "failed to read reg %#x: %d\n",
  30. reg, ret);
  31. dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  32. return ret;
  33. }
  34. static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  35. {
  36. int ret;
  37. dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  38. ret = i2c_smbus_write_byte_data(stmpe->i2c, reg, val);
  39. if (ret < 0)
  40. dev_err(stmpe->dev, "failed to write reg %#x: %d\n",
  41. reg, ret);
  42. return ret;
  43. }
  44. static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  45. {
  46. int ret;
  47. ret = __stmpe_reg_read(stmpe, reg);
  48. if (ret < 0)
  49. return ret;
  50. ret &= ~mask;
  51. ret |= val;
  52. return __stmpe_reg_write(stmpe, reg, ret);
  53. }
  54. static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  55. u8 *values)
  56. {
  57. int ret;
  58. ret = i2c_smbus_read_i2c_block_data(stmpe->i2c, reg, length, values);
  59. if (ret < 0)
  60. dev_err(stmpe->dev, "failed to read regs %#x: %d\n",
  61. reg, ret);
  62. dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
  63. stmpe_dump_bytes("stmpe rd: ", values, length);
  64. return ret;
  65. }
  66. static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  67. const u8 *values)
  68. {
  69. int ret;
  70. dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
  71. stmpe_dump_bytes("stmpe wr: ", values, length);
  72. ret = i2c_smbus_write_i2c_block_data(stmpe->i2c, reg, length,
  73. values);
  74. if (ret < 0)
  75. dev_err(stmpe->dev, "failed to write regs %#x: %d\n",
  76. reg, ret);
  77. return ret;
  78. }
  79. /**
  80. * stmpe_enable - enable blocks on an STMPE device
  81. * @stmpe: Device to work on
  82. * @blocks: Mask of blocks (enum stmpe_block values) to enable
  83. */
  84. int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  85. {
  86. int ret;
  87. mutex_lock(&stmpe->lock);
  88. ret = __stmpe_enable(stmpe, blocks);
  89. mutex_unlock(&stmpe->lock);
  90. return ret;
  91. }
  92. EXPORT_SYMBOL_GPL(stmpe_enable);
  93. /**
  94. * stmpe_disable - disable blocks on an STMPE device
  95. * @stmpe: Device to work on
  96. * @blocks: Mask of blocks (enum stmpe_block values) to enable
  97. */
  98. int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  99. {
  100. int ret;
  101. mutex_lock(&stmpe->lock);
  102. ret = __stmpe_disable(stmpe, blocks);
  103. mutex_unlock(&stmpe->lock);
  104. return ret;
  105. }
  106. EXPORT_SYMBOL_GPL(stmpe_disable);
  107. /**
  108. * stmpe_reg_read() - read a single STMPE register
  109. * @stmpe: Device to read from
  110. * @reg: Register to read
  111. */
  112. int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  113. {
  114. int ret;
  115. mutex_lock(&stmpe->lock);
  116. ret = __stmpe_reg_read(stmpe, reg);
  117. mutex_unlock(&stmpe->lock);
  118. return ret;
  119. }
  120. EXPORT_SYMBOL_GPL(stmpe_reg_read);
  121. /**
  122. * stmpe_reg_write() - write a single STMPE register
  123. * @stmpe: Device to write to
  124. * @reg: Register to write
  125. * @val: Value to write
  126. */
  127. int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  128. {
  129. int ret;
  130. mutex_lock(&stmpe->lock);
  131. ret = __stmpe_reg_write(stmpe, reg, val);
  132. mutex_unlock(&stmpe->lock);
  133. return ret;
  134. }
  135. EXPORT_SYMBOL_GPL(stmpe_reg_write);
  136. /**
  137. * stmpe_set_bits() - set the value of a bitfield in a STMPE register
  138. * @stmpe: Device to write to
  139. * @reg: Register to write
  140. * @mask: Mask of bits to set
  141. * @val: Value to set
  142. */
  143. int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  144. {
  145. int ret;
  146. mutex_lock(&stmpe->lock);
  147. ret = __stmpe_set_bits(stmpe, reg, mask, val);
  148. mutex_unlock(&stmpe->lock);
  149. return ret;
  150. }
  151. EXPORT_SYMBOL_GPL(stmpe_set_bits);
  152. /**
  153. * stmpe_block_read() - read multiple STMPE registers
  154. * @stmpe: Device to read from
  155. * @reg: First register
  156. * @length: Number of registers
  157. * @values: Buffer to write to
  158. */
  159. int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
  160. {
  161. int ret;
  162. mutex_lock(&stmpe->lock);
  163. ret = __stmpe_block_read(stmpe, reg, length, values);
  164. mutex_unlock(&stmpe->lock);
  165. return ret;
  166. }
  167. EXPORT_SYMBOL_GPL(stmpe_block_read);
  168. /**
  169. * stmpe_block_write() - write multiple STMPE registers
  170. * @stmpe: Device to write to
  171. * @reg: First register
  172. * @length: Number of registers
  173. * @values: Values to write
  174. */
  175. int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  176. const u8 *values)
  177. {
  178. int ret;
  179. mutex_lock(&stmpe->lock);
  180. ret = __stmpe_block_write(stmpe, reg, length, values);
  181. mutex_unlock(&stmpe->lock);
  182. return ret;
  183. }
  184. EXPORT_SYMBOL_GPL(stmpe_block_write);
  185. /**
  186. * stmpe_set_altfunc: set the alternate function for STMPE pins
  187. * @stmpe: Device to configure
  188. * @pins: Bitmask of pins to affect
  189. * @block: block to enable alternate functions for
  190. *
  191. * @pins is assumed to have a bit set for each of the bits whose alternate
  192. * function is to be changed, numbered according to the GPIOXY numbers.
  193. *
  194. * If the GPIO module is not enabled, this function automatically enables it in
  195. * order to perform the change.
  196. */
  197. int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
  198. {
  199. struct stmpe_variant_info *variant = stmpe->variant;
  200. u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
  201. int af_bits = variant->af_bits;
  202. int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
  203. int afperreg = 8 / af_bits;
  204. int mask = (1 << af_bits) - 1;
  205. u8 regs[numregs];
  206. int af;
  207. int ret;
  208. mutex_lock(&stmpe->lock);
  209. ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
  210. if (ret < 0)
  211. goto out;
  212. ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
  213. if (ret < 0)
  214. goto out;
  215. af = variant->get_altfunc(stmpe, block);
  216. while (pins) {
  217. int pin = __ffs(pins);
  218. int regoffset = numregs - (pin / afperreg) - 1;
  219. int pos = (pin % afperreg) * (8 / afperreg);
  220. regs[regoffset] &= ~(mask << pos);
  221. regs[regoffset] |= af << pos;
  222. pins &= ~(1 << pin);
  223. }
  224. ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
  225. out:
  226. mutex_unlock(&stmpe->lock);
  227. return ret;
  228. }
  229. EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
  230. /*
  231. * GPIO (all variants)
  232. */
  233. static struct resource stmpe_gpio_resources[] = {
  234. /* Start and end filled dynamically */
  235. {
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. };
  239. static struct mfd_cell stmpe_gpio_cell = {
  240. .name = "stmpe-gpio",
  241. .resources = stmpe_gpio_resources,
  242. .num_resources = ARRAY_SIZE(stmpe_gpio_resources),
  243. };
  244. /*
  245. * Keypad (1601, 2401, 2403)
  246. */
  247. static struct resource stmpe_keypad_resources[] = {
  248. {
  249. .name = "KEYPAD",
  250. .start = 0,
  251. .end = 0,
  252. .flags = IORESOURCE_IRQ,
  253. },
  254. {
  255. .name = "KEYPAD_OVER",
  256. .start = 1,
  257. .end = 1,
  258. .flags = IORESOURCE_IRQ,
  259. },
  260. };
  261. static struct mfd_cell stmpe_keypad_cell = {
  262. .name = "stmpe-keypad",
  263. .resources = stmpe_keypad_resources,
  264. .num_resources = ARRAY_SIZE(stmpe_keypad_resources),
  265. };
  266. /*
  267. * Touchscreen (STMPE811)
  268. */
  269. static struct resource stmpe_ts_resources[] = {
  270. {
  271. .name = "TOUCH_DET",
  272. .start = 0,
  273. .end = 0,
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. {
  277. .name = "FIFO_TH",
  278. .start = 1,
  279. .end = 1,
  280. .flags = IORESOURCE_IRQ,
  281. },
  282. };
  283. static struct mfd_cell stmpe_ts_cell = {
  284. .name = "stmpe-ts",
  285. .resources = stmpe_ts_resources,
  286. .num_resources = ARRAY_SIZE(stmpe_ts_resources),
  287. };
  288. /*
  289. * STMPE811
  290. */
  291. static const u8 stmpe811_regs[] = {
  292. [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID,
  293. [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL,
  294. [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN,
  295. [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA,
  296. [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA,
  297. [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN,
  298. [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN,
  299. [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR,
  300. [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE,
  301. [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE,
  302. [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
  303. [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
  304. [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
  305. [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED,
  306. };
  307. static struct stmpe_variant_block stmpe811_blocks[] = {
  308. {
  309. .cell = &stmpe_gpio_cell,
  310. .irq = STMPE811_IRQ_GPIOC,
  311. .block = STMPE_BLOCK_GPIO,
  312. },
  313. {
  314. .cell = &stmpe_ts_cell,
  315. .irq = STMPE811_IRQ_TOUCH_DET,
  316. .block = STMPE_BLOCK_TOUCHSCREEN,
  317. },
  318. };
  319. static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
  320. bool enable)
  321. {
  322. unsigned int mask = 0;
  323. if (blocks & STMPE_BLOCK_GPIO)
  324. mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
  325. if (blocks & STMPE_BLOCK_ADC)
  326. mask |= STMPE811_SYS_CTRL2_ADC_OFF;
  327. if (blocks & STMPE_BLOCK_TOUCHSCREEN)
  328. mask |= STMPE811_SYS_CTRL2_TSC_OFF;
  329. return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
  330. enable ? 0 : mask);
  331. }
  332. static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  333. {
  334. /* 0 for touchscreen, 1 for GPIO */
  335. return block != STMPE_BLOCK_TOUCHSCREEN;
  336. }
  337. static struct stmpe_variant_info stmpe811 = {
  338. .name = "stmpe811",
  339. .id_val = 0x0811,
  340. .id_mask = 0xffff,
  341. .num_gpios = 8,
  342. .af_bits = 1,
  343. .regs = stmpe811_regs,
  344. .blocks = stmpe811_blocks,
  345. .num_blocks = ARRAY_SIZE(stmpe811_blocks),
  346. .num_irqs = STMPE811_NR_INTERNAL_IRQS,
  347. .enable = stmpe811_enable,
  348. .get_altfunc = stmpe811_get_altfunc,
  349. };
  350. /*
  351. * STMPE1601
  352. */
  353. static const u8 stmpe1601_regs[] = {
  354. [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID,
  355. [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB,
  356. [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB,
  357. [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB,
  358. [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB,
  359. [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB,
  360. [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB,
  361. [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
  362. [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
  363. [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
  364. [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
  365. [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
  366. [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
  367. [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB,
  368. };
  369. static struct stmpe_variant_block stmpe1601_blocks[] = {
  370. {
  371. .cell = &stmpe_gpio_cell,
  372. .irq = STMPE24XX_IRQ_GPIOC,
  373. .block = STMPE_BLOCK_GPIO,
  374. },
  375. {
  376. .cell = &stmpe_keypad_cell,
  377. .irq = STMPE24XX_IRQ_KEYPAD,
  378. .block = STMPE_BLOCK_KEYPAD,
  379. },
  380. };
  381. /* supported autosleep timeout delay (in msecs) */
  382. static const int stmpe_autosleep_delay[] = {
  383. 4, 16, 32, 64, 128, 256, 512, 1024,
  384. };
  385. static int stmpe_round_timeout(int timeout)
  386. {
  387. int i;
  388. for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
  389. if (stmpe_autosleep_delay[i] >= timeout)
  390. return i;
  391. }
  392. /*
  393. * requests for delays longer than supported should not return the
  394. * longest supported delay
  395. */
  396. return -EINVAL;
  397. }
  398. static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
  399. {
  400. int ret;
  401. if (!stmpe->variant->enable_autosleep)
  402. return -ENOSYS;
  403. mutex_lock(&stmpe->lock);
  404. ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
  405. mutex_unlock(&stmpe->lock);
  406. return ret;
  407. }
  408. /*
  409. * Both stmpe 1601/2403 support same layout for autosleep
  410. */
  411. static int stmpe1601_autosleep(struct stmpe *stmpe,
  412. int autosleep_timeout)
  413. {
  414. int ret, timeout;
  415. /* choose the best available timeout */
  416. timeout = stmpe_round_timeout(autosleep_timeout);
  417. if (timeout < 0) {
  418. dev_err(stmpe->dev, "invalid timeout\n");
  419. return timeout;
  420. }
  421. ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
  422. STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
  423. timeout);
  424. if (ret < 0)
  425. return ret;
  426. return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
  427. STPME1601_AUTOSLEEP_ENABLE,
  428. STPME1601_AUTOSLEEP_ENABLE);
  429. }
  430. static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
  431. bool enable)
  432. {
  433. unsigned int mask = 0;
  434. if (blocks & STMPE_BLOCK_GPIO)
  435. mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
  436. if (blocks & STMPE_BLOCK_KEYPAD)
  437. mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
  438. return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
  439. enable ? mask : 0);
  440. }
  441. static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  442. {
  443. switch (block) {
  444. case STMPE_BLOCK_PWM:
  445. return 2;
  446. case STMPE_BLOCK_KEYPAD:
  447. return 1;
  448. case STMPE_BLOCK_GPIO:
  449. default:
  450. return 0;
  451. }
  452. }
  453. static struct stmpe_variant_info stmpe1601 = {
  454. .name = "stmpe1601",
  455. .id_val = 0x0210,
  456. .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */
  457. .num_gpios = 16,
  458. .af_bits = 2,
  459. .regs = stmpe1601_regs,
  460. .blocks = stmpe1601_blocks,
  461. .num_blocks = ARRAY_SIZE(stmpe1601_blocks),
  462. .num_irqs = STMPE1601_NR_INTERNAL_IRQS,
  463. .enable = stmpe1601_enable,
  464. .get_altfunc = stmpe1601_get_altfunc,
  465. .enable_autosleep = stmpe1601_autosleep,
  466. };
  467. /*
  468. * STMPE24XX
  469. */
  470. static const u8 stmpe24xx_regs[] = {
  471. [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID,
  472. [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB,
  473. [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB,
  474. [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB,
  475. [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB,
  476. [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB,
  477. [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB,
  478. [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
  479. [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
  480. [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
  481. [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
  482. [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
  483. [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
  484. [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB,
  485. };
  486. static struct stmpe_variant_block stmpe24xx_blocks[] = {
  487. {
  488. .cell = &stmpe_gpio_cell,
  489. .irq = STMPE24XX_IRQ_GPIOC,
  490. .block = STMPE_BLOCK_GPIO,
  491. },
  492. {
  493. .cell = &stmpe_keypad_cell,
  494. .irq = STMPE24XX_IRQ_KEYPAD,
  495. .block = STMPE_BLOCK_KEYPAD,
  496. },
  497. };
  498. static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
  499. bool enable)
  500. {
  501. unsigned int mask = 0;
  502. if (blocks & STMPE_BLOCK_GPIO)
  503. mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
  504. if (blocks & STMPE_BLOCK_KEYPAD)
  505. mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
  506. return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
  507. enable ? mask : 0);
  508. }
  509. static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  510. {
  511. switch (block) {
  512. case STMPE_BLOCK_ROTATOR:
  513. return 2;
  514. case STMPE_BLOCK_KEYPAD:
  515. return 1;
  516. case STMPE_BLOCK_GPIO:
  517. default:
  518. return 0;
  519. }
  520. }
  521. static struct stmpe_variant_info stmpe2401 = {
  522. .name = "stmpe2401",
  523. .id_val = 0x0101,
  524. .id_mask = 0xffff,
  525. .num_gpios = 24,
  526. .af_bits = 2,
  527. .regs = stmpe24xx_regs,
  528. .blocks = stmpe24xx_blocks,
  529. .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
  530. .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
  531. .enable = stmpe24xx_enable,
  532. .get_altfunc = stmpe24xx_get_altfunc,
  533. };
  534. static struct stmpe_variant_info stmpe2403 = {
  535. .name = "stmpe2403",
  536. .id_val = 0x0120,
  537. .id_mask = 0xffff,
  538. .num_gpios = 24,
  539. .af_bits = 2,
  540. .regs = stmpe24xx_regs,
  541. .blocks = stmpe24xx_blocks,
  542. .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
  543. .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
  544. .enable = stmpe24xx_enable,
  545. .get_altfunc = stmpe24xx_get_altfunc,
  546. .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */
  547. };
  548. static struct stmpe_variant_info *stmpe_variant_info[] = {
  549. [STMPE811] = &stmpe811,
  550. [STMPE1601] = &stmpe1601,
  551. [STMPE2401] = &stmpe2401,
  552. [STMPE2403] = &stmpe2403,
  553. };
  554. static irqreturn_t stmpe_irq(int irq, void *data)
  555. {
  556. struct stmpe *stmpe = data;
  557. struct stmpe_variant_info *variant = stmpe->variant;
  558. int num = DIV_ROUND_UP(variant->num_irqs, 8);
  559. u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
  560. u8 isr[num];
  561. int ret;
  562. int i;
  563. ret = stmpe_block_read(stmpe, israddr, num, isr);
  564. if (ret < 0)
  565. return IRQ_NONE;
  566. for (i = 0; i < num; i++) {
  567. int bank = num - i - 1;
  568. u8 status = isr[i];
  569. u8 clear;
  570. status &= stmpe->ier[bank];
  571. if (!status)
  572. continue;
  573. clear = status;
  574. while (status) {
  575. int bit = __ffs(status);
  576. int line = bank * 8 + bit;
  577. handle_nested_irq(stmpe->irq_base + line);
  578. status &= ~(1 << bit);
  579. }
  580. stmpe_reg_write(stmpe, israddr + i, clear);
  581. }
  582. return IRQ_HANDLED;
  583. }
  584. static void stmpe_irq_lock(struct irq_data *data)
  585. {
  586. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  587. mutex_lock(&stmpe->irq_lock);
  588. }
  589. static void stmpe_irq_sync_unlock(struct irq_data *data)
  590. {
  591. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  592. struct stmpe_variant_info *variant = stmpe->variant;
  593. int num = DIV_ROUND_UP(variant->num_irqs, 8);
  594. int i;
  595. for (i = 0; i < num; i++) {
  596. u8 new = stmpe->ier[i];
  597. u8 old = stmpe->oldier[i];
  598. if (new == old)
  599. continue;
  600. stmpe->oldier[i] = new;
  601. stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
  602. }
  603. mutex_unlock(&stmpe->irq_lock);
  604. }
  605. static void stmpe_irq_mask(struct irq_data *data)
  606. {
  607. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  608. int offset = data->irq - stmpe->irq_base;
  609. int regoffset = offset / 8;
  610. int mask = 1 << (offset % 8);
  611. stmpe->ier[regoffset] &= ~mask;
  612. }
  613. static void stmpe_irq_unmask(struct irq_data *data)
  614. {
  615. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  616. int offset = data->irq - stmpe->irq_base;
  617. int regoffset = offset / 8;
  618. int mask = 1 << (offset % 8);
  619. stmpe->ier[regoffset] |= mask;
  620. }
  621. static struct irq_chip stmpe_irq_chip = {
  622. .name = "stmpe",
  623. .irq_bus_lock = stmpe_irq_lock,
  624. .irq_bus_sync_unlock = stmpe_irq_sync_unlock,
  625. .irq_mask = stmpe_irq_mask,
  626. .irq_unmask = stmpe_irq_unmask,
  627. };
  628. static int __devinit stmpe_irq_init(struct stmpe *stmpe)
  629. {
  630. int num_irqs = stmpe->variant->num_irqs;
  631. int base = stmpe->irq_base;
  632. int irq;
  633. for (irq = base; irq < base + num_irqs; irq++) {
  634. irq_set_chip_data(irq, stmpe);
  635. irq_set_chip_and_handler(irq, &stmpe_irq_chip,
  636. handle_edge_irq);
  637. irq_set_nested_thread(irq, 1);
  638. #ifdef CONFIG_ARM
  639. set_irq_flags(irq, IRQF_VALID);
  640. #else
  641. irq_set_noprobe(irq);
  642. #endif
  643. }
  644. return 0;
  645. }
  646. static void stmpe_irq_remove(struct stmpe *stmpe)
  647. {
  648. int num_irqs = stmpe->variant->num_irqs;
  649. int base = stmpe->irq_base;
  650. int irq;
  651. for (irq = base; irq < base + num_irqs; irq++) {
  652. #ifdef CONFIG_ARM
  653. set_irq_flags(irq, 0);
  654. #endif
  655. irq_set_chip_and_handler(irq, NULL, NULL);
  656. irq_set_chip_data(irq, NULL);
  657. }
  658. }
  659. static int __devinit stmpe_chip_init(struct stmpe *stmpe)
  660. {
  661. unsigned int irq_trigger = stmpe->pdata->irq_trigger;
  662. int autosleep_timeout = stmpe->pdata->autosleep_timeout;
  663. struct stmpe_variant_info *variant = stmpe->variant;
  664. u8 icr = STMPE_ICR_LSB_GIM;
  665. unsigned int id;
  666. u8 data[2];
  667. int ret;
  668. ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
  669. ARRAY_SIZE(data), data);
  670. if (ret < 0)
  671. return ret;
  672. id = (data[0] << 8) | data[1];
  673. if ((id & variant->id_mask) != variant->id_val) {
  674. dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
  675. return -EINVAL;
  676. }
  677. dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
  678. /* Disable all modules -- subdrivers should enable what they need. */
  679. ret = stmpe_disable(stmpe, ~0);
  680. if (ret)
  681. return ret;
  682. if (irq_trigger == IRQF_TRIGGER_FALLING ||
  683. irq_trigger == IRQF_TRIGGER_RISING)
  684. icr |= STMPE_ICR_LSB_EDGE;
  685. if (irq_trigger == IRQF_TRIGGER_RISING ||
  686. irq_trigger == IRQF_TRIGGER_HIGH)
  687. icr |= STMPE_ICR_LSB_HIGH;
  688. if (stmpe->pdata->irq_invert_polarity)
  689. icr ^= STMPE_ICR_LSB_HIGH;
  690. if (stmpe->pdata->autosleep) {
  691. ret = stmpe_autosleep(stmpe, autosleep_timeout);
  692. if (ret)
  693. return ret;
  694. }
  695. return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
  696. }
  697. static int __devinit stmpe_add_device(struct stmpe *stmpe,
  698. struct mfd_cell *cell, int irq)
  699. {
  700. return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
  701. NULL, stmpe->irq_base + irq);
  702. }
  703. static int __devinit stmpe_devices_init(struct stmpe *stmpe)
  704. {
  705. struct stmpe_variant_info *variant = stmpe->variant;
  706. unsigned int platform_blocks = stmpe->pdata->blocks;
  707. int ret = -EINVAL;
  708. int i;
  709. for (i = 0; i < variant->num_blocks; i++) {
  710. struct stmpe_variant_block *block = &variant->blocks[i];
  711. if (!(platform_blocks & block->block))
  712. continue;
  713. platform_blocks &= ~block->block;
  714. ret = stmpe_add_device(stmpe, block->cell, block->irq);
  715. if (ret)
  716. return ret;
  717. }
  718. if (platform_blocks)
  719. dev_warn(stmpe->dev,
  720. "platform wants blocks (%#x) not present on variant",
  721. platform_blocks);
  722. return ret;
  723. }
  724. #ifdef CONFIG_PM
  725. static int stmpe_suspend(struct device *dev)
  726. {
  727. struct i2c_client *i2c = to_i2c_client(dev);
  728. if (device_may_wakeup(&i2c->dev))
  729. enable_irq_wake(i2c->irq);
  730. return 0;
  731. }
  732. static int stmpe_resume(struct device *dev)
  733. {
  734. struct i2c_client *i2c = to_i2c_client(dev);
  735. if (device_may_wakeup(&i2c->dev))
  736. disable_irq_wake(i2c->irq);
  737. return 0;
  738. }
  739. #endif
  740. static int __devinit stmpe_probe(struct i2c_client *i2c,
  741. const struct i2c_device_id *id)
  742. {
  743. struct stmpe_platform_data *pdata = i2c->dev.platform_data;
  744. struct stmpe *stmpe;
  745. int ret;
  746. if (!pdata)
  747. return -EINVAL;
  748. stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
  749. if (!stmpe)
  750. return -ENOMEM;
  751. mutex_init(&stmpe->irq_lock);
  752. mutex_init(&stmpe->lock);
  753. stmpe->dev = &i2c->dev;
  754. stmpe->i2c = i2c;
  755. stmpe->pdata = pdata;
  756. stmpe->irq_base = pdata->irq_base;
  757. stmpe->partnum = id->driver_data;
  758. stmpe->variant = stmpe_variant_info[stmpe->partnum];
  759. stmpe->regs = stmpe->variant->regs;
  760. stmpe->num_gpios = stmpe->variant->num_gpios;
  761. i2c_set_clientdata(i2c, stmpe);
  762. ret = stmpe_chip_init(stmpe);
  763. if (ret)
  764. goto out_free;
  765. ret = stmpe_irq_init(stmpe);
  766. if (ret)
  767. goto out_free;
  768. ret = request_threaded_irq(stmpe->i2c->irq, NULL, stmpe_irq,
  769. pdata->irq_trigger | IRQF_ONESHOT,
  770. "stmpe", stmpe);
  771. if (ret) {
  772. dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret);
  773. goto out_removeirq;
  774. }
  775. ret = stmpe_devices_init(stmpe);
  776. if (ret) {
  777. dev_err(stmpe->dev, "failed to add children\n");
  778. goto out_removedevs;
  779. }
  780. return 0;
  781. out_removedevs:
  782. mfd_remove_devices(stmpe->dev);
  783. free_irq(stmpe->i2c->irq, stmpe);
  784. out_removeirq:
  785. stmpe_irq_remove(stmpe);
  786. out_free:
  787. kfree(stmpe);
  788. return ret;
  789. }
  790. static int __devexit stmpe_remove(struct i2c_client *client)
  791. {
  792. struct stmpe *stmpe = i2c_get_clientdata(client);
  793. mfd_remove_devices(stmpe->dev);
  794. free_irq(stmpe->i2c->irq, stmpe);
  795. stmpe_irq_remove(stmpe);
  796. kfree(stmpe);
  797. return 0;
  798. }
  799. static const struct i2c_device_id stmpe_id[] = {
  800. { "stmpe811", STMPE811 },
  801. { "stmpe1601", STMPE1601 },
  802. { "stmpe2401", STMPE2401 },
  803. { "stmpe2403", STMPE2403 },
  804. { }
  805. };
  806. MODULE_DEVICE_TABLE(i2c, stmpe_id);
  807. #ifdef CONFIG_PM
  808. static const struct dev_pm_ops stmpe_dev_pm_ops = {
  809. .suspend = stmpe_suspend,
  810. .resume = stmpe_resume,
  811. };
  812. #endif
  813. static struct i2c_driver stmpe_driver = {
  814. .driver.name = "stmpe",
  815. .driver.owner = THIS_MODULE,
  816. #ifdef CONFIG_PM
  817. .driver.pm = &stmpe_dev_pm_ops,
  818. #endif
  819. .probe = stmpe_probe,
  820. .remove = __devexit_p(stmpe_remove),
  821. .id_table = stmpe_id,
  822. };
  823. static int __init stmpe_init(void)
  824. {
  825. return i2c_add_driver(&stmpe_driver);
  826. }
  827. subsys_initcall(stmpe_init);
  828. static void __exit stmpe_exit(void)
  829. {
  830. i2c_del_driver(&stmpe_driver);
  831. }
  832. module_exit(stmpe_exit);
  833. MODULE_LICENSE("GPL v2");
  834. MODULE_DESCRIPTION("STMPE MFD core driver");
  835. MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");