jc42.c 17 KB

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  1. /*
  2. * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
  7. *
  8. * JC42.4 compliant temperature sensors are typically used on memory modules.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/i2c.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. /* Addresses to scan */
  34. static const unsigned short normal_i2c[] = {
  35. 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
  36. /* JC42 registers. All registers are 16 bit. */
  37. #define JC42_REG_CAP 0x00
  38. #define JC42_REG_CONFIG 0x01
  39. #define JC42_REG_TEMP_UPPER 0x02
  40. #define JC42_REG_TEMP_LOWER 0x03
  41. #define JC42_REG_TEMP_CRITICAL 0x04
  42. #define JC42_REG_TEMP 0x05
  43. #define JC42_REG_MANID 0x06
  44. #define JC42_REG_DEVICEID 0x07
  45. /* Status bits in temperature register */
  46. #define JC42_ALARM_CRIT_BIT 15
  47. #define JC42_ALARM_MAX_BIT 14
  48. #define JC42_ALARM_MIN_BIT 13
  49. /* Configuration register defines */
  50. #define JC42_CFG_CRIT_ONLY (1 << 2)
  51. #define JC42_CFG_TCRIT_LOCK (1 << 6)
  52. #define JC42_CFG_EVENT_LOCK (1 << 7)
  53. #define JC42_CFG_SHUTDOWN (1 << 8)
  54. #define JC42_CFG_HYST_SHIFT 9
  55. #define JC42_CFG_HYST_MASK 0x03
  56. /* Capabilities */
  57. #define JC42_CAP_RANGE (1 << 2)
  58. /* Manufacturer IDs */
  59. #define ADT_MANID 0x11d4 /* Analog Devices */
  60. #define ATMEL_MANID 0x001f /* Atmel */
  61. #define MAX_MANID 0x004d /* Maxim */
  62. #define IDT_MANID 0x00b3 /* IDT */
  63. #define MCP_MANID 0x0054 /* Microchip */
  64. #define NXP_MANID 0x1131 /* NXP Semiconductors */
  65. #define ONS_MANID 0x1b09 /* ON Semiconductor */
  66. #define STM_MANID 0x104a /* ST Microelectronics */
  67. /* Supported chips */
  68. /* Analog Devices */
  69. #define ADT7408_DEVID 0x0801
  70. #define ADT7408_DEVID_MASK 0xffff
  71. /* Atmel */
  72. #define AT30TS00_DEVID 0x8201
  73. #define AT30TS00_DEVID_MASK 0xffff
  74. /* IDT */
  75. #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
  76. #define TS3000B3_DEVID_MASK 0xffff
  77. #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
  78. #define TS3000GB2_DEVID_MASK 0xffff
  79. /* Maxim */
  80. #define MAX6604_DEVID 0x3e00
  81. #define MAX6604_DEVID_MASK 0xffff
  82. /* Microchip */
  83. #define MCP9804_DEVID 0x0200
  84. #define MCP9804_DEVID_MASK 0xfffc
  85. #define MCP98242_DEVID 0x2000
  86. #define MCP98242_DEVID_MASK 0xfffc
  87. #define MCP98243_DEVID 0x2100
  88. #define MCP98243_DEVID_MASK 0xfffc
  89. #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
  90. #define MCP9843_DEVID_MASK 0xfffe
  91. /* NXP */
  92. #define SE97_DEVID 0xa200
  93. #define SE97_DEVID_MASK 0xfffc
  94. #define SE98_DEVID 0xa100
  95. #define SE98_DEVID_MASK 0xfffc
  96. /* ON Semiconductor */
  97. #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
  98. #define CAT6095_DEVID_MASK 0xffe0
  99. /* ST Microelectronics */
  100. #define STTS424_DEVID 0x0101
  101. #define STTS424_DEVID_MASK 0xffff
  102. #define STTS424E_DEVID 0x0000
  103. #define STTS424E_DEVID_MASK 0xfffe
  104. #define STTS2002_DEVID 0x0300
  105. #define STTS2002_DEVID_MASK 0xffff
  106. #define STTS3000_DEVID 0x0200
  107. #define STTS3000_DEVID_MASK 0xffff
  108. static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
  109. struct jc42_chips {
  110. u16 manid;
  111. u16 devid;
  112. u16 devid_mask;
  113. };
  114. static struct jc42_chips jc42_chips[] = {
  115. { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
  116. { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
  117. { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
  118. { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
  119. { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
  120. { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
  121. { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
  122. { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
  123. { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
  124. { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
  125. { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
  126. { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
  127. { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
  128. { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
  129. { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
  130. { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
  131. };
  132. /* Each client has this additional data */
  133. struct jc42_data {
  134. struct device *hwmon_dev;
  135. struct mutex update_lock; /* protect register access */
  136. bool extended; /* true if extended range supported */
  137. bool valid;
  138. unsigned long last_updated; /* In jiffies */
  139. u16 orig_config; /* original configuration */
  140. u16 config; /* current configuration */
  141. u16 temp_input; /* Temperatures */
  142. u16 temp_crit;
  143. u16 temp_min;
  144. u16 temp_max;
  145. };
  146. static int jc42_probe(struct i2c_client *client,
  147. const struct i2c_device_id *id);
  148. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
  149. static int jc42_remove(struct i2c_client *client);
  150. static int jc42_read_value(struct i2c_client *client, u8 reg);
  151. static int jc42_write_value(struct i2c_client *client, u8 reg, u16 value);
  152. static struct jc42_data *jc42_update_device(struct device *dev);
  153. static const struct i2c_device_id jc42_id[] = {
  154. { "adt7408", 0 },
  155. { "at30ts00", 0 },
  156. { "cat94ts02", 0 },
  157. { "cat6095", 0 },
  158. { "jc42", 0 },
  159. { "max6604", 0 },
  160. { "mcp9804", 0 },
  161. { "mcp9805", 0 },
  162. { "mcp98242", 0 },
  163. { "mcp98243", 0 },
  164. { "mcp9843", 0 },
  165. { "se97", 0 },
  166. { "se97b", 0 },
  167. { "se98", 0 },
  168. { "stts424", 0 },
  169. { "stts2002", 0 },
  170. { "stts3000", 0 },
  171. { "tse2002", 0 },
  172. { "ts3000", 0 },
  173. { }
  174. };
  175. MODULE_DEVICE_TABLE(i2c, jc42_id);
  176. #ifdef CONFIG_PM
  177. static int jc42_suspend(struct device *dev)
  178. {
  179. struct i2c_client *client = to_i2c_client(dev);
  180. struct jc42_data *data = i2c_get_clientdata(client);
  181. data->config |= JC42_CFG_SHUTDOWN;
  182. jc42_write_value(client, JC42_REG_CONFIG, data->config);
  183. return 0;
  184. }
  185. static int jc42_resume(struct device *dev)
  186. {
  187. struct i2c_client *client = to_i2c_client(dev);
  188. struct jc42_data *data = i2c_get_clientdata(client);
  189. data->config &= ~JC42_CFG_SHUTDOWN;
  190. jc42_write_value(client, JC42_REG_CONFIG, data->config);
  191. return 0;
  192. }
  193. static const struct dev_pm_ops jc42_dev_pm_ops = {
  194. .suspend = jc42_suspend,
  195. .resume = jc42_resume,
  196. };
  197. #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
  198. #else
  199. #define JC42_DEV_PM_OPS NULL
  200. #endif /* CONFIG_PM */
  201. /* This is the driver that will be inserted */
  202. static struct i2c_driver jc42_driver = {
  203. .class = I2C_CLASS_SPD,
  204. .driver = {
  205. .name = "jc42",
  206. .pm = JC42_DEV_PM_OPS,
  207. },
  208. .probe = jc42_probe,
  209. .remove = jc42_remove,
  210. .id_table = jc42_id,
  211. .detect = jc42_detect,
  212. .address_list = normal_i2c,
  213. };
  214. #define JC42_TEMP_MIN_EXTENDED (-40000)
  215. #define JC42_TEMP_MIN 0
  216. #define JC42_TEMP_MAX 125000
  217. static u16 jc42_temp_to_reg(int temp, bool extended)
  218. {
  219. int ntemp = SENSORS_LIMIT(temp,
  220. extended ? JC42_TEMP_MIN_EXTENDED :
  221. JC42_TEMP_MIN, JC42_TEMP_MAX);
  222. /* convert from 0.001 to 0.0625 resolution */
  223. return (ntemp * 2 / 125) & 0x1fff;
  224. }
  225. static int jc42_temp_from_reg(s16 reg)
  226. {
  227. reg &= 0x1fff;
  228. /* sign extend register */
  229. if (reg & 0x1000)
  230. reg |= 0xf000;
  231. /* convert from 0.0625 to 0.001 resolution */
  232. return reg * 125 / 2;
  233. }
  234. /* sysfs stuff */
  235. /* read routines for temperature limits */
  236. #define show(value) \
  237. static ssize_t show_##value(struct device *dev, \
  238. struct device_attribute *attr, \
  239. char *buf) \
  240. { \
  241. struct jc42_data *data = jc42_update_device(dev); \
  242. if (IS_ERR(data)) \
  243. return PTR_ERR(data); \
  244. return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
  245. }
  246. show(temp_input);
  247. show(temp_crit);
  248. show(temp_min);
  249. show(temp_max);
  250. /* read routines for hysteresis values */
  251. static ssize_t show_temp_crit_hyst(struct device *dev,
  252. struct device_attribute *attr, char *buf)
  253. {
  254. struct jc42_data *data = jc42_update_device(dev);
  255. int temp, hyst;
  256. if (IS_ERR(data))
  257. return PTR_ERR(data);
  258. temp = jc42_temp_from_reg(data->temp_crit);
  259. hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT)
  260. & JC42_CFG_HYST_MASK];
  261. return sprintf(buf, "%d\n", temp - hyst);
  262. }
  263. static ssize_t show_temp_max_hyst(struct device *dev,
  264. struct device_attribute *attr, char *buf)
  265. {
  266. struct jc42_data *data = jc42_update_device(dev);
  267. int temp, hyst;
  268. if (IS_ERR(data))
  269. return PTR_ERR(data);
  270. temp = jc42_temp_from_reg(data->temp_max);
  271. hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT)
  272. & JC42_CFG_HYST_MASK];
  273. return sprintf(buf, "%d\n", temp - hyst);
  274. }
  275. /* write routines */
  276. #define set(value, reg) \
  277. static ssize_t set_##value(struct device *dev, \
  278. struct device_attribute *attr, \
  279. const char *buf, size_t count) \
  280. { \
  281. struct i2c_client *client = to_i2c_client(dev); \
  282. struct jc42_data *data = i2c_get_clientdata(client); \
  283. int err, ret = count; \
  284. long val; \
  285. if (strict_strtol(buf, 10, &val) < 0) \
  286. return -EINVAL; \
  287. mutex_lock(&data->update_lock); \
  288. data->value = jc42_temp_to_reg(val, data->extended); \
  289. err = jc42_write_value(client, reg, data->value); \
  290. if (err < 0) \
  291. ret = err; \
  292. mutex_unlock(&data->update_lock); \
  293. return ret; \
  294. }
  295. set(temp_min, JC42_REG_TEMP_LOWER);
  296. set(temp_max, JC42_REG_TEMP_UPPER);
  297. set(temp_crit, JC42_REG_TEMP_CRITICAL);
  298. /* JC42.4 compliant chips only support four hysteresis values.
  299. * Pick best choice and go from there. */
  300. static ssize_t set_temp_crit_hyst(struct device *dev,
  301. struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. struct i2c_client *client = to_i2c_client(dev);
  305. struct jc42_data *data = i2c_get_clientdata(client);
  306. unsigned long val;
  307. int diff, hyst;
  308. int err;
  309. int ret = count;
  310. if (strict_strtoul(buf, 10, &val) < 0)
  311. return -EINVAL;
  312. diff = jc42_temp_from_reg(data->temp_crit) - val;
  313. hyst = 0;
  314. if (diff > 0) {
  315. if (diff < 2250)
  316. hyst = 1; /* 1.5 degrees C */
  317. else if (diff < 4500)
  318. hyst = 2; /* 3.0 degrees C */
  319. else
  320. hyst = 3; /* 6.0 degrees C */
  321. }
  322. mutex_lock(&data->update_lock);
  323. data->config = (data->config
  324. & ~(JC42_CFG_HYST_MASK << JC42_CFG_HYST_SHIFT))
  325. | (hyst << JC42_CFG_HYST_SHIFT);
  326. err = jc42_write_value(client, JC42_REG_CONFIG, data->config);
  327. if (err < 0)
  328. ret = err;
  329. mutex_unlock(&data->update_lock);
  330. return ret;
  331. }
  332. static ssize_t show_alarm(struct device *dev,
  333. struct device_attribute *attr, char *buf)
  334. {
  335. u16 bit = to_sensor_dev_attr(attr)->index;
  336. struct jc42_data *data = jc42_update_device(dev);
  337. u16 val;
  338. if (IS_ERR(data))
  339. return PTR_ERR(data);
  340. val = data->temp_input;
  341. if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
  342. val = 0;
  343. return sprintf(buf, "%u\n", (val >> bit) & 1);
  344. }
  345. static DEVICE_ATTR(temp1_input, S_IRUGO,
  346. show_temp_input, NULL);
  347. static DEVICE_ATTR(temp1_crit, S_IRUGO,
  348. show_temp_crit, set_temp_crit);
  349. static DEVICE_ATTR(temp1_min, S_IRUGO,
  350. show_temp_min, set_temp_min);
  351. static DEVICE_ATTR(temp1_max, S_IRUGO,
  352. show_temp_max, set_temp_max);
  353. static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
  354. show_temp_crit_hyst, set_temp_crit_hyst);
  355. static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
  356. show_temp_max_hyst, NULL);
  357. static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
  358. JC42_ALARM_CRIT_BIT);
  359. static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
  360. JC42_ALARM_MIN_BIT);
  361. static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
  362. JC42_ALARM_MAX_BIT);
  363. static struct attribute *jc42_attributes[] = {
  364. &dev_attr_temp1_input.attr,
  365. &dev_attr_temp1_crit.attr,
  366. &dev_attr_temp1_min.attr,
  367. &dev_attr_temp1_max.attr,
  368. &dev_attr_temp1_crit_hyst.attr,
  369. &dev_attr_temp1_max_hyst.attr,
  370. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  371. &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
  372. &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
  373. NULL
  374. };
  375. static mode_t jc42_attribute_mode(struct kobject *kobj,
  376. struct attribute *attr, int index)
  377. {
  378. struct device *dev = container_of(kobj, struct device, kobj);
  379. struct i2c_client *client = to_i2c_client(dev);
  380. struct jc42_data *data = i2c_get_clientdata(client);
  381. unsigned int config = data->config;
  382. bool readonly;
  383. if (attr == &dev_attr_temp1_crit.attr)
  384. readonly = config & JC42_CFG_TCRIT_LOCK;
  385. else if (attr == &dev_attr_temp1_min.attr ||
  386. attr == &dev_attr_temp1_max.attr)
  387. readonly = config & JC42_CFG_EVENT_LOCK;
  388. else if (attr == &dev_attr_temp1_crit_hyst.attr)
  389. readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
  390. else
  391. readonly = true;
  392. return S_IRUGO | (readonly ? 0 : S_IWUSR);
  393. }
  394. static const struct attribute_group jc42_group = {
  395. .attrs = jc42_attributes,
  396. .is_visible = jc42_attribute_mode,
  397. };
  398. /* Return 0 if detection is successful, -ENODEV otherwise */
  399. static int jc42_detect(struct i2c_client *new_client,
  400. struct i2c_board_info *info)
  401. {
  402. struct i2c_adapter *adapter = new_client->adapter;
  403. int i, config, cap, manid, devid;
  404. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
  405. I2C_FUNC_SMBUS_WORD_DATA))
  406. return -ENODEV;
  407. cap = jc42_read_value(new_client, JC42_REG_CAP);
  408. config = jc42_read_value(new_client, JC42_REG_CONFIG);
  409. manid = jc42_read_value(new_client, JC42_REG_MANID);
  410. devid = jc42_read_value(new_client, JC42_REG_DEVICEID);
  411. if (cap < 0 || config < 0 || manid < 0 || devid < 0)
  412. return -ENODEV;
  413. if ((cap & 0xff00) || (config & 0xf800))
  414. return -ENODEV;
  415. for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
  416. struct jc42_chips *chip = &jc42_chips[i];
  417. if (manid == chip->manid &&
  418. (devid & chip->devid_mask) == chip->devid) {
  419. strlcpy(info->type, "jc42", I2C_NAME_SIZE);
  420. return 0;
  421. }
  422. }
  423. return -ENODEV;
  424. }
  425. static int jc42_probe(struct i2c_client *new_client,
  426. const struct i2c_device_id *id)
  427. {
  428. struct jc42_data *data;
  429. int config, cap, err;
  430. data = kzalloc(sizeof(struct jc42_data), GFP_KERNEL);
  431. if (!data) {
  432. err = -ENOMEM;
  433. goto exit;
  434. }
  435. i2c_set_clientdata(new_client, data);
  436. mutex_init(&data->update_lock);
  437. cap = jc42_read_value(new_client, JC42_REG_CAP);
  438. if (cap < 0) {
  439. err = -EINVAL;
  440. goto exit_free;
  441. }
  442. data->extended = !!(cap & JC42_CAP_RANGE);
  443. config = jc42_read_value(new_client, JC42_REG_CONFIG);
  444. if (config < 0) {
  445. err = -EINVAL;
  446. goto exit_free;
  447. }
  448. data->orig_config = config;
  449. if (config & JC42_CFG_SHUTDOWN) {
  450. config &= ~JC42_CFG_SHUTDOWN;
  451. jc42_write_value(new_client, JC42_REG_CONFIG, config);
  452. }
  453. data->config = config;
  454. /* Register sysfs hooks */
  455. err = sysfs_create_group(&new_client->dev.kobj, &jc42_group);
  456. if (err)
  457. goto exit_free;
  458. data->hwmon_dev = hwmon_device_register(&new_client->dev);
  459. if (IS_ERR(data->hwmon_dev)) {
  460. err = PTR_ERR(data->hwmon_dev);
  461. goto exit_remove;
  462. }
  463. return 0;
  464. exit_remove:
  465. sysfs_remove_group(&new_client->dev.kobj, &jc42_group);
  466. exit_free:
  467. kfree(data);
  468. exit:
  469. return err;
  470. }
  471. static int jc42_remove(struct i2c_client *client)
  472. {
  473. struct jc42_data *data = i2c_get_clientdata(client);
  474. hwmon_device_unregister(data->hwmon_dev);
  475. sysfs_remove_group(&client->dev.kobj, &jc42_group);
  476. if (data->config != data->orig_config)
  477. jc42_write_value(client, JC42_REG_CONFIG, data->orig_config);
  478. kfree(data);
  479. return 0;
  480. }
  481. /* All registers are word-sized. */
  482. static int jc42_read_value(struct i2c_client *client, u8 reg)
  483. {
  484. int ret = i2c_smbus_read_word_data(client, reg);
  485. if (ret < 0)
  486. return ret;
  487. return swab16(ret);
  488. }
  489. static int jc42_write_value(struct i2c_client *client, u8 reg, u16 value)
  490. {
  491. return i2c_smbus_write_word_data(client, reg, swab16(value));
  492. }
  493. static struct jc42_data *jc42_update_device(struct device *dev)
  494. {
  495. struct i2c_client *client = to_i2c_client(dev);
  496. struct jc42_data *data = i2c_get_clientdata(client);
  497. struct jc42_data *ret = data;
  498. int val;
  499. mutex_lock(&data->update_lock);
  500. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  501. val = jc42_read_value(client, JC42_REG_TEMP);
  502. if (val < 0) {
  503. ret = ERR_PTR(val);
  504. goto abort;
  505. }
  506. data->temp_input = val;
  507. val = jc42_read_value(client, JC42_REG_TEMP_CRITICAL);
  508. if (val < 0) {
  509. ret = ERR_PTR(val);
  510. goto abort;
  511. }
  512. data->temp_crit = val;
  513. val = jc42_read_value(client, JC42_REG_TEMP_LOWER);
  514. if (val < 0) {
  515. ret = ERR_PTR(val);
  516. goto abort;
  517. }
  518. data->temp_min = val;
  519. val = jc42_read_value(client, JC42_REG_TEMP_UPPER);
  520. if (val < 0) {
  521. ret = ERR_PTR(val);
  522. goto abort;
  523. }
  524. data->temp_max = val;
  525. data->last_updated = jiffies;
  526. data->valid = true;
  527. }
  528. abort:
  529. mutex_unlock(&data->update_lock);
  530. return ret;
  531. }
  532. static int __init sensors_jc42_init(void)
  533. {
  534. return i2c_add_driver(&jc42_driver);
  535. }
  536. static void __exit sensors_jc42_exit(void)
  537. {
  538. i2c_del_driver(&jc42_driver);
  539. }
  540. MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
  541. MODULE_DESCRIPTION("JC42 driver");
  542. MODULE_LICENSE("GPL");
  543. module_init(sensors_jc42_init);
  544. module_exit(sensors_jc42_exit);