radeon_test.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219
  1. /*
  2. * Copyright 2009 VMware, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Michel Dänzer
  23. */
  24. #include <drm/drmP.h>
  25. #include <drm/radeon_drm.h>
  26. #include "radeon_reg.h"
  27. #include "radeon.h"
  28. /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
  29. void radeon_test_moves(struct radeon_device *rdev)
  30. {
  31. struct radeon_bo *vram_obj = NULL;
  32. struct radeon_bo **gtt_obj = NULL;
  33. struct radeon_fence *fence = NULL;
  34. uint64_t gtt_addr, vram_addr;
  35. unsigned i, n, size;
  36. int r;
  37. size = 1024 * 1024;
  38. /* Number of tests =
  39. * (Total GTT - IB pool - writeback page - ring buffer) / test size
  40. */
  41. n = ((u32)(rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
  42. rdev->cp.ring_size)) / size;
  43. gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
  44. if (!gtt_obj) {
  45. DRM_ERROR("Failed to allocate %d pointers\n", n);
  46. r = 1;
  47. goto out_cleanup;
  48. }
  49. r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
  50. &vram_obj);
  51. if (r) {
  52. DRM_ERROR("Failed to create VRAM object\n");
  53. goto out_cleanup;
  54. }
  55. r = radeon_bo_reserve(vram_obj, false);
  56. if (unlikely(r != 0))
  57. goto out_cleanup;
  58. r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
  59. if (r) {
  60. DRM_ERROR("Failed to pin VRAM object\n");
  61. goto out_cleanup;
  62. }
  63. for (i = 0; i < n; i++) {
  64. void *gtt_map, *vram_map;
  65. void **gtt_start, **gtt_end;
  66. void **vram_start, **vram_end;
  67. r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
  68. RADEON_GEM_DOMAIN_GTT, gtt_obj + i);
  69. if (r) {
  70. DRM_ERROR("Failed to create GTT object %d\n", i);
  71. goto out_cleanup;
  72. }
  73. r = radeon_bo_reserve(gtt_obj[i], false);
  74. if (unlikely(r != 0))
  75. goto out_cleanup;
  76. r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
  77. if (r) {
  78. DRM_ERROR("Failed to pin GTT object %d\n", i);
  79. goto out_cleanup;
  80. }
  81. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  82. if (r) {
  83. DRM_ERROR("Failed to map GTT object %d\n", i);
  84. goto out_cleanup;
  85. }
  86. for (gtt_start = gtt_map, gtt_end = gtt_map + size;
  87. gtt_start < gtt_end;
  88. gtt_start++)
  89. *gtt_start = gtt_start;
  90. radeon_bo_kunmap(gtt_obj[i]);
  91. r = radeon_fence_create(rdev, &fence);
  92. if (r) {
  93. DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
  94. goto out_cleanup;
  95. }
  96. r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  97. if (r) {
  98. DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
  99. goto out_cleanup;
  100. }
  101. r = radeon_fence_wait(fence, false);
  102. if (r) {
  103. DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
  104. goto out_cleanup;
  105. }
  106. radeon_fence_unref(&fence);
  107. r = radeon_bo_kmap(vram_obj, &vram_map);
  108. if (r) {
  109. DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
  110. goto out_cleanup;
  111. }
  112. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  113. vram_start = vram_map, vram_end = vram_map + size;
  114. vram_start < vram_end;
  115. gtt_start++, vram_start++) {
  116. if (*vram_start != gtt_start) {
  117. DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
  118. "expected 0x%p (GTT map 0x%p-0x%p)\n",
  119. i, *vram_start, gtt_start, gtt_map,
  120. gtt_end);
  121. radeon_bo_kunmap(vram_obj);
  122. goto out_cleanup;
  123. }
  124. *vram_start = vram_start;
  125. }
  126. radeon_bo_kunmap(vram_obj);
  127. r = radeon_fence_create(rdev, &fence);
  128. if (r) {
  129. DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
  130. goto out_cleanup;
  131. }
  132. r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
  133. if (r) {
  134. DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
  135. goto out_cleanup;
  136. }
  137. r = radeon_fence_wait(fence, false);
  138. if (r) {
  139. DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
  140. goto out_cleanup;
  141. }
  142. radeon_fence_unref(&fence);
  143. r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
  144. if (r) {
  145. DRM_ERROR("Failed to map GTT object after copy %d\n", i);
  146. goto out_cleanup;
  147. }
  148. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  149. vram_start = vram_map, vram_end = vram_map + size;
  150. gtt_start < gtt_end;
  151. gtt_start++, vram_start++) {
  152. if (*gtt_start != vram_start) {
  153. DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
  154. "expected 0x%p (VRAM map 0x%p-0x%p)\n",
  155. i, *gtt_start, vram_start, vram_map,
  156. vram_end);
  157. radeon_bo_kunmap(gtt_obj[i]);
  158. goto out_cleanup;
  159. }
  160. }
  161. radeon_bo_kunmap(gtt_obj[i]);
  162. DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
  163. gtt_addr - rdev->mc.gtt_start);
  164. }
  165. out_cleanup:
  166. if (vram_obj) {
  167. if (radeon_bo_is_reserved(vram_obj)) {
  168. radeon_bo_unpin(vram_obj);
  169. radeon_bo_unreserve(vram_obj);
  170. }
  171. radeon_bo_unref(&vram_obj);
  172. }
  173. if (gtt_obj) {
  174. for (i = 0; i < n; i++) {
  175. if (gtt_obj[i]) {
  176. if (radeon_bo_is_reserved(gtt_obj[i])) {
  177. radeon_bo_unpin(gtt_obj[i]);
  178. radeon_bo_unreserve(gtt_obj[i]);
  179. }
  180. radeon_bo_unref(&gtt_obj[i]);
  181. }
  182. }
  183. kfree(gtt_obj);
  184. }
  185. if (fence) {
  186. radeon_fence_unref(&fence);
  187. }
  188. if (r) {
  189. printk(KERN_WARNING "Error while testing BO move.\n");
  190. }
  191. }