mga_irq.c 4.9 KB

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  1. /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
  2. */
  3. /*
  4. * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
  5. *
  6. * The Weather Channel (TM) funded Tungsten Graphics to develop the
  7. * initial release of the Radeon 8500 driver under the XFree86 license.
  8. * This notice must be preserved.
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the next
  18. * paragraph) shall be included in all copies or substantial portions of the
  19. * Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  24. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  25. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  26. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27. * DEALINGS IN THE SOFTWARE.
  28. *
  29. * Authors:
  30. * Keith Whitwell <keith@tungstengraphics.com>
  31. * Eric Anholt <anholt@FreeBSD.org>
  32. */
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "mga_drm.h"
  36. #include "mga_drv.h"
  37. u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
  38. {
  39. const drm_mga_private_t *const dev_priv =
  40. (drm_mga_private_t *) dev->dev_private;
  41. if (crtc != 0)
  42. return 0;
  43. return atomic_read(&dev_priv->vbl_received);
  44. }
  45. irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
  46. {
  47. struct drm_device *dev = (struct drm_device *) arg;
  48. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  49. int status;
  50. int handled = 0;
  51. status = MGA_READ(MGA_STATUS);
  52. /* VBLANK interrupt */
  53. if (status & MGA_VLINEPEN) {
  54. MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
  55. atomic_inc(&dev_priv->vbl_received);
  56. drm_handle_vblank(dev, 0);
  57. handled = 1;
  58. }
  59. /* SOFTRAP interrupt */
  60. if (status & MGA_SOFTRAPEN) {
  61. const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
  62. const u32 prim_end = MGA_READ(MGA_PRIMEND);
  63. MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
  64. /* In addition to clearing the interrupt-pending bit, we
  65. * have to write to MGA_PRIMEND to re-start the DMA operation.
  66. */
  67. if ((prim_start & ~0x03) != (prim_end & ~0x03))
  68. MGA_WRITE(MGA_PRIMEND, prim_end);
  69. atomic_inc(&dev_priv->last_fence_retired);
  70. DRM_WAKEUP(&dev_priv->fence_queue);
  71. handled = 1;
  72. }
  73. if (handled)
  74. return IRQ_HANDLED;
  75. return IRQ_NONE;
  76. }
  77. int mga_enable_vblank(struct drm_device *dev, int crtc)
  78. {
  79. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  80. if (crtc != 0) {
  81. DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
  82. crtc);
  83. return 0;
  84. }
  85. MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
  86. return 0;
  87. }
  88. void mga_disable_vblank(struct drm_device *dev, int crtc)
  89. {
  90. if (crtc != 0) {
  91. DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
  92. crtc);
  93. }
  94. /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
  95. * a nice hardware counter that tracks the number of refreshes when
  96. * the interrupt is disabled, and the kernel doesn't know the refresh
  97. * rate to calculate an estimate.
  98. */
  99. /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
  100. }
  101. int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
  102. {
  103. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  104. unsigned int cur_fence;
  105. int ret = 0;
  106. /* Assume that the user has missed the current sequence number
  107. * by about a day rather than she wants to wait for years
  108. * using fences.
  109. */
  110. DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
  111. (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
  112. - *sequence) <= (1 << 23)));
  113. *sequence = cur_fence;
  114. return ret;
  115. }
  116. void mga_driver_irq_preinstall(struct drm_device *dev)
  117. {
  118. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  119. /* Disable *all* interrupts */
  120. MGA_WRITE(MGA_IEN, 0);
  121. /* Clear bits if they're already high */
  122. MGA_WRITE(MGA_ICLEAR, ~0);
  123. }
  124. int mga_driver_irq_postinstall(struct drm_device *dev)
  125. {
  126. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  127. DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
  128. /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
  129. * in mga_enable_vblank.
  130. */
  131. MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
  132. return 0;
  133. }
  134. void mga_driver_irq_uninstall(struct drm_device *dev)
  135. {
  136. drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  137. if (!dev_priv)
  138. return;
  139. /* Disable *all* interrupts */
  140. MGA_WRITE(MGA_IEN, 0);
  141. dev->irq_enabled = 0;
  142. }