drm_modes.c 32 KB

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  1. /*
  2. * Copyright © 1997-2003 by The XFree86 Project, Inc.
  3. * Copyright © 2007 Dave Airlie
  4. * Copyright © 2007-2008 Intel Corporation
  5. * Jesse Barnes <jesse.barnes@intel.com>
  6. * Copyright 2005-2006 Luc Verhaegen
  7. * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. *
  27. * Except as contained in this notice, the name of the copyright holder(s)
  28. * and author(s) shall not be used in advertising or otherwise to promote
  29. * the sale, use or other dealings in this Software without prior written
  30. * authorization from the copyright holder(s) and author(s).
  31. */
  32. #include <linux/list.h>
  33. #include <linux/list_sort.h>
  34. #include "drmP.h"
  35. #include "drm.h"
  36. #include "drm_crtc.h"
  37. /**
  38. * drm_mode_debug_printmodeline - debug print a mode
  39. * @dev: DRM device
  40. * @mode: mode to print
  41. *
  42. * LOCKING:
  43. * None.
  44. *
  45. * Describe @mode using DRM_DEBUG.
  46. */
  47. void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
  48. {
  49. DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
  50. "0x%x 0x%x\n",
  51. mode->base.id, mode->name, mode->vrefresh, mode->clock,
  52. mode->hdisplay, mode->hsync_start,
  53. mode->hsync_end, mode->htotal,
  54. mode->vdisplay, mode->vsync_start,
  55. mode->vsync_end, mode->vtotal, mode->type, mode->flags);
  56. }
  57. EXPORT_SYMBOL(drm_mode_debug_printmodeline);
  58. /**
  59. * drm_cvt_mode -create a modeline based on CVT algorithm
  60. * @dev: DRM device
  61. * @hdisplay: hdisplay size
  62. * @vdisplay: vdisplay size
  63. * @vrefresh : vrefresh rate
  64. * @reduced : Whether the GTF calculation is simplified
  65. * @interlaced:Whether the interlace is supported
  66. *
  67. * LOCKING:
  68. * none.
  69. *
  70. * return the modeline based on CVT algorithm
  71. *
  72. * This function is called to generate the modeline based on CVT algorithm
  73. * according to the hdisplay, vdisplay, vrefresh.
  74. * It is based from the VESA(TM) Coordinated Video Timing Generator by
  75. * Graham Loveridge April 9, 2003 available at
  76. * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
  77. *
  78. * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
  79. * What I have done is to translate it by using integer calculation.
  80. */
  81. #define HV_FACTOR 1000
  82. struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
  83. int vdisplay, int vrefresh,
  84. bool reduced, bool interlaced, bool margins)
  85. {
  86. /* 1) top/bottom margin size (% of height) - default: 1.8, */
  87. #define CVT_MARGIN_PERCENTAGE 18
  88. /* 2) character cell horizontal granularity (pixels) - default 8 */
  89. #define CVT_H_GRANULARITY 8
  90. /* 3) Minimum vertical porch (lines) - default 3 */
  91. #define CVT_MIN_V_PORCH 3
  92. /* 4) Minimum number of vertical back porch lines - default 6 */
  93. #define CVT_MIN_V_BPORCH 6
  94. /* Pixel Clock step (kHz) */
  95. #define CVT_CLOCK_STEP 250
  96. struct drm_display_mode *drm_mode;
  97. unsigned int vfieldrate, hperiod;
  98. int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
  99. int interlace;
  100. /* allocate the drm_display_mode structure. If failure, we will
  101. * return directly
  102. */
  103. drm_mode = drm_mode_create(dev);
  104. if (!drm_mode)
  105. return NULL;
  106. /* the CVT default refresh rate is 60Hz */
  107. if (!vrefresh)
  108. vrefresh = 60;
  109. /* the required field fresh rate */
  110. if (interlaced)
  111. vfieldrate = vrefresh * 2;
  112. else
  113. vfieldrate = vrefresh;
  114. /* horizontal pixels */
  115. hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
  116. /* determine the left&right borders */
  117. hmargin = 0;
  118. if (margins) {
  119. hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
  120. hmargin -= hmargin % CVT_H_GRANULARITY;
  121. }
  122. /* find the total active pixels */
  123. drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
  124. /* find the number of lines per field */
  125. if (interlaced)
  126. vdisplay_rnd = vdisplay / 2;
  127. else
  128. vdisplay_rnd = vdisplay;
  129. /* find the top & bottom borders */
  130. vmargin = 0;
  131. if (margins)
  132. vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
  133. drm_mode->vdisplay = vdisplay + 2 * vmargin;
  134. /* Interlaced */
  135. if (interlaced)
  136. interlace = 1;
  137. else
  138. interlace = 0;
  139. /* Determine VSync Width from aspect ratio */
  140. if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
  141. vsync = 4;
  142. else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
  143. vsync = 5;
  144. else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
  145. vsync = 6;
  146. else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
  147. vsync = 7;
  148. else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
  149. vsync = 7;
  150. else /* custom */
  151. vsync = 10;
  152. if (!reduced) {
  153. /* simplify the GTF calculation */
  154. /* 4) Minimum time of vertical sync + back porch interval (µs)
  155. * default 550.0
  156. */
  157. int tmp1, tmp2;
  158. #define CVT_MIN_VSYNC_BP 550
  159. /* 3) Nominal HSync width (% of line period) - default 8 */
  160. #define CVT_HSYNC_PERCENTAGE 8
  161. unsigned int hblank_percentage;
  162. int vsyncandback_porch, vback_porch, hblank;
  163. /* estimated the horizontal period */
  164. tmp1 = HV_FACTOR * 1000000 -
  165. CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
  166. tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
  167. interlace;
  168. hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
  169. tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
  170. /* 9. Find number of lines in sync + backporch */
  171. if (tmp1 < (vsync + CVT_MIN_V_PORCH))
  172. vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
  173. else
  174. vsyncandback_porch = tmp1;
  175. /* 10. Find number of lines in back porch */
  176. vback_porch = vsyncandback_porch - vsync;
  177. drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
  178. vsyncandback_porch + CVT_MIN_V_PORCH;
  179. /* 5) Definition of Horizontal blanking time limitation */
  180. /* Gradient (%/kHz) - default 600 */
  181. #define CVT_M_FACTOR 600
  182. /* Offset (%) - default 40 */
  183. #define CVT_C_FACTOR 40
  184. /* Blanking time scaling factor - default 128 */
  185. #define CVT_K_FACTOR 128
  186. /* Scaling factor weighting - default 20 */
  187. #define CVT_J_FACTOR 20
  188. #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
  189. #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
  190. CVT_J_FACTOR)
  191. /* 12. Find ideal blanking duty cycle from formula */
  192. hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
  193. hperiod / 1000;
  194. /* 13. Blanking time */
  195. if (hblank_percentage < 20 * HV_FACTOR)
  196. hblank_percentage = 20 * HV_FACTOR;
  197. hblank = drm_mode->hdisplay * hblank_percentage /
  198. (100 * HV_FACTOR - hblank_percentage);
  199. hblank -= hblank % (2 * CVT_H_GRANULARITY);
  200. /* 14. find the total pixes per line */
  201. drm_mode->htotal = drm_mode->hdisplay + hblank;
  202. drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
  203. drm_mode->hsync_start = drm_mode->hsync_end -
  204. (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
  205. drm_mode->hsync_start += CVT_H_GRANULARITY -
  206. drm_mode->hsync_start % CVT_H_GRANULARITY;
  207. /* fill the Vsync values */
  208. drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
  209. drm_mode->vsync_end = drm_mode->vsync_start + vsync;
  210. } else {
  211. /* Reduced blanking */
  212. /* Minimum vertical blanking interval time (µs)- default 460 */
  213. #define CVT_RB_MIN_VBLANK 460
  214. /* Fixed number of clocks for horizontal sync */
  215. #define CVT_RB_H_SYNC 32
  216. /* Fixed number of clocks for horizontal blanking */
  217. #define CVT_RB_H_BLANK 160
  218. /* Fixed number of lines for vertical front porch - default 3*/
  219. #define CVT_RB_VFPORCH 3
  220. int vbilines;
  221. int tmp1, tmp2;
  222. /* 8. Estimate Horizontal period. */
  223. tmp1 = HV_FACTOR * 1000000 -
  224. CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
  225. tmp2 = vdisplay_rnd + 2 * vmargin;
  226. hperiod = tmp1 / (tmp2 * vfieldrate);
  227. /* 9. Find number of lines in vertical blanking */
  228. vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
  229. /* 10. Check if vertical blanking is sufficient */
  230. if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
  231. vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
  232. /* 11. Find total number of lines in vertical field */
  233. drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
  234. /* 12. Find total number of pixels in a line */
  235. drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
  236. /* Fill in HSync values */
  237. drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
  238. drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
  239. /* Fill in VSync values */
  240. drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
  241. drm_mode->vsync_end = drm_mode->vsync_start + vsync;
  242. }
  243. /* 15/13. Find pixel clock frequency (kHz for xf86) */
  244. drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
  245. drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
  246. /* 18/16. Find actual vertical frame frequency */
  247. /* ignore - just set the mode flag for interlaced */
  248. if (interlaced) {
  249. drm_mode->vtotal *= 2;
  250. drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
  251. }
  252. /* Fill the mode line name */
  253. drm_mode_set_name(drm_mode);
  254. if (reduced)
  255. drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
  256. DRM_MODE_FLAG_NVSYNC);
  257. else
  258. drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
  259. DRM_MODE_FLAG_NHSYNC);
  260. return drm_mode;
  261. }
  262. EXPORT_SYMBOL(drm_cvt_mode);
  263. /**
  264. * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
  265. *
  266. * @dev :drm device
  267. * @hdisplay :hdisplay size
  268. * @vdisplay :vdisplay size
  269. * @vrefresh :vrefresh rate.
  270. * @interlaced :whether the interlace is supported
  271. * @margins :desired margin size
  272. * @GTF_[MCKJ] :extended GTF formula parameters
  273. *
  274. * LOCKING.
  275. * none.
  276. *
  277. * return the modeline based on full GTF algorithm.
  278. *
  279. * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
  280. * in here multiplied by two. For a C of 40, pass in 80.
  281. */
  282. struct drm_display_mode *
  283. drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
  284. int vrefresh, bool interlaced, int margins,
  285. int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
  286. { /* 1) top/bottom margin size (% of height) - default: 1.8, */
  287. #define GTF_MARGIN_PERCENTAGE 18
  288. /* 2) character cell horizontal granularity (pixels) - default 8 */
  289. #define GTF_CELL_GRAN 8
  290. /* 3) Minimum vertical porch (lines) - default 3 */
  291. #define GTF_MIN_V_PORCH 1
  292. /* width of vsync in lines */
  293. #define V_SYNC_RQD 3
  294. /* width of hsync as % of total line */
  295. #define H_SYNC_PERCENT 8
  296. /* min time of vsync + back porch (microsec) */
  297. #define MIN_VSYNC_PLUS_BP 550
  298. /* C' and M' are part of the Blanking Duty Cycle computation */
  299. #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
  300. #define GTF_M_PRIME (GTF_K * GTF_M / 256)
  301. struct drm_display_mode *drm_mode;
  302. unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
  303. int top_margin, bottom_margin;
  304. int interlace;
  305. unsigned int hfreq_est;
  306. int vsync_plus_bp, vback_porch;
  307. unsigned int vtotal_lines, vfieldrate_est, hperiod;
  308. unsigned int vfield_rate, vframe_rate;
  309. int left_margin, right_margin;
  310. unsigned int total_active_pixels, ideal_duty_cycle;
  311. unsigned int hblank, total_pixels, pixel_freq;
  312. int hsync, hfront_porch, vodd_front_porch_lines;
  313. unsigned int tmp1, tmp2;
  314. drm_mode = drm_mode_create(dev);
  315. if (!drm_mode)
  316. return NULL;
  317. /* 1. In order to give correct results, the number of horizontal
  318. * pixels requested is first processed to ensure that it is divisible
  319. * by the character size, by rounding it to the nearest character
  320. * cell boundary:
  321. */
  322. hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
  323. hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
  324. /* 2. If interlace is requested, the number of vertical lines assumed
  325. * by the calculation must be halved, as the computation calculates
  326. * the number of vertical lines per field.
  327. */
  328. if (interlaced)
  329. vdisplay_rnd = vdisplay / 2;
  330. else
  331. vdisplay_rnd = vdisplay;
  332. /* 3. Find the frame rate required: */
  333. if (interlaced)
  334. vfieldrate_rqd = vrefresh * 2;
  335. else
  336. vfieldrate_rqd = vrefresh;
  337. /* 4. Find number of lines in Top margin: */
  338. top_margin = 0;
  339. if (margins)
  340. top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
  341. 1000;
  342. /* 5. Find number of lines in bottom margin: */
  343. bottom_margin = top_margin;
  344. /* 6. If interlace is required, then set variable interlace: */
  345. if (interlaced)
  346. interlace = 1;
  347. else
  348. interlace = 0;
  349. /* 7. Estimate the Horizontal frequency */
  350. {
  351. tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
  352. tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
  353. 2 + interlace;
  354. hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
  355. }
  356. /* 8. Find the number of lines in V sync + back porch */
  357. /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
  358. vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
  359. vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
  360. /* 9. Find the number of lines in V back porch alone: */
  361. vback_porch = vsync_plus_bp - V_SYNC_RQD;
  362. /* 10. Find the total number of lines in Vertical field period: */
  363. vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
  364. vsync_plus_bp + GTF_MIN_V_PORCH;
  365. /* 11. Estimate the Vertical field frequency: */
  366. vfieldrate_est = hfreq_est / vtotal_lines;
  367. /* 12. Find the actual horizontal period: */
  368. hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
  369. /* 13. Find the actual Vertical field frequency: */
  370. vfield_rate = hfreq_est / vtotal_lines;
  371. /* 14. Find the Vertical frame frequency: */
  372. if (interlaced)
  373. vframe_rate = vfield_rate / 2;
  374. else
  375. vframe_rate = vfield_rate;
  376. /* 15. Find number of pixels in left margin: */
  377. if (margins)
  378. left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
  379. 1000;
  380. else
  381. left_margin = 0;
  382. /* 16.Find number of pixels in right margin: */
  383. right_margin = left_margin;
  384. /* 17.Find total number of active pixels in image and left and right */
  385. total_active_pixels = hdisplay_rnd + left_margin + right_margin;
  386. /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
  387. ideal_duty_cycle = GTF_C_PRIME * 1000 -
  388. (GTF_M_PRIME * 1000000 / hfreq_est);
  389. /* 19.Find the number of pixels in the blanking time to the nearest
  390. * double character cell: */
  391. hblank = total_active_pixels * ideal_duty_cycle /
  392. (100000 - ideal_duty_cycle);
  393. hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
  394. hblank = hblank * 2 * GTF_CELL_GRAN;
  395. /* 20.Find total number of pixels: */
  396. total_pixels = total_active_pixels + hblank;
  397. /* 21.Find pixel clock frequency: */
  398. pixel_freq = total_pixels * hfreq_est / 1000;
  399. /* Stage 1 computations are now complete; I should really pass
  400. * the results to another function and do the Stage 2 computations,
  401. * but I only need a few more values so I'll just append the
  402. * computations here for now */
  403. /* 17. Find the number of pixels in the horizontal sync period: */
  404. hsync = H_SYNC_PERCENT * total_pixels / 100;
  405. hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
  406. hsync = hsync * GTF_CELL_GRAN;
  407. /* 18. Find the number of pixels in horizontal front porch period */
  408. hfront_porch = hblank / 2 - hsync;
  409. /* 36. Find the number of lines in the odd front porch period: */
  410. vodd_front_porch_lines = GTF_MIN_V_PORCH ;
  411. /* finally, pack the results in the mode struct */
  412. drm_mode->hdisplay = hdisplay_rnd;
  413. drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
  414. drm_mode->hsync_end = drm_mode->hsync_start + hsync;
  415. drm_mode->htotal = total_pixels;
  416. drm_mode->vdisplay = vdisplay_rnd;
  417. drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
  418. drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
  419. drm_mode->vtotal = vtotal_lines;
  420. drm_mode->clock = pixel_freq;
  421. if (interlaced) {
  422. drm_mode->vtotal *= 2;
  423. drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
  424. }
  425. drm_mode_set_name(drm_mode);
  426. if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
  427. drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
  428. else
  429. drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
  430. return drm_mode;
  431. }
  432. EXPORT_SYMBOL(drm_gtf_mode_complex);
  433. /**
  434. * drm_gtf_mode - create the modeline based on GTF algorithm
  435. *
  436. * @dev :drm device
  437. * @hdisplay :hdisplay size
  438. * @vdisplay :vdisplay size
  439. * @vrefresh :vrefresh rate.
  440. * @interlaced :whether the interlace is supported
  441. * @margins :whether the margin is supported
  442. *
  443. * LOCKING.
  444. * none.
  445. *
  446. * return the modeline based on GTF algorithm
  447. *
  448. * This function is to create the modeline based on the GTF algorithm.
  449. * Generalized Timing Formula is derived from:
  450. * GTF Spreadsheet by Andy Morrish (1/5/97)
  451. * available at http://www.vesa.org
  452. *
  453. * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
  454. * What I have done is to translate it by using integer calculation.
  455. * I also refer to the function of fb_get_mode in the file of
  456. * drivers/video/fbmon.c
  457. *
  458. * Standard GTF parameters:
  459. * M = 600
  460. * C = 40
  461. * K = 128
  462. * J = 20
  463. */
  464. struct drm_display_mode *
  465. drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
  466. bool lace, int margins)
  467. {
  468. return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
  469. margins, 600, 40 * 2, 128, 20 * 2);
  470. }
  471. EXPORT_SYMBOL(drm_gtf_mode);
  472. /**
  473. * drm_mode_set_name - set the name on a mode
  474. * @mode: name will be set in this mode
  475. *
  476. * LOCKING:
  477. * None.
  478. *
  479. * Set the name of @mode to a standard format.
  480. */
  481. void drm_mode_set_name(struct drm_display_mode *mode)
  482. {
  483. bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
  484. snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
  485. mode->hdisplay, mode->vdisplay,
  486. interlaced ? "i" : "");
  487. }
  488. EXPORT_SYMBOL(drm_mode_set_name);
  489. /**
  490. * drm_mode_list_concat - move modes from one list to another
  491. * @head: source list
  492. * @new: dst list
  493. *
  494. * LOCKING:
  495. * Caller must ensure both lists are locked.
  496. *
  497. * Move all the modes from @head to @new.
  498. */
  499. void drm_mode_list_concat(struct list_head *head, struct list_head *new)
  500. {
  501. struct list_head *entry, *tmp;
  502. list_for_each_safe(entry, tmp, head) {
  503. list_move_tail(entry, new);
  504. }
  505. }
  506. EXPORT_SYMBOL(drm_mode_list_concat);
  507. /**
  508. * drm_mode_width - get the width of a mode
  509. * @mode: mode
  510. *
  511. * LOCKING:
  512. * None.
  513. *
  514. * Return @mode's width (hdisplay) value.
  515. *
  516. * FIXME: is this needed?
  517. *
  518. * RETURNS:
  519. * @mode->hdisplay
  520. */
  521. int drm_mode_width(struct drm_display_mode *mode)
  522. {
  523. return mode->hdisplay;
  524. }
  525. EXPORT_SYMBOL(drm_mode_width);
  526. /**
  527. * drm_mode_height - get the height of a mode
  528. * @mode: mode
  529. *
  530. * LOCKING:
  531. * None.
  532. *
  533. * Return @mode's height (vdisplay) value.
  534. *
  535. * FIXME: is this needed?
  536. *
  537. * RETURNS:
  538. * @mode->vdisplay
  539. */
  540. int drm_mode_height(struct drm_display_mode *mode)
  541. {
  542. return mode->vdisplay;
  543. }
  544. EXPORT_SYMBOL(drm_mode_height);
  545. /** drm_mode_hsync - get the hsync of a mode
  546. * @mode: mode
  547. *
  548. * LOCKING:
  549. * None.
  550. *
  551. * Return @modes's hsync rate in kHz, rounded to the nearest int.
  552. */
  553. int drm_mode_hsync(const struct drm_display_mode *mode)
  554. {
  555. unsigned int calc_val;
  556. if (mode->hsync)
  557. return mode->hsync;
  558. if (mode->htotal < 0)
  559. return 0;
  560. calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
  561. calc_val += 500; /* round to 1000Hz */
  562. calc_val /= 1000; /* truncate to kHz */
  563. return calc_val;
  564. }
  565. EXPORT_SYMBOL(drm_mode_hsync);
  566. /**
  567. * drm_mode_vrefresh - get the vrefresh of a mode
  568. * @mode: mode
  569. *
  570. * LOCKING:
  571. * None.
  572. *
  573. * Return @mode's vrefresh rate in Hz or calculate it if necessary.
  574. *
  575. * FIXME: why is this needed? shouldn't vrefresh be set already?
  576. *
  577. * RETURNS:
  578. * Vertical refresh rate. It will be the result of actual value plus 0.5.
  579. * If it is 70.288, it will return 70Hz.
  580. * If it is 59.6, it will return 60Hz.
  581. */
  582. int drm_mode_vrefresh(const struct drm_display_mode *mode)
  583. {
  584. int refresh = 0;
  585. unsigned int calc_val;
  586. if (mode->vrefresh > 0)
  587. refresh = mode->vrefresh;
  588. else if (mode->htotal > 0 && mode->vtotal > 0) {
  589. int vtotal;
  590. vtotal = mode->vtotal;
  591. /* work out vrefresh the value will be x1000 */
  592. calc_val = (mode->clock * 1000);
  593. calc_val /= mode->htotal;
  594. refresh = (calc_val + vtotal / 2) / vtotal;
  595. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  596. refresh *= 2;
  597. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  598. refresh /= 2;
  599. if (mode->vscan > 1)
  600. refresh /= mode->vscan;
  601. }
  602. return refresh;
  603. }
  604. EXPORT_SYMBOL(drm_mode_vrefresh);
  605. /**
  606. * drm_mode_set_crtcinfo - set CRTC modesetting parameters
  607. * @p: mode
  608. * @adjust_flags: unused? (FIXME)
  609. *
  610. * LOCKING:
  611. * None.
  612. *
  613. * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
  614. */
  615. void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
  616. {
  617. if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
  618. return;
  619. p->crtc_hdisplay = p->hdisplay;
  620. p->crtc_hsync_start = p->hsync_start;
  621. p->crtc_hsync_end = p->hsync_end;
  622. p->crtc_htotal = p->htotal;
  623. p->crtc_hskew = p->hskew;
  624. p->crtc_vdisplay = p->vdisplay;
  625. p->crtc_vsync_start = p->vsync_start;
  626. p->crtc_vsync_end = p->vsync_end;
  627. p->crtc_vtotal = p->vtotal;
  628. if (p->flags & DRM_MODE_FLAG_INTERLACE) {
  629. if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
  630. p->crtc_vdisplay /= 2;
  631. p->crtc_vsync_start /= 2;
  632. p->crtc_vsync_end /= 2;
  633. p->crtc_vtotal /= 2;
  634. }
  635. p->crtc_vtotal |= 1;
  636. }
  637. if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
  638. p->crtc_vdisplay *= 2;
  639. p->crtc_vsync_start *= 2;
  640. p->crtc_vsync_end *= 2;
  641. p->crtc_vtotal *= 2;
  642. }
  643. if (p->vscan > 1) {
  644. p->crtc_vdisplay *= p->vscan;
  645. p->crtc_vsync_start *= p->vscan;
  646. p->crtc_vsync_end *= p->vscan;
  647. p->crtc_vtotal *= p->vscan;
  648. }
  649. p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
  650. p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
  651. p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
  652. p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
  653. p->crtc_hadjusted = false;
  654. p->crtc_vadjusted = false;
  655. }
  656. EXPORT_SYMBOL(drm_mode_set_crtcinfo);
  657. /**
  658. * drm_mode_duplicate - allocate and duplicate an existing mode
  659. * @m: mode to duplicate
  660. *
  661. * LOCKING:
  662. * None.
  663. *
  664. * Just allocate a new mode, copy the existing mode into it, and return
  665. * a pointer to it. Used to create new instances of established modes.
  666. */
  667. struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
  668. const struct drm_display_mode *mode)
  669. {
  670. struct drm_display_mode *nmode;
  671. int new_id;
  672. nmode = drm_mode_create(dev);
  673. if (!nmode)
  674. return NULL;
  675. new_id = nmode->base.id;
  676. *nmode = *mode;
  677. nmode->base.id = new_id;
  678. INIT_LIST_HEAD(&nmode->head);
  679. return nmode;
  680. }
  681. EXPORT_SYMBOL(drm_mode_duplicate);
  682. /**
  683. * drm_mode_equal - test modes for equality
  684. * @mode1: first mode
  685. * @mode2: second mode
  686. *
  687. * LOCKING:
  688. * None.
  689. *
  690. * Check to see if @mode1 and @mode2 are equivalent.
  691. *
  692. * RETURNS:
  693. * True if the modes are equal, false otherwise.
  694. */
  695. bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
  696. {
  697. /* do clock check convert to PICOS so fb modes get matched
  698. * the same */
  699. if (mode1->clock && mode2->clock) {
  700. if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
  701. return false;
  702. } else if (mode1->clock != mode2->clock)
  703. return false;
  704. if (mode1->hdisplay == mode2->hdisplay &&
  705. mode1->hsync_start == mode2->hsync_start &&
  706. mode1->hsync_end == mode2->hsync_end &&
  707. mode1->htotal == mode2->htotal &&
  708. mode1->hskew == mode2->hskew &&
  709. mode1->vdisplay == mode2->vdisplay &&
  710. mode1->vsync_start == mode2->vsync_start &&
  711. mode1->vsync_end == mode2->vsync_end &&
  712. mode1->vtotal == mode2->vtotal &&
  713. mode1->vscan == mode2->vscan &&
  714. mode1->flags == mode2->flags)
  715. return true;
  716. return false;
  717. }
  718. EXPORT_SYMBOL(drm_mode_equal);
  719. /**
  720. * drm_mode_validate_size - make sure modes adhere to size constraints
  721. * @dev: DRM device
  722. * @mode_list: list of modes to check
  723. * @maxX: maximum width
  724. * @maxY: maximum height
  725. * @maxPitch: max pitch
  726. *
  727. * LOCKING:
  728. * Caller must hold a lock protecting @mode_list.
  729. *
  730. * The DRM device (@dev) has size and pitch limits. Here we validate the
  731. * modes we probed for @dev against those limits and set their status as
  732. * necessary.
  733. */
  734. void drm_mode_validate_size(struct drm_device *dev,
  735. struct list_head *mode_list,
  736. int maxX, int maxY, int maxPitch)
  737. {
  738. struct drm_display_mode *mode;
  739. list_for_each_entry(mode, mode_list, head) {
  740. if (maxPitch > 0 && mode->hdisplay > maxPitch)
  741. mode->status = MODE_BAD_WIDTH;
  742. if (maxX > 0 && mode->hdisplay > maxX)
  743. mode->status = MODE_VIRTUAL_X;
  744. if (maxY > 0 && mode->vdisplay > maxY)
  745. mode->status = MODE_VIRTUAL_Y;
  746. }
  747. }
  748. EXPORT_SYMBOL(drm_mode_validate_size);
  749. /**
  750. * drm_mode_validate_clocks - validate modes against clock limits
  751. * @dev: DRM device
  752. * @mode_list: list of modes to check
  753. * @min: minimum clock rate array
  754. * @max: maximum clock rate array
  755. * @n_ranges: number of clock ranges (size of arrays)
  756. *
  757. * LOCKING:
  758. * Caller must hold a lock protecting @mode_list.
  759. *
  760. * Some code may need to check a mode list against the clock limits of the
  761. * device in question. This function walks the mode list, testing to make
  762. * sure each mode falls within a given range (defined by @min and @max
  763. * arrays) and sets @mode->status as needed.
  764. */
  765. void drm_mode_validate_clocks(struct drm_device *dev,
  766. struct list_head *mode_list,
  767. int *min, int *max, int n_ranges)
  768. {
  769. struct drm_display_mode *mode;
  770. int i;
  771. list_for_each_entry(mode, mode_list, head) {
  772. bool good = false;
  773. for (i = 0; i < n_ranges; i++) {
  774. if (mode->clock >= min[i] && mode->clock <= max[i]) {
  775. good = true;
  776. break;
  777. }
  778. }
  779. if (!good)
  780. mode->status = MODE_CLOCK_RANGE;
  781. }
  782. }
  783. EXPORT_SYMBOL(drm_mode_validate_clocks);
  784. /**
  785. * drm_mode_prune_invalid - remove invalid modes from mode list
  786. * @dev: DRM device
  787. * @mode_list: list of modes to check
  788. * @verbose: be verbose about it
  789. *
  790. * LOCKING:
  791. * Caller must hold a lock protecting @mode_list.
  792. *
  793. * Once mode list generation is complete, a caller can use this routine to
  794. * remove invalid modes from a mode list. If any of the modes have a
  795. * status other than %MODE_OK, they are removed from @mode_list and freed.
  796. */
  797. void drm_mode_prune_invalid(struct drm_device *dev,
  798. struct list_head *mode_list, bool verbose)
  799. {
  800. struct drm_display_mode *mode, *t;
  801. list_for_each_entry_safe(mode, t, mode_list, head) {
  802. if (mode->status != MODE_OK) {
  803. list_del(&mode->head);
  804. if (verbose) {
  805. drm_mode_debug_printmodeline(mode);
  806. DRM_DEBUG_KMS("Not using %s mode %d\n",
  807. mode->name, mode->status);
  808. }
  809. drm_mode_destroy(dev, mode);
  810. }
  811. }
  812. }
  813. EXPORT_SYMBOL(drm_mode_prune_invalid);
  814. /**
  815. * drm_mode_compare - compare modes for favorability
  816. * @priv: unused
  817. * @lh_a: list_head for first mode
  818. * @lh_b: list_head for second mode
  819. *
  820. * LOCKING:
  821. * None.
  822. *
  823. * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
  824. * which is better.
  825. *
  826. * RETURNS:
  827. * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
  828. * positive if @lh_b is better than @lh_a.
  829. */
  830. static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
  831. {
  832. struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
  833. struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
  834. int diff;
  835. diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
  836. ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
  837. if (diff)
  838. return diff;
  839. diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
  840. if (diff)
  841. return diff;
  842. diff = b->clock - a->clock;
  843. return diff;
  844. }
  845. /**
  846. * drm_mode_sort - sort mode list
  847. * @mode_list: list to sort
  848. *
  849. * LOCKING:
  850. * Caller must hold a lock protecting @mode_list.
  851. *
  852. * Sort @mode_list by favorability, putting good modes first.
  853. */
  854. void drm_mode_sort(struct list_head *mode_list)
  855. {
  856. list_sort(NULL, mode_list, drm_mode_compare);
  857. }
  858. EXPORT_SYMBOL(drm_mode_sort);
  859. /**
  860. * drm_mode_connector_list_update - update the mode list for the connector
  861. * @connector: the connector to update
  862. *
  863. * LOCKING:
  864. * Caller must hold a lock protecting @mode_list.
  865. *
  866. * This moves the modes from the @connector probed_modes list
  867. * to the actual mode list. It compares the probed mode against the current
  868. * list and only adds different modes. All modes unverified after this point
  869. * will be removed by the prune invalid modes.
  870. */
  871. void drm_mode_connector_list_update(struct drm_connector *connector)
  872. {
  873. struct drm_display_mode *mode;
  874. struct drm_display_mode *pmode, *pt;
  875. int found_it;
  876. list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
  877. head) {
  878. found_it = 0;
  879. /* go through current modes checking for the new probed mode */
  880. list_for_each_entry(mode, &connector->modes, head) {
  881. if (drm_mode_equal(pmode, mode)) {
  882. found_it = 1;
  883. /* if equal delete the probed mode */
  884. mode->status = pmode->status;
  885. /* Merge type bits together */
  886. mode->type |= pmode->type;
  887. list_del(&pmode->head);
  888. drm_mode_destroy(connector->dev, pmode);
  889. break;
  890. }
  891. }
  892. if (!found_it) {
  893. list_move_tail(&pmode->head, &connector->modes);
  894. }
  895. }
  896. }
  897. EXPORT_SYMBOL(drm_mode_connector_list_update);
  898. /**
  899. * drm_mode_parse_command_line_for_connector - parse command line for connector
  900. * @mode_option - per connector mode option
  901. * @connector - connector to parse line for
  902. *
  903. * This parses the connector specific then generic command lines for
  904. * modes and options to configure the connector.
  905. *
  906. * This uses the same parameters as the fb modedb.c, except for extra
  907. * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
  908. *
  909. * enable/enable Digital/disable bit at the end
  910. */
  911. bool drm_mode_parse_command_line_for_connector(const char *mode_option,
  912. struct drm_connector *connector,
  913. struct drm_cmdline_mode *mode)
  914. {
  915. const char *name;
  916. unsigned int namelen;
  917. int res_specified = 0, bpp_specified = 0, refresh_specified = 0;
  918. unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
  919. int yres_specified = 0, cvt = 0, rb = 0, interlace = 0, margins = 0;
  920. int i;
  921. enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
  922. #ifdef CONFIG_FB
  923. if (!mode_option)
  924. mode_option = fb_mode_option;
  925. #endif
  926. if (!mode_option) {
  927. mode->specified = false;
  928. return false;
  929. }
  930. name = mode_option;
  931. namelen = strlen(name);
  932. for (i = namelen-1; i >= 0; i--) {
  933. switch (name[i]) {
  934. case '@':
  935. namelen = i;
  936. if (!refresh_specified && !bpp_specified &&
  937. !yres_specified) {
  938. refresh = simple_strtol(&name[i+1], NULL, 10);
  939. refresh_specified = 1;
  940. if (cvt || rb)
  941. cvt = 0;
  942. } else
  943. goto done;
  944. break;
  945. case '-':
  946. namelen = i;
  947. if (!bpp_specified && !yres_specified) {
  948. bpp = simple_strtol(&name[i+1], NULL, 10);
  949. bpp_specified = 1;
  950. if (cvt || rb)
  951. cvt = 0;
  952. } else
  953. goto done;
  954. break;
  955. case 'x':
  956. if (!yres_specified) {
  957. yres = simple_strtol(&name[i+1], NULL, 10);
  958. yres_specified = 1;
  959. } else
  960. goto done;
  961. case '0' ... '9':
  962. break;
  963. case 'M':
  964. if (!yres_specified)
  965. cvt = 1;
  966. break;
  967. case 'R':
  968. if (cvt)
  969. rb = 1;
  970. break;
  971. case 'm':
  972. if (!cvt)
  973. margins = 1;
  974. break;
  975. case 'i':
  976. if (!cvt)
  977. interlace = 1;
  978. break;
  979. case 'e':
  980. force = DRM_FORCE_ON;
  981. break;
  982. case 'D':
  983. if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
  984. (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
  985. force = DRM_FORCE_ON;
  986. else
  987. force = DRM_FORCE_ON_DIGITAL;
  988. break;
  989. case 'd':
  990. force = DRM_FORCE_OFF;
  991. break;
  992. default:
  993. goto done;
  994. }
  995. }
  996. if (i < 0 && yres_specified) {
  997. xres = simple_strtol(name, NULL, 10);
  998. res_specified = 1;
  999. }
  1000. done:
  1001. if (res_specified) {
  1002. mode->specified = true;
  1003. mode->xres = xres;
  1004. mode->yres = yres;
  1005. }
  1006. if (refresh_specified) {
  1007. mode->refresh_specified = true;
  1008. mode->refresh = refresh;
  1009. }
  1010. if (bpp_specified) {
  1011. mode->bpp_specified = true;
  1012. mode->bpp = bpp;
  1013. }
  1014. mode->rb = rb ? true : false;
  1015. mode->cvt = cvt ? true : false;
  1016. mode->interlace = interlace ? true : false;
  1017. mode->force = force;
  1018. return true;
  1019. }
  1020. EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
  1021. struct drm_display_mode *
  1022. drm_mode_create_from_cmdline_mode(struct drm_device *dev,
  1023. struct drm_cmdline_mode *cmd)
  1024. {
  1025. struct drm_display_mode *mode;
  1026. if (cmd->cvt)
  1027. mode = drm_cvt_mode(dev,
  1028. cmd->xres, cmd->yres,
  1029. cmd->refresh_specified ? cmd->refresh : 60,
  1030. cmd->rb, cmd->interlace,
  1031. cmd->margins);
  1032. else
  1033. mode = drm_gtf_mode(dev,
  1034. cmd->xres, cmd->yres,
  1035. cmd->refresh_specified ? cmd->refresh : 60,
  1036. cmd->interlace,
  1037. cmd->margins);
  1038. if (!mode)
  1039. return NULL;
  1040. drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
  1041. return mode;
  1042. }
  1043. EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);