vx855_gpio.c 8.5 KB

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  1. /*
  2. * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
  3. *
  4. * Copyright (C) 2009 VIA Technologies, Inc.
  5. * Copyright (C) 2010 One Laptop per Child
  6. * Author: Harald Welte <HaraldWelte@viatech.com>
  7. * All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/gpio.h>
  28. #include <linux/slab.h>
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/pci.h>
  32. #include <linux/io.h>
  33. #define MODULE_NAME "vx855_gpio"
  34. /* The VX855 south bridge has the following GPIO pins:
  35. * GPI 0...13 General Purpose Input
  36. * GPO 0...12 General Purpose Output
  37. * GPIO 0...14 General Purpose I/O (Open-Drain)
  38. */
  39. #define NR_VX855_GPI 14
  40. #define NR_VX855_GPO 13
  41. #define NR_VX855_GPIO 15
  42. #define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
  43. #define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
  44. struct vx855_gpio {
  45. struct gpio_chip gpio;
  46. spinlock_t lock;
  47. u32 io_gpi;
  48. u32 io_gpo;
  49. bool gpi_reserved;
  50. bool gpo_reserved;
  51. };
  52. /* resolve a GPIx into the corresponding bit position */
  53. static inline u_int32_t gpi_i_bit(int i)
  54. {
  55. if (i < 10)
  56. return 1 << i;
  57. else
  58. return 1 << (i + 14);
  59. }
  60. static inline u_int32_t gpo_o_bit(int i)
  61. {
  62. if (i < 11)
  63. return 1 << i;
  64. else
  65. return 1 << (i + 14);
  66. }
  67. static inline u_int32_t gpio_i_bit(int i)
  68. {
  69. if (i < 14)
  70. return 1 << (i + 10);
  71. else
  72. return 1 << (i + 14);
  73. }
  74. static inline u_int32_t gpio_o_bit(int i)
  75. {
  76. if (i < 14)
  77. return 1 << (i + 11);
  78. else
  79. return 1 << (i + 13);
  80. }
  81. /* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
  82. * 0..13 GPI 0..13
  83. * 14..26 GPO 0..12
  84. * 27..41 GPIO 0..14
  85. */
  86. static int vx855gpio_direction_input(struct gpio_chip *gpio,
  87. unsigned int nr)
  88. {
  89. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  90. unsigned long flags;
  91. u_int32_t reg_out;
  92. /* Real GPI bits are always in input direction */
  93. if (nr < NR_VX855_GPI)
  94. return 0;
  95. /* Real GPO bits cannot be put in output direction */
  96. if (nr < NR_VX855_GPInO)
  97. return -EINVAL;
  98. /* Open Drain GPIO have to be set to one */
  99. spin_lock_irqsave(&vg->lock, flags);
  100. reg_out = inl(vg->io_gpo);
  101. reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
  102. outl(reg_out, vg->io_gpo);
  103. spin_unlock_irqrestore(&vg->lock, flags);
  104. return 0;
  105. }
  106. static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
  107. {
  108. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  109. u_int32_t reg_in;
  110. int ret = 0;
  111. if (nr < NR_VX855_GPI) {
  112. reg_in = inl(vg->io_gpi);
  113. if (reg_in & gpi_i_bit(nr))
  114. ret = 1;
  115. } else if (nr < NR_VX855_GPInO) {
  116. /* GPO don't have an input bit, we need to read it
  117. * back from the output register */
  118. reg_in = inl(vg->io_gpo);
  119. if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
  120. ret = 1;
  121. } else {
  122. reg_in = inl(vg->io_gpi);
  123. if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
  124. ret = 1;
  125. }
  126. return ret;
  127. }
  128. static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
  129. int val)
  130. {
  131. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  132. unsigned long flags;
  133. u_int32_t reg_out;
  134. /* True GPI cannot be switched to output mode */
  135. if (nr < NR_VX855_GPI)
  136. return;
  137. spin_lock_irqsave(&vg->lock, flags);
  138. reg_out = inl(vg->io_gpo);
  139. if (nr < NR_VX855_GPInO) {
  140. if (val)
  141. reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
  142. else
  143. reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
  144. } else {
  145. if (val)
  146. reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
  147. else
  148. reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
  149. }
  150. outl(reg_out, vg->io_gpo);
  151. spin_unlock_irqrestore(&vg->lock, flags);
  152. }
  153. static int vx855gpio_direction_output(struct gpio_chip *gpio,
  154. unsigned int nr, int val)
  155. {
  156. /* True GPI cannot be switched to output mode */
  157. if (nr < NR_VX855_GPI)
  158. return -EINVAL;
  159. /* True GPO don't need to be switched to output mode,
  160. * and GPIO are open-drain, i.e. also need no switching,
  161. * so all we do is set the level */
  162. vx855gpio_set(gpio, nr, val);
  163. return 0;
  164. }
  165. static const char *vx855gpio_names[NR_VX855_GP] = {
  166. "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
  167. "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
  168. "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
  169. "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
  170. "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
  171. "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
  172. "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
  173. "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
  174. "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
  175. "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
  176. };
  177. static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
  178. {
  179. struct gpio_chip *c = &vg->gpio;
  180. c->label = "VX855 South Bridge";
  181. c->owner = THIS_MODULE;
  182. c->direction_input = vx855gpio_direction_input;
  183. c->direction_output = vx855gpio_direction_output;
  184. c->get = vx855gpio_get;
  185. c->set = vx855gpio_set;
  186. c->dbg_show = NULL;
  187. c->base = 0;
  188. c->ngpio = NR_VX855_GP;
  189. c->can_sleep = 0;
  190. c->names = vx855gpio_names;
  191. }
  192. /* This platform device is ordinarily registered by the vx855 mfd driver */
  193. static __devinit int vx855gpio_probe(struct platform_device *pdev)
  194. {
  195. struct resource *res_gpi;
  196. struct resource *res_gpo;
  197. struct vx855_gpio *vg;
  198. int ret;
  199. res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
  200. res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
  201. if (!res_gpi || !res_gpo)
  202. return -EBUSY;
  203. vg = kzalloc(sizeof(*vg), GFP_KERNEL);
  204. if (!vg)
  205. return -ENOMEM;
  206. platform_set_drvdata(pdev, vg);
  207. dev_info(&pdev->dev, "found VX855 GPIO controller\n");
  208. vg->io_gpi = res_gpi->start;
  209. vg->io_gpo = res_gpo->start;
  210. spin_lock_init(&vg->lock);
  211. /*
  212. * A single byte is used to control various GPIO ports on the VX855,
  213. * and in the case of the OLPC XO-1.5, some of those ports are used
  214. * for switches that are interpreted and exposed through ACPI. ACPI
  215. * will have reserved the region, so our own reservation will not
  216. * succeed. Ignore and continue.
  217. */
  218. if (!request_region(res_gpi->start, resource_size(res_gpi),
  219. MODULE_NAME "_gpi"))
  220. dev_warn(&pdev->dev,
  221. "GPI I/O resource busy, probably claimed by ACPI\n");
  222. else
  223. vg->gpi_reserved = true;
  224. if (!request_region(res_gpo->start, resource_size(res_gpo),
  225. MODULE_NAME "_gpo"))
  226. dev_warn(&pdev->dev,
  227. "GPO I/O resource busy, probably claimed by ACPI\n");
  228. else
  229. vg->gpo_reserved = true;
  230. vx855gpio_gpio_setup(vg);
  231. ret = gpiochip_add(&vg->gpio);
  232. if (ret) {
  233. dev_err(&pdev->dev, "failed to register GPIOs\n");
  234. goto out_release;
  235. }
  236. return 0;
  237. out_release:
  238. if (vg->gpi_reserved)
  239. release_region(res_gpi->start, resource_size(res_gpi));
  240. if (vg->gpo_reserved)
  241. release_region(res_gpi->start, resource_size(res_gpo));
  242. platform_set_drvdata(pdev, NULL);
  243. kfree(vg);
  244. return ret;
  245. }
  246. static int __devexit vx855gpio_remove(struct platform_device *pdev)
  247. {
  248. struct vx855_gpio *vg = platform_get_drvdata(pdev);
  249. struct resource *res;
  250. if (gpiochip_remove(&vg->gpio))
  251. dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
  252. if (vg->gpi_reserved) {
  253. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  254. release_region(res->start, resource_size(res));
  255. }
  256. if (vg->gpo_reserved) {
  257. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  258. release_region(res->start, resource_size(res));
  259. }
  260. platform_set_drvdata(pdev, NULL);
  261. kfree(vg);
  262. return 0;
  263. }
  264. static struct platform_driver vx855gpio_driver = {
  265. .driver = {
  266. .name = MODULE_NAME,
  267. .owner = THIS_MODULE,
  268. },
  269. .probe = vx855gpio_probe,
  270. .remove = __devexit_p(vx855gpio_remove),
  271. };
  272. static int vx855gpio_init(void)
  273. {
  274. return platform_driver_register(&vx855gpio_driver);
  275. }
  276. module_init(vx855gpio_init);
  277. static void vx855gpio_exit(void)
  278. {
  279. platform_driver_unregister(&vx855gpio_driver);
  280. }
  281. module_exit(vx855gpio_exit);
  282. MODULE_LICENSE("GPL");
  283. MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
  284. MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
  285. MODULE_ALIAS("platform:vx855_gpio");