hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/major.h>
  19. #include <linux/ioport.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/init.h>
  22. #include <linux/poll.h>
  23. #include <linux/mm.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/sysctl.h>
  27. #include <linux/wait.h>
  28. #include <linux/bcd.h>
  29. #include <linux/seq_file.h>
  30. #include <linux/bitops.h>
  31. #include <linux/compat.h>
  32. #include <linux/clocksource.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/slab.h>
  35. #include <linux/io.h>
  36. #include <asm/current.h>
  37. #include <asm/system.h>
  38. #include <asm/irq.h>
  39. #include <asm/div64.h>
  40. #include <linux/acpi.h>
  41. #include <acpi/acpi_bus.h>
  42. #include <linux/hpet.h>
  43. /*
  44. * The High Precision Event Timer driver.
  45. * This driver is closely modelled after the rtc.c driver.
  46. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  47. */
  48. #define HPET_USER_FREQ (64)
  49. #define HPET_DRIFT (500)
  50. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  51. /* WARNING -- don't get confused. These macros are never used
  52. * to write the (single) counter, and rarely to read it.
  53. * They're badly named; to fix, someday.
  54. */
  55. #if BITS_PER_LONG == 64
  56. #define write_counter(V, MC) writeq(V, MC)
  57. #define read_counter(MC) readq(MC)
  58. #else
  59. #define write_counter(V, MC) writel(V, MC)
  60. #define read_counter(MC) readl(MC)
  61. #endif
  62. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  63. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  64. /* This clocksource driver currently only works on ia64 */
  65. #ifdef CONFIG_IA64
  66. static void __iomem *hpet_mctr;
  67. static cycle_t read_hpet(struct clocksource *cs)
  68. {
  69. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  70. }
  71. static struct clocksource clocksource_hpet = {
  72. .name = "hpet",
  73. .rating = 250,
  74. .read = read_hpet,
  75. .mask = CLOCKSOURCE_MASK(64),
  76. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  77. };
  78. static struct clocksource *hpet_clocksource;
  79. #endif
  80. /* A lock for concurrent access by app and isr hpet activity. */
  81. static DEFINE_SPINLOCK(hpet_lock);
  82. #define HPET_DEV_NAME (7)
  83. struct hpet_dev {
  84. struct hpets *hd_hpets;
  85. struct hpet __iomem *hd_hpet;
  86. struct hpet_timer __iomem *hd_timer;
  87. unsigned long hd_ireqfreq;
  88. unsigned long hd_irqdata;
  89. wait_queue_head_t hd_waitqueue;
  90. struct fasync_struct *hd_async_queue;
  91. unsigned int hd_flags;
  92. unsigned int hd_irq;
  93. unsigned int hd_hdwirq;
  94. char hd_name[HPET_DEV_NAME];
  95. };
  96. struct hpets {
  97. struct hpets *hp_next;
  98. struct hpet __iomem *hp_hpet;
  99. unsigned long hp_hpet_phys;
  100. struct clocksource *hp_clocksource;
  101. unsigned long long hp_tick_freq;
  102. unsigned long hp_delta;
  103. unsigned int hp_ntimer;
  104. unsigned int hp_which;
  105. struct hpet_dev hp_dev[1];
  106. };
  107. static struct hpets *hpets;
  108. #define HPET_OPEN 0x0001
  109. #define HPET_IE 0x0002 /* interrupt enabled */
  110. #define HPET_PERIODIC 0x0004
  111. #define HPET_SHARED_IRQ 0x0008
  112. #ifndef readq
  113. static inline unsigned long long readq(void __iomem *addr)
  114. {
  115. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  116. }
  117. #endif
  118. #ifndef writeq
  119. static inline void writeq(unsigned long long v, void __iomem *addr)
  120. {
  121. writel(v & 0xffffffff, addr);
  122. writel(v >> 32, addr + 4);
  123. }
  124. #endif
  125. static irqreturn_t hpet_interrupt(int irq, void *data)
  126. {
  127. struct hpet_dev *devp;
  128. unsigned long isr;
  129. devp = data;
  130. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  131. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  132. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  133. return IRQ_NONE;
  134. spin_lock(&hpet_lock);
  135. devp->hd_irqdata++;
  136. /*
  137. * For non-periodic timers, increment the accumulator.
  138. * This has the effect of treating non-periodic like periodic.
  139. */
  140. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  141. unsigned long m, t, mc, base, k;
  142. struct hpet __iomem *hpet = devp->hd_hpet;
  143. struct hpets *hpetp = devp->hd_hpets;
  144. t = devp->hd_ireqfreq;
  145. m = read_counter(&devp->hd_timer->hpet_compare);
  146. mc = read_counter(&hpet->hpet_mc);
  147. /* The time for the next interrupt would logically be t + m,
  148. * however, if we are very unlucky and the interrupt is delayed
  149. * for longer than t then we will completely miss the next
  150. * interrupt if we set t + m and an application will hang.
  151. * Therefore we need to make a more complex computation assuming
  152. * that there exists a k for which the following is true:
  153. * k * t + base < mc + delta
  154. * (k + 1) * t + base > mc + delta
  155. * where t is the interval in hpet ticks for the given freq,
  156. * base is the theoretical start value 0 < base < t,
  157. * mc is the main counter value at the time of the interrupt,
  158. * delta is the time it takes to write the a value to the
  159. * comparator.
  160. * k may then be computed as (mc - base + delta) / t .
  161. */
  162. base = mc % t;
  163. k = (mc - base + hpetp->hp_delta) / t;
  164. write_counter(t * (k + 1) + base,
  165. &devp->hd_timer->hpet_compare);
  166. }
  167. if (devp->hd_flags & HPET_SHARED_IRQ)
  168. writel(isr, &devp->hd_hpet->hpet_isr);
  169. spin_unlock(&hpet_lock);
  170. wake_up_interruptible(&devp->hd_waitqueue);
  171. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  172. return IRQ_HANDLED;
  173. }
  174. static void hpet_timer_set_irq(struct hpet_dev *devp)
  175. {
  176. unsigned long v;
  177. int irq, gsi;
  178. struct hpet_timer __iomem *timer;
  179. spin_lock_irq(&hpet_lock);
  180. if (devp->hd_hdwirq) {
  181. spin_unlock_irq(&hpet_lock);
  182. return;
  183. }
  184. timer = devp->hd_timer;
  185. /* we prefer level triggered mode */
  186. v = readl(&timer->hpet_config);
  187. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  188. v |= Tn_INT_TYPE_CNF_MASK;
  189. writel(v, &timer->hpet_config);
  190. }
  191. spin_unlock_irq(&hpet_lock);
  192. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  193. Tn_INT_ROUTE_CAP_SHIFT;
  194. /*
  195. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  196. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  197. */
  198. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  199. v &= ~0xf3df;
  200. else
  201. v &= ~0xffff;
  202. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  203. if (irq >= nr_irqs) {
  204. irq = HPET_MAX_IRQ;
  205. break;
  206. }
  207. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  208. ACPI_ACTIVE_LOW);
  209. if (gsi > 0)
  210. break;
  211. /* FIXME: Setup interrupt source table */
  212. }
  213. if (irq < HPET_MAX_IRQ) {
  214. spin_lock_irq(&hpet_lock);
  215. v = readl(&timer->hpet_config);
  216. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  217. writel(v, &timer->hpet_config);
  218. devp->hd_hdwirq = gsi;
  219. spin_unlock_irq(&hpet_lock);
  220. }
  221. return;
  222. }
  223. static int hpet_open(struct inode *inode, struct file *file)
  224. {
  225. struct hpet_dev *devp;
  226. struct hpets *hpetp;
  227. int i;
  228. if (file->f_mode & FMODE_WRITE)
  229. return -EINVAL;
  230. mutex_lock(&hpet_mutex);
  231. spin_lock_irq(&hpet_lock);
  232. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  233. for (i = 0; i < hpetp->hp_ntimer; i++)
  234. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  235. continue;
  236. else {
  237. devp = &hpetp->hp_dev[i];
  238. break;
  239. }
  240. if (!devp) {
  241. spin_unlock_irq(&hpet_lock);
  242. mutex_unlock(&hpet_mutex);
  243. return -EBUSY;
  244. }
  245. file->private_data = devp;
  246. devp->hd_irqdata = 0;
  247. devp->hd_flags |= HPET_OPEN;
  248. spin_unlock_irq(&hpet_lock);
  249. mutex_unlock(&hpet_mutex);
  250. hpet_timer_set_irq(devp);
  251. return 0;
  252. }
  253. static ssize_t
  254. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  255. {
  256. DECLARE_WAITQUEUE(wait, current);
  257. unsigned long data;
  258. ssize_t retval;
  259. struct hpet_dev *devp;
  260. devp = file->private_data;
  261. if (!devp->hd_ireqfreq)
  262. return -EIO;
  263. if (count < sizeof(unsigned long))
  264. return -EINVAL;
  265. add_wait_queue(&devp->hd_waitqueue, &wait);
  266. for ( ; ; ) {
  267. set_current_state(TASK_INTERRUPTIBLE);
  268. spin_lock_irq(&hpet_lock);
  269. data = devp->hd_irqdata;
  270. devp->hd_irqdata = 0;
  271. spin_unlock_irq(&hpet_lock);
  272. if (data)
  273. break;
  274. else if (file->f_flags & O_NONBLOCK) {
  275. retval = -EAGAIN;
  276. goto out;
  277. } else if (signal_pending(current)) {
  278. retval = -ERESTARTSYS;
  279. goto out;
  280. }
  281. schedule();
  282. }
  283. retval = put_user(data, (unsigned long __user *)buf);
  284. if (!retval)
  285. retval = sizeof(unsigned long);
  286. out:
  287. __set_current_state(TASK_RUNNING);
  288. remove_wait_queue(&devp->hd_waitqueue, &wait);
  289. return retval;
  290. }
  291. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  292. {
  293. unsigned long v;
  294. struct hpet_dev *devp;
  295. devp = file->private_data;
  296. if (!devp->hd_ireqfreq)
  297. return 0;
  298. poll_wait(file, &devp->hd_waitqueue, wait);
  299. spin_lock_irq(&hpet_lock);
  300. v = devp->hd_irqdata;
  301. spin_unlock_irq(&hpet_lock);
  302. if (v != 0)
  303. return POLLIN | POLLRDNORM;
  304. return 0;
  305. }
  306. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  307. {
  308. #ifdef CONFIG_HPET_MMAP
  309. struct hpet_dev *devp;
  310. unsigned long addr;
  311. if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
  312. return -EINVAL;
  313. devp = file->private_data;
  314. addr = devp->hd_hpets->hp_hpet_phys;
  315. if (addr & (PAGE_SIZE - 1))
  316. return -ENOSYS;
  317. vma->vm_flags |= VM_IO;
  318. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  319. if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
  320. PAGE_SIZE, vma->vm_page_prot)) {
  321. printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
  322. __func__);
  323. return -EAGAIN;
  324. }
  325. return 0;
  326. #else
  327. return -ENOSYS;
  328. #endif
  329. }
  330. static int hpet_fasync(int fd, struct file *file, int on)
  331. {
  332. struct hpet_dev *devp;
  333. devp = file->private_data;
  334. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  335. return 0;
  336. else
  337. return -EIO;
  338. }
  339. static int hpet_release(struct inode *inode, struct file *file)
  340. {
  341. struct hpet_dev *devp;
  342. struct hpet_timer __iomem *timer;
  343. int irq = 0;
  344. devp = file->private_data;
  345. timer = devp->hd_timer;
  346. spin_lock_irq(&hpet_lock);
  347. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  348. &timer->hpet_config);
  349. irq = devp->hd_irq;
  350. devp->hd_irq = 0;
  351. devp->hd_ireqfreq = 0;
  352. if (devp->hd_flags & HPET_PERIODIC
  353. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  354. unsigned long v;
  355. v = readq(&timer->hpet_config);
  356. v ^= Tn_TYPE_CNF_MASK;
  357. writeq(v, &timer->hpet_config);
  358. }
  359. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  360. spin_unlock_irq(&hpet_lock);
  361. if (irq)
  362. free_irq(irq, devp);
  363. file->private_data = NULL;
  364. return 0;
  365. }
  366. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  367. {
  368. struct hpet_timer __iomem *timer;
  369. struct hpet __iomem *hpet;
  370. struct hpets *hpetp;
  371. int irq;
  372. unsigned long g, v, t, m;
  373. unsigned long flags, isr;
  374. timer = devp->hd_timer;
  375. hpet = devp->hd_hpet;
  376. hpetp = devp->hd_hpets;
  377. if (!devp->hd_ireqfreq)
  378. return -EIO;
  379. spin_lock_irq(&hpet_lock);
  380. if (devp->hd_flags & HPET_IE) {
  381. spin_unlock_irq(&hpet_lock);
  382. return -EBUSY;
  383. }
  384. devp->hd_flags |= HPET_IE;
  385. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  386. devp->hd_flags |= HPET_SHARED_IRQ;
  387. spin_unlock_irq(&hpet_lock);
  388. irq = devp->hd_hdwirq;
  389. if (irq) {
  390. unsigned long irq_flags;
  391. if (devp->hd_flags & HPET_SHARED_IRQ) {
  392. /*
  393. * To prevent the interrupt handler from seeing an
  394. * unwanted interrupt status bit, program the timer
  395. * so that it will not fire in the near future ...
  396. */
  397. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  398. &timer->hpet_config);
  399. write_counter(read_counter(&hpet->hpet_mc),
  400. &timer->hpet_compare);
  401. /* ... and clear any left-over status. */
  402. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  403. writel(isr, &hpet->hpet_isr);
  404. }
  405. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  406. irq_flags = devp->hd_flags & HPET_SHARED_IRQ
  407. ? IRQF_SHARED : IRQF_DISABLED;
  408. if (request_irq(irq, hpet_interrupt, irq_flags,
  409. devp->hd_name, (void *)devp)) {
  410. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  411. irq = 0;
  412. }
  413. }
  414. if (irq == 0) {
  415. spin_lock_irq(&hpet_lock);
  416. devp->hd_flags ^= HPET_IE;
  417. spin_unlock_irq(&hpet_lock);
  418. return -EIO;
  419. }
  420. devp->hd_irq = irq;
  421. t = devp->hd_ireqfreq;
  422. v = readq(&timer->hpet_config);
  423. /* 64-bit comparators are not yet supported through the ioctls,
  424. * so force this into 32-bit mode if it supports both modes
  425. */
  426. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  427. if (devp->hd_flags & HPET_PERIODIC) {
  428. g |= Tn_TYPE_CNF_MASK;
  429. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  430. writeq(v, &timer->hpet_config);
  431. local_irq_save(flags);
  432. /*
  433. * NOTE: First we modify the hidden accumulator
  434. * register supported by periodic-capable comparators.
  435. * We never want to modify the (single) counter; that
  436. * would affect all the comparators. The value written
  437. * is the counter value when the first interrupt is due.
  438. */
  439. m = read_counter(&hpet->hpet_mc);
  440. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  441. /*
  442. * Then we modify the comparator, indicating the period
  443. * for subsequent interrupt.
  444. */
  445. write_counter(t, &timer->hpet_compare);
  446. } else {
  447. local_irq_save(flags);
  448. m = read_counter(&hpet->hpet_mc);
  449. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  450. }
  451. if (devp->hd_flags & HPET_SHARED_IRQ) {
  452. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  453. writel(isr, &hpet->hpet_isr);
  454. }
  455. writeq(g, &timer->hpet_config);
  456. local_irq_restore(flags);
  457. return 0;
  458. }
  459. /* converts Hz to number of timer ticks */
  460. static inline unsigned long hpet_time_div(struct hpets *hpets,
  461. unsigned long dis)
  462. {
  463. unsigned long long m;
  464. m = hpets->hp_tick_freq + (dis >> 1);
  465. do_div(m, dis);
  466. return (unsigned long)m;
  467. }
  468. static int
  469. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  470. struct hpet_info *info)
  471. {
  472. struct hpet_timer __iomem *timer;
  473. struct hpet __iomem *hpet;
  474. struct hpets *hpetp;
  475. int err;
  476. unsigned long v;
  477. switch (cmd) {
  478. case HPET_IE_OFF:
  479. case HPET_INFO:
  480. case HPET_EPI:
  481. case HPET_DPI:
  482. case HPET_IRQFREQ:
  483. timer = devp->hd_timer;
  484. hpet = devp->hd_hpet;
  485. hpetp = devp->hd_hpets;
  486. break;
  487. case HPET_IE_ON:
  488. return hpet_ioctl_ieon(devp);
  489. default:
  490. return -EINVAL;
  491. }
  492. err = 0;
  493. switch (cmd) {
  494. case HPET_IE_OFF:
  495. if ((devp->hd_flags & HPET_IE) == 0)
  496. break;
  497. v = readq(&timer->hpet_config);
  498. v &= ~Tn_INT_ENB_CNF_MASK;
  499. writeq(v, &timer->hpet_config);
  500. if (devp->hd_irq) {
  501. free_irq(devp->hd_irq, devp);
  502. devp->hd_irq = 0;
  503. }
  504. devp->hd_flags ^= HPET_IE;
  505. break;
  506. case HPET_INFO:
  507. {
  508. memset(info, 0, sizeof(*info));
  509. if (devp->hd_ireqfreq)
  510. info->hi_ireqfreq =
  511. hpet_time_div(hpetp, devp->hd_ireqfreq);
  512. info->hi_flags =
  513. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  514. info->hi_hpet = hpetp->hp_which;
  515. info->hi_timer = devp - hpetp->hp_dev;
  516. break;
  517. }
  518. case HPET_EPI:
  519. v = readq(&timer->hpet_config);
  520. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  521. err = -ENXIO;
  522. break;
  523. }
  524. devp->hd_flags |= HPET_PERIODIC;
  525. break;
  526. case HPET_DPI:
  527. v = readq(&timer->hpet_config);
  528. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  529. err = -ENXIO;
  530. break;
  531. }
  532. if (devp->hd_flags & HPET_PERIODIC &&
  533. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  534. v = readq(&timer->hpet_config);
  535. v ^= Tn_TYPE_CNF_MASK;
  536. writeq(v, &timer->hpet_config);
  537. }
  538. devp->hd_flags &= ~HPET_PERIODIC;
  539. break;
  540. case HPET_IRQFREQ:
  541. if ((arg > hpet_max_freq) &&
  542. !capable(CAP_SYS_RESOURCE)) {
  543. err = -EACCES;
  544. break;
  545. }
  546. if (!arg) {
  547. err = -EINVAL;
  548. break;
  549. }
  550. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  551. }
  552. return err;
  553. }
  554. static long
  555. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  556. {
  557. struct hpet_info info;
  558. int err;
  559. mutex_lock(&hpet_mutex);
  560. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  561. mutex_unlock(&hpet_mutex);
  562. if ((cmd == HPET_INFO) && !err &&
  563. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  564. err = -EFAULT;
  565. return err;
  566. }
  567. #ifdef CONFIG_COMPAT
  568. struct compat_hpet_info {
  569. compat_ulong_t hi_ireqfreq; /* Hz */
  570. compat_ulong_t hi_flags; /* information */
  571. unsigned short hi_hpet;
  572. unsigned short hi_timer;
  573. };
  574. static long
  575. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  576. {
  577. struct hpet_info info;
  578. int err;
  579. mutex_lock(&hpet_mutex);
  580. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  581. mutex_unlock(&hpet_mutex);
  582. if ((cmd == HPET_INFO) && !err) {
  583. struct compat_hpet_info __user *u = compat_ptr(arg);
  584. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  585. put_user(info.hi_flags, &u->hi_flags) ||
  586. put_user(info.hi_hpet, &u->hi_hpet) ||
  587. put_user(info.hi_timer, &u->hi_timer))
  588. err = -EFAULT;
  589. }
  590. return err;
  591. }
  592. #endif
  593. static const struct file_operations hpet_fops = {
  594. .owner = THIS_MODULE,
  595. .llseek = no_llseek,
  596. .read = hpet_read,
  597. .poll = hpet_poll,
  598. .unlocked_ioctl = hpet_ioctl,
  599. #ifdef CONFIG_COMPAT
  600. .compat_ioctl = hpet_compat_ioctl,
  601. #endif
  602. .open = hpet_open,
  603. .release = hpet_release,
  604. .fasync = hpet_fasync,
  605. .mmap = hpet_mmap,
  606. };
  607. static int hpet_is_known(struct hpet_data *hdp)
  608. {
  609. struct hpets *hpetp;
  610. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  611. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  612. return 1;
  613. return 0;
  614. }
  615. static ctl_table hpet_table[] = {
  616. {
  617. .procname = "max-user-freq",
  618. .data = &hpet_max_freq,
  619. .maxlen = sizeof(int),
  620. .mode = 0644,
  621. .proc_handler = proc_dointvec,
  622. },
  623. {}
  624. };
  625. static ctl_table hpet_root[] = {
  626. {
  627. .procname = "hpet",
  628. .maxlen = 0,
  629. .mode = 0555,
  630. .child = hpet_table,
  631. },
  632. {}
  633. };
  634. static ctl_table dev_root[] = {
  635. {
  636. .procname = "dev",
  637. .maxlen = 0,
  638. .mode = 0555,
  639. .child = hpet_root,
  640. },
  641. {}
  642. };
  643. static struct ctl_table_header *sysctl_header;
  644. /*
  645. * Adjustment for when arming the timer with
  646. * initial conditions. That is, main counter
  647. * ticks expired before interrupts are enabled.
  648. */
  649. #define TICK_CALIBRATE (1000UL)
  650. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  651. {
  652. struct hpet_timer __iomem *timer = NULL;
  653. unsigned long t, m, count, i, flags, start;
  654. struct hpet_dev *devp;
  655. int j;
  656. struct hpet __iomem *hpet;
  657. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  658. if ((devp->hd_flags & HPET_OPEN) == 0) {
  659. timer = devp->hd_timer;
  660. break;
  661. }
  662. if (!timer)
  663. return 0;
  664. hpet = hpetp->hp_hpet;
  665. t = read_counter(&timer->hpet_compare);
  666. i = 0;
  667. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  668. local_irq_save(flags);
  669. start = read_counter(&hpet->hpet_mc);
  670. do {
  671. m = read_counter(&hpet->hpet_mc);
  672. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  673. } while (i++, (m - start) < count);
  674. local_irq_restore(flags);
  675. return (m - start) / i;
  676. }
  677. static unsigned long hpet_calibrate(struct hpets *hpetp)
  678. {
  679. unsigned long ret = -1;
  680. unsigned long tmp;
  681. /*
  682. * Try to calibrate until return value becomes stable small value.
  683. * If SMI interruption occurs in calibration loop, the return value
  684. * will be big. This avoids its impact.
  685. */
  686. for ( ; ; ) {
  687. tmp = __hpet_calibrate(hpetp);
  688. if (ret <= tmp)
  689. break;
  690. ret = tmp;
  691. }
  692. return ret;
  693. }
  694. int hpet_alloc(struct hpet_data *hdp)
  695. {
  696. u64 cap, mcfg;
  697. struct hpet_dev *devp;
  698. u32 i, ntimer;
  699. struct hpets *hpetp;
  700. size_t siz;
  701. struct hpet __iomem *hpet;
  702. static struct hpets *last;
  703. unsigned long period;
  704. unsigned long long temp;
  705. u32 remainder;
  706. /*
  707. * hpet_alloc can be called by platform dependent code.
  708. * If platform dependent code has allocated the hpet that
  709. * ACPI has also reported, then we catch it here.
  710. */
  711. if (hpet_is_known(hdp)) {
  712. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  713. __func__);
  714. return 0;
  715. }
  716. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  717. sizeof(struct hpet_dev));
  718. hpetp = kzalloc(siz, GFP_KERNEL);
  719. if (!hpetp)
  720. return -ENOMEM;
  721. hpetp->hp_which = hpet_nhpet++;
  722. hpetp->hp_hpet = hdp->hd_address;
  723. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  724. hpetp->hp_ntimer = hdp->hd_nirqs;
  725. for (i = 0; i < hdp->hd_nirqs; i++)
  726. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  727. hpet = hpetp->hp_hpet;
  728. cap = readq(&hpet->hpet_cap);
  729. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  730. if (hpetp->hp_ntimer != ntimer) {
  731. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  732. " with number of timers\n");
  733. kfree(hpetp);
  734. return -ENODEV;
  735. }
  736. if (last)
  737. last->hp_next = hpetp;
  738. else
  739. hpets = hpetp;
  740. last = hpetp;
  741. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  742. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  743. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  744. temp += period >> 1; /* round */
  745. do_div(temp, period);
  746. hpetp->hp_tick_freq = temp; /* ticks per second */
  747. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  748. hpetp->hp_which, hdp->hd_phys_address,
  749. hpetp->hp_ntimer > 1 ? "s" : "");
  750. for (i = 0; i < hpetp->hp_ntimer; i++)
  751. printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  752. printk("\n");
  753. temp = hpetp->hp_tick_freq;
  754. remainder = do_div(temp, 1000000);
  755. printk(KERN_INFO
  756. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  757. hpetp->hp_which, hpetp->hp_ntimer,
  758. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  759. (unsigned) temp, remainder);
  760. mcfg = readq(&hpet->hpet_config);
  761. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  762. write_counter(0L, &hpet->hpet_mc);
  763. mcfg |= HPET_ENABLE_CNF_MASK;
  764. writeq(mcfg, &hpet->hpet_config);
  765. }
  766. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  767. struct hpet_timer __iomem *timer;
  768. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  769. devp->hd_hpets = hpetp;
  770. devp->hd_hpet = hpet;
  771. devp->hd_timer = timer;
  772. /*
  773. * If the timer was reserved by platform code,
  774. * then make timer unavailable for opens.
  775. */
  776. if (hdp->hd_state & (1 << i)) {
  777. devp->hd_flags = HPET_OPEN;
  778. continue;
  779. }
  780. init_waitqueue_head(&devp->hd_waitqueue);
  781. }
  782. hpetp->hp_delta = hpet_calibrate(hpetp);
  783. /* This clocksource driver currently only works on ia64 */
  784. #ifdef CONFIG_IA64
  785. if (!hpet_clocksource) {
  786. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  787. CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
  788. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  789. hpetp->hp_clocksource = &clocksource_hpet;
  790. hpet_clocksource = &clocksource_hpet;
  791. }
  792. #endif
  793. return 0;
  794. }
  795. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  796. {
  797. struct hpet_data *hdp;
  798. acpi_status status;
  799. struct acpi_resource_address64 addr;
  800. hdp = data;
  801. status = acpi_resource_to_address64(res, &addr);
  802. if (ACPI_SUCCESS(status)) {
  803. hdp->hd_phys_address = addr.minimum;
  804. hdp->hd_address = ioremap(addr.minimum, addr.address_length);
  805. if (hpet_is_known(hdp)) {
  806. iounmap(hdp->hd_address);
  807. return AE_ALREADY_EXISTS;
  808. }
  809. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  810. struct acpi_resource_fixed_memory32 *fixmem32;
  811. fixmem32 = &res->data.fixed_memory32;
  812. if (!fixmem32)
  813. return AE_NO_MEMORY;
  814. hdp->hd_phys_address = fixmem32->address;
  815. hdp->hd_address = ioremap(fixmem32->address,
  816. HPET_RANGE_SIZE);
  817. if (hpet_is_known(hdp)) {
  818. iounmap(hdp->hd_address);
  819. return AE_ALREADY_EXISTS;
  820. }
  821. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  822. struct acpi_resource_extended_irq *irqp;
  823. int i, irq;
  824. irqp = &res->data.extended_irq;
  825. for (i = 0; i < irqp->interrupt_count; i++) {
  826. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  827. irqp->triggering, irqp->polarity);
  828. if (irq < 0)
  829. return AE_ERROR;
  830. hdp->hd_irq[hdp->hd_nirqs] = irq;
  831. hdp->hd_nirqs++;
  832. }
  833. }
  834. return AE_OK;
  835. }
  836. static int hpet_acpi_add(struct acpi_device *device)
  837. {
  838. acpi_status result;
  839. struct hpet_data data;
  840. memset(&data, 0, sizeof(data));
  841. result =
  842. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  843. hpet_resources, &data);
  844. if (ACPI_FAILURE(result))
  845. return -ENODEV;
  846. if (!data.hd_address || !data.hd_nirqs) {
  847. if (data.hd_address)
  848. iounmap(data.hd_address);
  849. printk("%s: no address or irqs in _CRS\n", __func__);
  850. return -ENODEV;
  851. }
  852. return hpet_alloc(&data);
  853. }
  854. static int hpet_acpi_remove(struct acpi_device *device, int type)
  855. {
  856. /* XXX need to unregister clocksource, dealloc mem, etc */
  857. return -EINVAL;
  858. }
  859. static const struct acpi_device_id hpet_device_ids[] = {
  860. {"PNP0103", 0},
  861. {"", 0},
  862. };
  863. MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
  864. static struct acpi_driver hpet_acpi_driver = {
  865. .name = "hpet",
  866. .ids = hpet_device_ids,
  867. .ops = {
  868. .add = hpet_acpi_add,
  869. .remove = hpet_acpi_remove,
  870. },
  871. };
  872. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  873. static int __init hpet_init(void)
  874. {
  875. int result;
  876. result = misc_register(&hpet_misc);
  877. if (result < 0)
  878. return -ENODEV;
  879. sysctl_header = register_sysctl_table(dev_root);
  880. result = acpi_bus_register_driver(&hpet_acpi_driver);
  881. if (result < 0) {
  882. if (sysctl_header)
  883. unregister_sysctl_table(sysctl_header);
  884. misc_deregister(&hpet_misc);
  885. return result;
  886. }
  887. return 0;
  888. }
  889. static void __exit hpet_exit(void)
  890. {
  891. acpi_bus_unregister_driver(&hpet_acpi_driver);
  892. if (sysctl_header)
  893. unregister_sysctl_table(sysctl_header);
  894. misc_deregister(&hpet_misc);
  895. return;
  896. }
  897. module_init(hpet_init);
  898. module_exit(hpet_exit);
  899. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  900. MODULE_LICENSE("GPL");