swim3.c 30 KB

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  1. /*
  2. * Driver for the SWIM3 (Super Woz Integrated Machine 3)
  3. * floppy controller found on Power Macintoshes.
  4. *
  5. * Copyright (C) 1996 Paul Mackerras.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * TODO:
  14. * handle 2 drives
  15. * handle GCR disks
  16. */
  17. #include <linux/stddef.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/timer.h>
  21. #include <linux/delay.h>
  22. #include <linux/fd.h>
  23. #include <linux/ioctl.h>
  24. #include <linux/blkdev.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/mutex.h>
  27. #include <linux/module.h>
  28. #include <linux/spinlock.h>
  29. #include <asm/io.h>
  30. #include <asm/dbdma.h>
  31. #include <asm/prom.h>
  32. #include <asm/uaccess.h>
  33. #include <asm/mediabay.h>
  34. #include <asm/machdep.h>
  35. #include <asm/pmac_feature.h>
  36. static DEFINE_MUTEX(swim3_mutex);
  37. static struct request_queue *swim3_queue;
  38. static struct gendisk *disks[2];
  39. static struct request *fd_req;
  40. #define MAX_FLOPPIES 2
  41. enum swim_state {
  42. idle,
  43. locating,
  44. seeking,
  45. settling,
  46. do_transfer,
  47. jogging,
  48. available,
  49. revalidating,
  50. ejecting
  51. };
  52. #define REG(x) unsigned char x; char x ## _pad[15];
  53. /*
  54. * The names for these registers mostly represent speculation on my part.
  55. * It will be interesting to see how close they are to the names Apple uses.
  56. */
  57. struct swim3 {
  58. REG(data);
  59. REG(timer); /* counts down at 1MHz */
  60. REG(error);
  61. REG(mode);
  62. REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
  63. REG(setup);
  64. REG(control); /* writing bits clears them */
  65. REG(status); /* writing bits sets them in control */
  66. REG(intr);
  67. REG(nseek); /* # tracks to seek */
  68. REG(ctrack); /* current track number */
  69. REG(csect); /* current sector number */
  70. REG(gap3); /* size of gap 3 in track format */
  71. REG(sector); /* sector # to read or write */
  72. REG(nsect); /* # sectors to read or write */
  73. REG(intr_enable);
  74. };
  75. #define control_bic control
  76. #define control_bis status
  77. /* Bits in select register */
  78. #define CA_MASK 7
  79. #define LSTRB 8
  80. /* Bits in control register */
  81. #define DO_SEEK 0x80
  82. #define FORMAT 0x40
  83. #define SELECT 0x20
  84. #define WRITE_SECTORS 0x10
  85. #define DO_ACTION 0x08
  86. #define DRIVE2_ENABLE 0x04
  87. #define DRIVE_ENABLE 0x02
  88. #define INTR_ENABLE 0x01
  89. /* Bits in status register */
  90. #define FIFO_1BYTE 0x80
  91. #define FIFO_2BYTE 0x40
  92. #define ERROR 0x20
  93. #define DATA 0x08
  94. #define RDDATA 0x04
  95. #define INTR_PENDING 0x02
  96. #define MARK_BYTE 0x01
  97. /* Bits in intr and intr_enable registers */
  98. #define ERROR_INTR 0x20
  99. #define DATA_CHANGED 0x10
  100. #define TRANSFER_DONE 0x08
  101. #define SEEN_SECTOR 0x04
  102. #define SEEK_DONE 0x02
  103. #define TIMER_DONE 0x01
  104. /* Bits in error register */
  105. #define ERR_DATA_CRC 0x80
  106. #define ERR_ADDR_CRC 0x40
  107. #define ERR_OVERRUN 0x04
  108. #define ERR_UNDERRUN 0x01
  109. /* Bits in setup register */
  110. #define S_SW_RESET 0x80
  111. #define S_GCR_WRITE 0x40
  112. #define S_IBM_DRIVE 0x20
  113. #define S_TEST_MODE 0x10
  114. #define S_FCLK_DIV2 0x08
  115. #define S_GCR 0x04
  116. #define S_COPY_PROT 0x02
  117. #define S_INV_WDATA 0x01
  118. /* Select values for swim3_action */
  119. #define SEEK_POSITIVE 0
  120. #define SEEK_NEGATIVE 4
  121. #define STEP 1
  122. #define MOTOR_ON 2
  123. #define MOTOR_OFF 6
  124. #define INDEX 3
  125. #define EJECT 7
  126. #define SETMFM 9
  127. #define SETGCR 13
  128. /* Select values for swim3_select and swim3_readbit */
  129. #define STEP_DIR 0
  130. #define STEPPING 1
  131. #define MOTOR_ON 2
  132. #define RELAX 3 /* also eject in progress */
  133. #define READ_DATA_0 4
  134. #define TWOMEG_DRIVE 5
  135. #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
  136. #define DRIVE_PRESENT 7
  137. #define DISK_IN 8
  138. #define WRITE_PROT 9
  139. #define TRACK_ZERO 10
  140. #define TACHO 11
  141. #define READ_DATA_1 12
  142. #define MFM_MODE 13
  143. #define SEEK_COMPLETE 14
  144. #define ONEMEG_MEDIA 15
  145. /* Definitions of values used in writing and formatting */
  146. #define DATA_ESCAPE 0x99
  147. #define GCR_SYNC_EXC 0x3f
  148. #define GCR_SYNC_CONV 0x80
  149. #define GCR_FIRST_MARK 0xd5
  150. #define GCR_SECOND_MARK 0xaa
  151. #define GCR_ADDR_MARK "\xd5\xaa\x00"
  152. #define GCR_DATA_MARK "\xd5\xaa\x0b"
  153. #define GCR_SLIP_BYTE "\x27\xaa"
  154. #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
  155. #define DATA_99 "\x99\x99"
  156. #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
  157. #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
  158. #define MFM_GAP_LEN 12
  159. struct floppy_state {
  160. enum swim_state state;
  161. spinlock_t lock;
  162. struct swim3 __iomem *swim3; /* hardware registers */
  163. struct dbdma_regs __iomem *dma; /* DMA controller registers */
  164. int swim3_intr; /* interrupt number for SWIM3 */
  165. int dma_intr; /* interrupt number for DMA channel */
  166. int cur_cyl; /* cylinder head is on, or -1 */
  167. int cur_sector; /* last sector we saw go past */
  168. int req_cyl; /* the cylinder for the current r/w request */
  169. int head; /* head number ditto */
  170. int req_sector; /* sector number ditto */
  171. int scount; /* # sectors we're transferring at present */
  172. int retries;
  173. int settle_time;
  174. int secpercyl; /* disk geometry information */
  175. int secpertrack;
  176. int total_secs;
  177. int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
  178. struct dbdma_cmd *dma_cmd;
  179. int ref_count;
  180. int expect_cyl;
  181. struct timer_list timeout;
  182. int timeout_pending;
  183. int ejected;
  184. wait_queue_head_t wait;
  185. int wanted;
  186. struct macio_dev *mdev;
  187. char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
  188. };
  189. static struct floppy_state floppy_states[MAX_FLOPPIES];
  190. static int floppy_count = 0;
  191. static DEFINE_SPINLOCK(swim3_lock);
  192. static unsigned short write_preamble[] = {
  193. 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
  194. 0, 0, 0, 0, 0, 0, /* sync field */
  195. 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
  196. 0x990f /* no escape for 512 bytes */
  197. };
  198. static unsigned short write_postamble[] = {
  199. 0x9904, /* insert CRC */
  200. 0x4e4e, 0x4e4e,
  201. 0x9908, /* stop writing */
  202. 0, 0, 0, 0, 0, 0
  203. };
  204. static void swim3_select(struct floppy_state *fs, int sel);
  205. static void swim3_action(struct floppy_state *fs, int action);
  206. static int swim3_readbit(struct floppy_state *fs, int bit);
  207. static void do_fd_request(struct request_queue * q);
  208. static void start_request(struct floppy_state *fs);
  209. static void set_timeout(struct floppy_state *fs, int nticks,
  210. void (*proc)(unsigned long));
  211. static void scan_track(struct floppy_state *fs);
  212. static void seek_track(struct floppy_state *fs, int n);
  213. static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
  214. static void setup_transfer(struct floppy_state *fs);
  215. static void act(struct floppy_state *fs);
  216. static void scan_timeout(unsigned long data);
  217. static void seek_timeout(unsigned long data);
  218. static void settle_timeout(unsigned long data);
  219. static void xfer_timeout(unsigned long data);
  220. static irqreturn_t swim3_interrupt(int irq, void *dev_id);
  221. /*static void fd_dma_interrupt(int irq, void *dev_id);*/
  222. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  223. int interruptible);
  224. static void release_drive(struct floppy_state *fs);
  225. static int fd_eject(struct floppy_state *fs);
  226. static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
  227. unsigned int cmd, unsigned long param);
  228. static int floppy_open(struct block_device *bdev, fmode_t mode);
  229. static int floppy_release(struct gendisk *disk, fmode_t mode);
  230. static unsigned int floppy_check_events(struct gendisk *disk,
  231. unsigned int clearing);
  232. static int floppy_revalidate(struct gendisk *disk);
  233. static bool swim3_end_request(int err, unsigned int nr_bytes)
  234. {
  235. if (__blk_end_request(fd_req, err, nr_bytes))
  236. return true;
  237. fd_req = NULL;
  238. return false;
  239. }
  240. static bool swim3_end_request_cur(int err)
  241. {
  242. return swim3_end_request(err, blk_rq_cur_bytes(fd_req));
  243. }
  244. static void swim3_select(struct floppy_state *fs, int sel)
  245. {
  246. struct swim3 __iomem *sw = fs->swim3;
  247. out_8(&sw->select, RELAX);
  248. if (sel & 8)
  249. out_8(&sw->control_bis, SELECT);
  250. else
  251. out_8(&sw->control_bic, SELECT);
  252. out_8(&sw->select, sel & CA_MASK);
  253. }
  254. static void swim3_action(struct floppy_state *fs, int action)
  255. {
  256. struct swim3 __iomem *sw = fs->swim3;
  257. swim3_select(fs, action);
  258. udelay(1);
  259. out_8(&sw->select, sw->select | LSTRB);
  260. udelay(2);
  261. out_8(&sw->select, sw->select & ~LSTRB);
  262. udelay(1);
  263. }
  264. static int swim3_readbit(struct floppy_state *fs, int bit)
  265. {
  266. struct swim3 __iomem *sw = fs->swim3;
  267. int stat;
  268. swim3_select(fs, bit);
  269. udelay(1);
  270. stat = in_8(&sw->status);
  271. return (stat & DATA) == 0;
  272. }
  273. static void do_fd_request(struct request_queue * q)
  274. {
  275. int i;
  276. for(i=0; i<floppy_count; i++) {
  277. struct floppy_state *fs = &floppy_states[i];
  278. if (fs->mdev->media_bay &&
  279. check_media_bay(fs->mdev->media_bay) != MB_FD)
  280. continue;
  281. start_request(fs);
  282. }
  283. }
  284. static void start_request(struct floppy_state *fs)
  285. {
  286. struct request *req;
  287. unsigned long x;
  288. if (fs->state == idle && fs->wanted) {
  289. fs->state = available;
  290. wake_up(&fs->wait);
  291. return;
  292. }
  293. while (fs->state == idle) {
  294. if (!fd_req) {
  295. fd_req = blk_fetch_request(swim3_queue);
  296. if (!fd_req)
  297. break;
  298. }
  299. req = fd_req;
  300. #if 0
  301. printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n",
  302. req->rq_disk->disk_name, req->cmd,
  303. (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer);
  304. printk(" errors=%d current_nr_sectors=%u\n",
  305. req->errors, blk_rq_cur_sectors(req));
  306. #endif
  307. if (blk_rq_pos(req) >= fs->total_secs) {
  308. swim3_end_request_cur(-EIO);
  309. continue;
  310. }
  311. if (fs->ejected) {
  312. swim3_end_request_cur(-EIO);
  313. continue;
  314. }
  315. if (rq_data_dir(req) == WRITE) {
  316. if (fs->write_prot < 0)
  317. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  318. if (fs->write_prot) {
  319. swim3_end_request_cur(-EIO);
  320. continue;
  321. }
  322. }
  323. /* Do not remove the cast. blk_rq_pos(req) is now a
  324. * sector_t and can be 64 bits, but it will never go
  325. * past 32 bits for this driver anyway, so we can
  326. * safely cast it down and not have to do a 64/32
  327. * division
  328. */
  329. fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl;
  330. x = ((long)blk_rq_pos(req)) % fs->secpercyl;
  331. fs->head = x / fs->secpertrack;
  332. fs->req_sector = x % fs->secpertrack + 1;
  333. fd_req = req;
  334. fs->state = do_transfer;
  335. fs->retries = 0;
  336. act(fs);
  337. }
  338. }
  339. static void set_timeout(struct floppy_state *fs, int nticks,
  340. void (*proc)(unsigned long))
  341. {
  342. unsigned long flags;
  343. spin_lock_irqsave(&fs->lock, flags);
  344. if (fs->timeout_pending)
  345. del_timer(&fs->timeout);
  346. fs->timeout.expires = jiffies + nticks;
  347. fs->timeout.function = proc;
  348. fs->timeout.data = (unsigned long) fs;
  349. add_timer(&fs->timeout);
  350. fs->timeout_pending = 1;
  351. spin_unlock_irqrestore(&fs->lock, flags);
  352. }
  353. static inline void scan_track(struct floppy_state *fs)
  354. {
  355. struct swim3 __iomem *sw = fs->swim3;
  356. swim3_select(fs, READ_DATA_0);
  357. in_8(&sw->intr); /* clear SEEN_SECTOR bit */
  358. in_8(&sw->error);
  359. out_8(&sw->intr_enable, SEEN_SECTOR);
  360. out_8(&sw->control_bis, DO_ACTION);
  361. /* enable intr when track found */
  362. set_timeout(fs, HZ, scan_timeout); /* enable timeout */
  363. }
  364. static inline void seek_track(struct floppy_state *fs, int n)
  365. {
  366. struct swim3 __iomem *sw = fs->swim3;
  367. if (n >= 0) {
  368. swim3_action(fs, SEEK_POSITIVE);
  369. sw->nseek = n;
  370. } else {
  371. swim3_action(fs, SEEK_NEGATIVE);
  372. sw->nseek = -n;
  373. }
  374. fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
  375. swim3_select(fs, STEP);
  376. in_8(&sw->error);
  377. /* enable intr when seek finished */
  378. out_8(&sw->intr_enable, SEEK_DONE);
  379. out_8(&sw->control_bis, DO_SEEK);
  380. set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
  381. fs->settle_time = 0;
  382. }
  383. static inline void init_dma(struct dbdma_cmd *cp, int cmd,
  384. void *buf, int count)
  385. {
  386. st_le16(&cp->req_count, count);
  387. st_le16(&cp->command, cmd);
  388. st_le32(&cp->phy_addr, virt_to_bus(buf));
  389. cp->xfer_status = 0;
  390. }
  391. static inline void setup_transfer(struct floppy_state *fs)
  392. {
  393. int n;
  394. struct swim3 __iomem *sw = fs->swim3;
  395. struct dbdma_cmd *cp = fs->dma_cmd;
  396. struct dbdma_regs __iomem *dr = fs->dma;
  397. if (blk_rq_cur_sectors(fd_req) <= 0) {
  398. printk(KERN_ERR "swim3: transfer 0 sectors?\n");
  399. return;
  400. }
  401. if (rq_data_dir(fd_req) == WRITE)
  402. n = 1;
  403. else {
  404. n = fs->secpertrack - fs->req_sector + 1;
  405. if (n > blk_rq_cur_sectors(fd_req))
  406. n = blk_rq_cur_sectors(fd_req);
  407. }
  408. fs->scount = n;
  409. swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
  410. out_8(&sw->sector, fs->req_sector);
  411. out_8(&sw->nsect, n);
  412. out_8(&sw->gap3, 0);
  413. out_le32(&dr->cmdptr, virt_to_bus(cp));
  414. if (rq_data_dir(fd_req) == WRITE) {
  415. /* Set up 3 dma commands: write preamble, data, postamble */
  416. init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
  417. ++cp;
  418. init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
  419. ++cp;
  420. init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
  421. } else {
  422. init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
  423. }
  424. ++cp;
  425. out_le16(&cp->command, DBDMA_STOP);
  426. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  427. in_8(&sw->error);
  428. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  429. if (rq_data_dir(fd_req) == WRITE)
  430. out_8(&sw->control_bis, WRITE_SECTORS);
  431. in_8(&sw->intr);
  432. out_le32(&dr->control, (RUN << 16) | RUN);
  433. /* enable intr when transfer complete */
  434. out_8(&sw->intr_enable, TRANSFER_DONE);
  435. out_8(&sw->control_bis, DO_ACTION);
  436. set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
  437. }
  438. static void act(struct floppy_state *fs)
  439. {
  440. for (;;) {
  441. switch (fs->state) {
  442. case idle:
  443. return; /* XXX shouldn't get here */
  444. case locating:
  445. if (swim3_readbit(fs, TRACK_ZERO)) {
  446. fs->cur_cyl = 0;
  447. if (fs->req_cyl == 0)
  448. fs->state = do_transfer;
  449. else
  450. fs->state = seeking;
  451. break;
  452. }
  453. scan_track(fs);
  454. return;
  455. case seeking:
  456. if (fs->cur_cyl < 0) {
  457. fs->expect_cyl = -1;
  458. fs->state = locating;
  459. break;
  460. }
  461. if (fs->req_cyl == fs->cur_cyl) {
  462. printk("whoops, seeking 0\n");
  463. fs->state = do_transfer;
  464. break;
  465. }
  466. seek_track(fs, fs->req_cyl - fs->cur_cyl);
  467. return;
  468. case settling:
  469. /* check for SEEK_COMPLETE after 30ms */
  470. fs->settle_time = (HZ + 32) / 33;
  471. set_timeout(fs, fs->settle_time, settle_timeout);
  472. return;
  473. case do_transfer:
  474. if (fs->cur_cyl != fs->req_cyl) {
  475. if (fs->retries > 5) {
  476. swim3_end_request_cur(-EIO);
  477. fs->state = idle;
  478. return;
  479. }
  480. fs->state = seeking;
  481. break;
  482. }
  483. setup_transfer(fs);
  484. return;
  485. case jogging:
  486. seek_track(fs, -5);
  487. return;
  488. default:
  489. printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
  490. return;
  491. }
  492. }
  493. }
  494. static void scan_timeout(unsigned long data)
  495. {
  496. struct floppy_state *fs = (struct floppy_state *) data;
  497. struct swim3 __iomem *sw = fs->swim3;
  498. fs->timeout_pending = 0;
  499. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  500. out_8(&sw->select, RELAX);
  501. out_8(&sw->intr_enable, 0);
  502. fs->cur_cyl = -1;
  503. if (fs->retries > 5) {
  504. swim3_end_request_cur(-EIO);
  505. fs->state = idle;
  506. start_request(fs);
  507. } else {
  508. fs->state = jogging;
  509. act(fs);
  510. }
  511. }
  512. static void seek_timeout(unsigned long data)
  513. {
  514. struct floppy_state *fs = (struct floppy_state *) data;
  515. struct swim3 __iomem *sw = fs->swim3;
  516. fs->timeout_pending = 0;
  517. out_8(&sw->control_bic, DO_SEEK);
  518. out_8(&sw->select, RELAX);
  519. out_8(&sw->intr_enable, 0);
  520. printk(KERN_ERR "swim3: seek timeout\n");
  521. swim3_end_request_cur(-EIO);
  522. fs->state = idle;
  523. start_request(fs);
  524. }
  525. static void settle_timeout(unsigned long data)
  526. {
  527. struct floppy_state *fs = (struct floppy_state *) data;
  528. struct swim3 __iomem *sw = fs->swim3;
  529. fs->timeout_pending = 0;
  530. if (swim3_readbit(fs, SEEK_COMPLETE)) {
  531. out_8(&sw->select, RELAX);
  532. fs->state = locating;
  533. act(fs);
  534. return;
  535. }
  536. out_8(&sw->select, RELAX);
  537. if (fs->settle_time < 2*HZ) {
  538. ++fs->settle_time;
  539. set_timeout(fs, 1, settle_timeout);
  540. return;
  541. }
  542. printk(KERN_ERR "swim3: seek settle timeout\n");
  543. swim3_end_request_cur(-EIO);
  544. fs->state = idle;
  545. start_request(fs);
  546. }
  547. static void xfer_timeout(unsigned long data)
  548. {
  549. struct floppy_state *fs = (struct floppy_state *) data;
  550. struct swim3 __iomem *sw = fs->swim3;
  551. struct dbdma_regs __iomem *dr = fs->dma;
  552. int n;
  553. fs->timeout_pending = 0;
  554. out_le32(&dr->control, RUN << 16);
  555. /* We must wait a bit for dbdma to stop */
  556. for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
  557. udelay(1);
  558. out_8(&sw->intr_enable, 0);
  559. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  560. out_8(&sw->select, RELAX);
  561. printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
  562. (rq_data_dir(fd_req)==WRITE? "writ": "read"),
  563. (long)blk_rq_pos(fd_req));
  564. swim3_end_request_cur(-EIO);
  565. fs->state = idle;
  566. start_request(fs);
  567. }
  568. static irqreturn_t swim3_interrupt(int irq, void *dev_id)
  569. {
  570. struct floppy_state *fs = (struct floppy_state *) dev_id;
  571. struct swim3 __iomem *sw = fs->swim3;
  572. int intr, err, n;
  573. int stat, resid;
  574. struct dbdma_regs __iomem *dr;
  575. struct dbdma_cmd *cp;
  576. intr = in_8(&sw->intr);
  577. err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
  578. if ((intr & ERROR_INTR) && fs->state != do_transfer)
  579. printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
  580. fs->state, rq_data_dir(fd_req), intr, err);
  581. switch (fs->state) {
  582. case locating:
  583. if (intr & SEEN_SECTOR) {
  584. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  585. out_8(&sw->select, RELAX);
  586. out_8(&sw->intr_enable, 0);
  587. del_timer(&fs->timeout);
  588. fs->timeout_pending = 0;
  589. if (sw->ctrack == 0xff) {
  590. printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
  591. fs->cur_cyl = -1;
  592. if (fs->retries > 5) {
  593. swim3_end_request_cur(-EIO);
  594. fs->state = idle;
  595. start_request(fs);
  596. } else {
  597. fs->state = jogging;
  598. act(fs);
  599. }
  600. break;
  601. }
  602. fs->cur_cyl = sw->ctrack;
  603. fs->cur_sector = sw->csect;
  604. if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
  605. printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
  606. fs->expect_cyl, fs->cur_cyl);
  607. fs->state = do_transfer;
  608. act(fs);
  609. }
  610. break;
  611. case seeking:
  612. case jogging:
  613. if (sw->nseek == 0) {
  614. out_8(&sw->control_bic, DO_SEEK);
  615. out_8(&sw->select, RELAX);
  616. out_8(&sw->intr_enable, 0);
  617. del_timer(&fs->timeout);
  618. fs->timeout_pending = 0;
  619. if (fs->state == seeking)
  620. ++fs->retries;
  621. fs->state = settling;
  622. act(fs);
  623. }
  624. break;
  625. case settling:
  626. out_8(&sw->intr_enable, 0);
  627. del_timer(&fs->timeout);
  628. fs->timeout_pending = 0;
  629. act(fs);
  630. break;
  631. case do_transfer:
  632. if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
  633. break;
  634. out_8(&sw->intr_enable, 0);
  635. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  636. out_8(&sw->select, RELAX);
  637. del_timer(&fs->timeout);
  638. fs->timeout_pending = 0;
  639. dr = fs->dma;
  640. cp = fs->dma_cmd;
  641. if (rq_data_dir(fd_req) == WRITE)
  642. ++cp;
  643. /*
  644. * Check that the main data transfer has finished.
  645. * On writing, the swim3 sometimes doesn't use
  646. * up all the bytes of the postamble, so we can still
  647. * see DMA active here. That doesn't matter as long
  648. * as all the sector data has been transferred.
  649. */
  650. if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
  651. /* wait a little while for DMA to complete */
  652. for (n = 0; n < 100; ++n) {
  653. if (cp->xfer_status != 0)
  654. break;
  655. udelay(1);
  656. barrier();
  657. }
  658. }
  659. /* turn off DMA */
  660. out_le32(&dr->control, (RUN | PAUSE) << 16);
  661. stat = ld_le16(&cp->xfer_status);
  662. resid = ld_le16(&cp->res_count);
  663. if (intr & ERROR_INTR) {
  664. n = fs->scount - 1 - resid / 512;
  665. if (n > 0) {
  666. blk_update_request(fd_req, 0, n << 9);
  667. fs->req_sector += n;
  668. }
  669. if (fs->retries < 5) {
  670. ++fs->retries;
  671. act(fs);
  672. } else {
  673. printk("swim3: error %sing block %ld (err=%x)\n",
  674. rq_data_dir(fd_req) == WRITE? "writ": "read",
  675. (long)blk_rq_pos(fd_req), err);
  676. swim3_end_request_cur(-EIO);
  677. fs->state = idle;
  678. }
  679. } else {
  680. if ((stat & ACTIVE) == 0 || resid != 0) {
  681. /* musta been an error */
  682. printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
  683. printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
  684. fs->state, rq_data_dir(fd_req), intr, err);
  685. swim3_end_request_cur(-EIO);
  686. fs->state = idle;
  687. start_request(fs);
  688. break;
  689. }
  690. if (swim3_end_request(0, fs->scount << 9)) {
  691. fs->req_sector += fs->scount;
  692. if (fs->req_sector > fs->secpertrack) {
  693. fs->req_sector -= fs->secpertrack;
  694. if (++fs->head > 1) {
  695. fs->head = 0;
  696. ++fs->req_cyl;
  697. }
  698. }
  699. act(fs);
  700. } else
  701. fs->state = idle;
  702. }
  703. if (fs->state == idle)
  704. start_request(fs);
  705. break;
  706. default:
  707. printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
  708. }
  709. return IRQ_HANDLED;
  710. }
  711. /*
  712. static void fd_dma_interrupt(int irq, void *dev_id)
  713. {
  714. }
  715. */
  716. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  717. int interruptible)
  718. {
  719. unsigned long flags;
  720. spin_lock_irqsave(&fs->lock, flags);
  721. if (fs->state != idle) {
  722. ++fs->wanted;
  723. while (fs->state != available) {
  724. if (interruptible && signal_pending(current)) {
  725. --fs->wanted;
  726. spin_unlock_irqrestore(&fs->lock, flags);
  727. return -EINTR;
  728. }
  729. interruptible_sleep_on(&fs->wait);
  730. }
  731. --fs->wanted;
  732. }
  733. fs->state = state;
  734. spin_unlock_irqrestore(&fs->lock, flags);
  735. return 0;
  736. }
  737. static void release_drive(struct floppy_state *fs)
  738. {
  739. unsigned long flags;
  740. spin_lock_irqsave(&fs->lock, flags);
  741. fs->state = idle;
  742. start_request(fs);
  743. spin_unlock_irqrestore(&fs->lock, flags);
  744. }
  745. static int fd_eject(struct floppy_state *fs)
  746. {
  747. int err, n;
  748. err = grab_drive(fs, ejecting, 1);
  749. if (err)
  750. return err;
  751. swim3_action(fs, EJECT);
  752. for (n = 20; n > 0; --n) {
  753. if (signal_pending(current)) {
  754. err = -EINTR;
  755. break;
  756. }
  757. swim3_select(fs, RELAX);
  758. schedule_timeout_interruptible(1);
  759. if (swim3_readbit(fs, DISK_IN) == 0)
  760. break;
  761. }
  762. swim3_select(fs, RELAX);
  763. udelay(150);
  764. fs->ejected = 1;
  765. release_drive(fs);
  766. return err;
  767. }
  768. static struct floppy_struct floppy_type =
  769. { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
  770. static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode,
  771. unsigned int cmd, unsigned long param)
  772. {
  773. struct floppy_state *fs = bdev->bd_disk->private_data;
  774. int err;
  775. if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
  776. return -EPERM;
  777. if (fs->mdev->media_bay &&
  778. check_media_bay(fs->mdev->media_bay) != MB_FD)
  779. return -ENXIO;
  780. switch (cmd) {
  781. case FDEJECT:
  782. if (fs->ref_count != 1)
  783. return -EBUSY;
  784. err = fd_eject(fs);
  785. return err;
  786. case FDGETPRM:
  787. if (copy_to_user((void __user *) param, &floppy_type,
  788. sizeof(struct floppy_struct)))
  789. return -EFAULT;
  790. return 0;
  791. }
  792. return -ENOTTY;
  793. }
  794. static int floppy_ioctl(struct block_device *bdev, fmode_t mode,
  795. unsigned int cmd, unsigned long param)
  796. {
  797. int ret;
  798. mutex_lock(&swim3_mutex);
  799. ret = floppy_locked_ioctl(bdev, mode, cmd, param);
  800. mutex_unlock(&swim3_mutex);
  801. return ret;
  802. }
  803. static int floppy_open(struct block_device *bdev, fmode_t mode)
  804. {
  805. struct floppy_state *fs = bdev->bd_disk->private_data;
  806. struct swim3 __iomem *sw = fs->swim3;
  807. int n, err = 0;
  808. if (fs->ref_count == 0) {
  809. if (fs->mdev->media_bay &&
  810. check_media_bay(fs->mdev->media_bay) != MB_FD)
  811. return -ENXIO;
  812. out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
  813. out_8(&sw->control_bic, 0xff);
  814. out_8(&sw->mode, 0x95);
  815. udelay(10);
  816. out_8(&sw->intr_enable, 0);
  817. out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
  818. swim3_action(fs, MOTOR_ON);
  819. fs->write_prot = -1;
  820. fs->cur_cyl = -1;
  821. for (n = 0; n < 2 * HZ; ++n) {
  822. if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
  823. break;
  824. if (signal_pending(current)) {
  825. err = -EINTR;
  826. break;
  827. }
  828. swim3_select(fs, RELAX);
  829. schedule_timeout_interruptible(1);
  830. }
  831. if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
  832. || swim3_readbit(fs, DISK_IN) == 0))
  833. err = -ENXIO;
  834. swim3_action(fs, SETMFM);
  835. swim3_select(fs, RELAX);
  836. } else if (fs->ref_count == -1 || mode & FMODE_EXCL)
  837. return -EBUSY;
  838. if (err == 0 && (mode & FMODE_NDELAY) == 0
  839. && (mode & (FMODE_READ|FMODE_WRITE))) {
  840. check_disk_change(bdev);
  841. if (fs->ejected)
  842. err = -ENXIO;
  843. }
  844. if (err == 0 && (mode & FMODE_WRITE)) {
  845. if (fs->write_prot < 0)
  846. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  847. if (fs->write_prot)
  848. err = -EROFS;
  849. }
  850. if (err) {
  851. if (fs->ref_count == 0) {
  852. swim3_action(fs, MOTOR_OFF);
  853. out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
  854. swim3_select(fs, RELAX);
  855. }
  856. return err;
  857. }
  858. if (mode & FMODE_EXCL)
  859. fs->ref_count = -1;
  860. else
  861. ++fs->ref_count;
  862. return 0;
  863. }
  864. static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode)
  865. {
  866. int ret;
  867. mutex_lock(&swim3_mutex);
  868. ret = floppy_open(bdev, mode);
  869. mutex_unlock(&swim3_mutex);
  870. return ret;
  871. }
  872. static int floppy_release(struct gendisk *disk, fmode_t mode)
  873. {
  874. struct floppy_state *fs = disk->private_data;
  875. struct swim3 __iomem *sw = fs->swim3;
  876. mutex_lock(&swim3_mutex);
  877. if (fs->ref_count > 0 && --fs->ref_count == 0) {
  878. swim3_action(fs, MOTOR_OFF);
  879. out_8(&sw->control_bic, 0xff);
  880. swim3_select(fs, RELAX);
  881. }
  882. mutex_unlock(&swim3_mutex);
  883. return 0;
  884. }
  885. static unsigned int floppy_check_events(struct gendisk *disk,
  886. unsigned int clearing)
  887. {
  888. struct floppy_state *fs = disk->private_data;
  889. return fs->ejected ? DISK_EVENT_MEDIA_CHANGE : 0;
  890. }
  891. static int floppy_revalidate(struct gendisk *disk)
  892. {
  893. struct floppy_state *fs = disk->private_data;
  894. struct swim3 __iomem *sw;
  895. int ret, n;
  896. if (fs->mdev->media_bay &&
  897. check_media_bay(fs->mdev->media_bay) != MB_FD)
  898. return -ENXIO;
  899. sw = fs->swim3;
  900. grab_drive(fs, revalidating, 0);
  901. out_8(&sw->intr_enable, 0);
  902. out_8(&sw->control_bis, DRIVE_ENABLE);
  903. swim3_action(fs, MOTOR_ON); /* necessary? */
  904. fs->write_prot = -1;
  905. fs->cur_cyl = -1;
  906. mdelay(1);
  907. for (n = HZ; n > 0; --n) {
  908. if (swim3_readbit(fs, SEEK_COMPLETE))
  909. break;
  910. if (signal_pending(current))
  911. break;
  912. swim3_select(fs, RELAX);
  913. schedule_timeout_interruptible(1);
  914. }
  915. ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
  916. || swim3_readbit(fs, DISK_IN) == 0;
  917. if (ret)
  918. swim3_action(fs, MOTOR_OFF);
  919. else {
  920. fs->ejected = 0;
  921. swim3_action(fs, SETMFM);
  922. }
  923. swim3_select(fs, RELAX);
  924. release_drive(fs);
  925. return ret;
  926. }
  927. static const struct block_device_operations floppy_fops = {
  928. .open = floppy_unlocked_open,
  929. .release = floppy_release,
  930. .ioctl = floppy_ioctl,
  931. .check_events = floppy_check_events,
  932. .revalidate_disk= floppy_revalidate,
  933. };
  934. static int swim3_add_device(struct macio_dev *mdev, int index)
  935. {
  936. struct device_node *swim = mdev->ofdev.dev.of_node;
  937. struct floppy_state *fs = &floppy_states[index];
  938. int rc = -EBUSY;
  939. /* Check & Request resources */
  940. if (macio_resource_count(mdev) < 2) {
  941. printk(KERN_WARNING "ifd%d: no address for %s\n",
  942. index, swim->full_name);
  943. return -ENXIO;
  944. }
  945. if (macio_irq_count(mdev) < 2) {
  946. printk(KERN_WARNING "fd%d: no intrs for device %s\n",
  947. index, swim->full_name);
  948. }
  949. if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
  950. printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
  951. index, swim->full_name);
  952. return -EBUSY;
  953. }
  954. if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
  955. printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
  956. index, swim->full_name);
  957. macio_release_resource(mdev, 0);
  958. return -EBUSY;
  959. }
  960. dev_set_drvdata(&mdev->ofdev.dev, fs);
  961. if (mdev->media_bay == NULL)
  962. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
  963. memset(fs, 0, sizeof(*fs));
  964. spin_lock_init(&fs->lock);
  965. fs->state = idle;
  966. fs->swim3 = (struct swim3 __iomem *)
  967. ioremap(macio_resource_start(mdev, 0), 0x200);
  968. if (fs->swim3 == NULL) {
  969. printk("fd%d: couldn't map registers for %s\n",
  970. index, swim->full_name);
  971. rc = -ENOMEM;
  972. goto out_release;
  973. }
  974. fs->dma = (struct dbdma_regs __iomem *)
  975. ioremap(macio_resource_start(mdev, 1), 0x200);
  976. if (fs->dma == NULL) {
  977. printk("fd%d: couldn't map DMA for %s\n",
  978. index, swim->full_name);
  979. iounmap(fs->swim3);
  980. rc = -ENOMEM;
  981. goto out_release;
  982. }
  983. fs->swim3_intr = macio_irq(mdev, 0);
  984. fs->dma_intr = macio_irq(mdev, 1);
  985. fs->cur_cyl = -1;
  986. fs->cur_sector = -1;
  987. fs->secpercyl = 36;
  988. fs->secpertrack = 18;
  989. fs->total_secs = 2880;
  990. fs->mdev = mdev;
  991. init_waitqueue_head(&fs->wait);
  992. fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
  993. memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
  994. st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
  995. if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
  996. printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
  997. index, fs->swim3_intr, swim->full_name);
  998. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  999. goto out_unmap;
  1000. return -EBUSY;
  1001. }
  1002. /*
  1003. if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
  1004. printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
  1005. fs->dma_intr);
  1006. return -EBUSY;
  1007. }
  1008. */
  1009. init_timer(&fs->timeout);
  1010. printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
  1011. mdev->media_bay ? "in media bay" : "");
  1012. return 0;
  1013. out_unmap:
  1014. iounmap(fs->dma);
  1015. iounmap(fs->swim3);
  1016. out_release:
  1017. macio_release_resource(mdev, 0);
  1018. macio_release_resource(mdev, 1);
  1019. return rc;
  1020. }
  1021. static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
  1022. {
  1023. int i, rc;
  1024. struct gendisk *disk;
  1025. /* Add the drive */
  1026. rc = swim3_add_device(mdev, floppy_count);
  1027. if (rc)
  1028. return rc;
  1029. /* Now create the queue if not there yet */
  1030. if (swim3_queue == NULL) {
  1031. /* If we failed, there isn't much we can do as the driver is still
  1032. * too dumb to remove the device, just bail out
  1033. */
  1034. if (register_blkdev(FLOPPY_MAJOR, "fd"))
  1035. return 0;
  1036. swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
  1037. if (swim3_queue == NULL) {
  1038. unregister_blkdev(FLOPPY_MAJOR, "fd");
  1039. return 0;
  1040. }
  1041. }
  1042. /* Now register that disk. Same comment about failure handling */
  1043. i = floppy_count++;
  1044. disk = disks[i] = alloc_disk(1);
  1045. if (disk == NULL)
  1046. return 0;
  1047. disk->major = FLOPPY_MAJOR;
  1048. disk->first_minor = i;
  1049. disk->fops = &floppy_fops;
  1050. disk->private_data = &floppy_states[i];
  1051. disk->queue = swim3_queue;
  1052. disk->flags |= GENHD_FL_REMOVABLE;
  1053. sprintf(disk->disk_name, "fd%d", i);
  1054. set_capacity(disk, 2880);
  1055. add_disk(disk);
  1056. return 0;
  1057. }
  1058. static struct of_device_id swim3_match[] =
  1059. {
  1060. {
  1061. .name = "swim3",
  1062. },
  1063. {
  1064. .compatible = "ohare-swim3"
  1065. },
  1066. {
  1067. .compatible = "swim3"
  1068. },
  1069. };
  1070. static struct macio_driver swim3_driver =
  1071. {
  1072. .driver = {
  1073. .name = "swim3",
  1074. .of_match_table = swim3_match,
  1075. },
  1076. .probe = swim3_attach,
  1077. #if 0
  1078. .suspend = swim3_suspend,
  1079. .resume = swim3_resume,
  1080. #endif
  1081. };
  1082. int swim3_init(void)
  1083. {
  1084. macio_register_driver(&swim3_driver);
  1085. return 0;
  1086. }
  1087. module_init(swim3_init)
  1088. MODULE_LICENSE("GPL");
  1089. MODULE_AUTHOR("Paul Mackerras");
  1090. MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);