scan.c 9.3 KB

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  1. /*
  2. * Broadcom specific AMBA
  3. * Bus scanning
  4. *
  5. * Licensed under the GNU/GPL. See COPYING for details.
  6. */
  7. #include "scan.h"
  8. #include "bcma_private.h"
  9. #include <linux/bcma/bcma.h>
  10. #include <linux/bcma/bcma_regs.h>
  11. #include <linux/pci.h>
  12. #include <linux/io.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/slab.h>
  15. struct bcma_device_id_name {
  16. u16 id;
  17. const char *name;
  18. };
  19. struct bcma_device_id_name bcma_device_names[] = {
  20. { BCMA_CORE_OOB_ROUTER, "OOB Router" },
  21. { BCMA_CORE_INVALID, "Invalid" },
  22. { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
  23. { BCMA_CORE_ILINE20, "ILine 20" },
  24. { BCMA_CORE_SRAM, "SRAM" },
  25. { BCMA_CORE_SDRAM, "SDRAM" },
  26. { BCMA_CORE_PCI, "PCI" },
  27. { BCMA_CORE_MIPS, "MIPS" },
  28. { BCMA_CORE_ETHERNET, "Fast Ethernet" },
  29. { BCMA_CORE_V90, "V90" },
  30. { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
  31. { BCMA_CORE_ADSL, "ADSL" },
  32. { BCMA_CORE_ILINE100, "ILine 100" },
  33. { BCMA_CORE_IPSEC, "IPSEC" },
  34. { BCMA_CORE_UTOPIA, "UTOPIA" },
  35. { BCMA_CORE_PCMCIA, "PCMCIA" },
  36. { BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
  37. { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
  38. { BCMA_CORE_OFDM, "OFDM" },
  39. { BCMA_CORE_EXTIF, "EXTIF" },
  40. { BCMA_CORE_80211, "IEEE 802.11" },
  41. { BCMA_CORE_PHY_A, "PHY A" },
  42. { BCMA_CORE_PHY_B, "PHY B" },
  43. { BCMA_CORE_PHY_G, "PHY G" },
  44. { BCMA_CORE_MIPS_3302, "MIPS 3302" },
  45. { BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
  46. { BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
  47. { BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
  48. { BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
  49. { BCMA_CORE_SDIO_HOST, "SDIO Host" },
  50. { BCMA_CORE_ROBOSWITCH, "Roboswitch" },
  51. { BCMA_CORE_PARA_ATA, "PATA" },
  52. { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
  53. { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
  54. { BCMA_CORE_PCIE, "PCIe" },
  55. { BCMA_CORE_PHY_N, "PHY N" },
  56. { BCMA_CORE_SRAM_CTL, "SRAM Controller" },
  57. { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
  58. { BCMA_CORE_ARM_1176, "ARM 1176" },
  59. { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
  60. { BCMA_CORE_PHY_LP, "PHY LP" },
  61. { BCMA_CORE_PMU, "PMU" },
  62. { BCMA_CORE_PHY_SSN, "PHY SSN" },
  63. { BCMA_CORE_SDIO_DEV, "SDIO Device" },
  64. { BCMA_CORE_ARM_CM3, "ARM CM3" },
  65. { BCMA_CORE_PHY_HT, "PHY HT" },
  66. { BCMA_CORE_MIPS_74K, "MIPS 74K" },
  67. { BCMA_CORE_MAC_GBIT, "GBit MAC" },
  68. { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
  69. { BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
  70. { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
  71. { BCMA_CORE_SHARED_COMMON, "Common Shared" },
  72. { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
  73. { BCMA_CORE_SPI_HOST, "SPI Host" },
  74. { BCMA_CORE_I2S, "I2S" },
  75. { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
  76. { BCMA_CORE_SHIM, "SHIM" },
  77. { BCMA_CORE_DEFAULT, "Default" },
  78. };
  79. const char *bcma_device_name(struct bcma_device_id *id)
  80. {
  81. int i;
  82. if (id->manuf == BCMA_MANUF_BCM) {
  83. for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
  84. if (bcma_device_names[i].id == id->id)
  85. return bcma_device_names[i].name;
  86. }
  87. }
  88. return "UNKNOWN";
  89. }
  90. static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
  91. u16 offset)
  92. {
  93. return readl(bus->mmio + offset);
  94. }
  95. static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
  96. {
  97. if (bus->hosttype == BCMA_HOSTTYPE_PCI)
  98. pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
  99. addr);
  100. }
  101. static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
  102. {
  103. u32 ent = readl(*eromptr);
  104. (*eromptr)++;
  105. return ent;
  106. }
  107. static void bcma_erom_push_ent(u32 **eromptr)
  108. {
  109. (*eromptr)--;
  110. }
  111. static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
  112. {
  113. u32 ent = bcma_erom_get_ent(bus, eromptr);
  114. if (!(ent & SCAN_ER_VALID))
  115. return -ENOENT;
  116. if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
  117. return -ENOENT;
  118. return ent;
  119. }
  120. static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
  121. {
  122. u32 ent = bcma_erom_get_ent(bus, eromptr);
  123. bcma_erom_push_ent(eromptr);
  124. return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
  125. }
  126. static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
  127. {
  128. u32 ent = bcma_erom_get_ent(bus, eromptr);
  129. bcma_erom_push_ent(eromptr);
  130. return (((ent & SCAN_ER_VALID)) &&
  131. ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
  132. ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
  133. }
  134. static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
  135. {
  136. u32 ent;
  137. while (1) {
  138. ent = bcma_erom_get_ent(bus, eromptr);
  139. if ((ent & SCAN_ER_VALID) &&
  140. ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
  141. break;
  142. if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
  143. break;
  144. }
  145. bcma_erom_push_ent(eromptr);
  146. }
  147. static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
  148. {
  149. u32 ent = bcma_erom_get_ent(bus, eromptr);
  150. if (!(ent & SCAN_ER_VALID))
  151. return -ENOENT;
  152. if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
  153. return -ENOENT;
  154. return ent;
  155. }
  156. static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
  157. u32 type, u8 port)
  158. {
  159. u32 addrl, addrh, sizel, sizeh = 0;
  160. u32 size;
  161. u32 ent = bcma_erom_get_ent(bus, eromptr);
  162. if ((!(ent & SCAN_ER_VALID)) ||
  163. ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
  164. ((ent & SCAN_ADDR_TYPE) != type) ||
  165. (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
  166. bcma_erom_push_ent(eromptr);
  167. return -EINVAL;
  168. }
  169. addrl = ent & SCAN_ADDR_ADDR;
  170. if (ent & SCAN_ADDR_AG32)
  171. addrh = bcma_erom_get_ent(bus, eromptr);
  172. else
  173. addrh = 0;
  174. if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
  175. size = bcma_erom_get_ent(bus, eromptr);
  176. sizel = size & SCAN_SIZE_SZ;
  177. if (size & SCAN_SIZE_SG32)
  178. sizeh = bcma_erom_get_ent(bus, eromptr);
  179. } else
  180. sizel = SCAN_ADDR_SZ_BASE <<
  181. ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
  182. return addrl;
  183. }
  184. int bcma_bus_scan(struct bcma_bus *bus)
  185. {
  186. u32 erombase;
  187. u32 __iomem *eromptr, *eromend;
  188. s32 cia, cib;
  189. u8 ports[2], wrappers[2];
  190. s32 tmp;
  191. u8 i, j;
  192. int err;
  193. INIT_LIST_HEAD(&bus->cores);
  194. bus->nr_cores = 0;
  195. bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
  196. tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
  197. bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
  198. bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
  199. bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
  200. erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
  201. eromptr = bus->mmio;
  202. eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
  203. bcma_scan_switch_core(bus, erombase);
  204. while (eromptr < eromend) {
  205. struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
  206. if (!core)
  207. return -ENOMEM;
  208. INIT_LIST_HEAD(&core->list);
  209. core->bus = bus;
  210. /* get CIs */
  211. cia = bcma_erom_get_ci(bus, &eromptr);
  212. if (cia < 0) {
  213. bcma_erom_push_ent(&eromptr);
  214. if (bcma_erom_is_end(bus, &eromptr))
  215. break;
  216. err= -EILSEQ;
  217. goto out;
  218. }
  219. cib = bcma_erom_get_ci(bus, &eromptr);
  220. if (cib < 0) {
  221. err= -EILSEQ;
  222. goto out;
  223. }
  224. /* parse CIs */
  225. core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
  226. core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
  227. core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
  228. ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
  229. ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
  230. wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
  231. wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
  232. core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
  233. if (((core->id.manuf == BCMA_MANUF_ARM) &&
  234. (core->id.id == 0xFFF)) ||
  235. (ports[1] == 0)) {
  236. bcma_erom_skip_component(bus, &eromptr);
  237. continue;
  238. }
  239. /* check if component is a core at all */
  240. if (wrappers[0] + wrappers[1] == 0) {
  241. /* we could save addrl of the router
  242. if (cid == BCMA_CORE_OOB_ROUTER)
  243. */
  244. bcma_erom_skip_component(bus, &eromptr);
  245. continue;
  246. }
  247. if (bcma_erom_is_bridge(bus, &eromptr)) {
  248. bcma_erom_skip_component(bus, &eromptr);
  249. continue;
  250. }
  251. /* get & parse master ports */
  252. for (i = 0; i < ports[0]; i++) {
  253. u32 mst_port_d = bcma_erom_get_mst_port(bus, &eromptr);
  254. if (mst_port_d < 0) {
  255. err= -EILSEQ;
  256. goto out;
  257. }
  258. }
  259. /* get & parse slave ports */
  260. for (i = 0; i < ports[1]; i++) {
  261. for (j = 0; ; j++) {
  262. tmp = bcma_erom_get_addr_desc(bus, &eromptr,
  263. SCAN_ADDR_TYPE_SLAVE, i);
  264. if (tmp < 0) {
  265. /* no more entries for port _i_ */
  266. /* pr_debug("erom: slave port %d "
  267. * "has %d descriptors\n", i, j); */
  268. break;
  269. } else {
  270. if (i == 0 && j == 0)
  271. core->addr = tmp;
  272. }
  273. }
  274. }
  275. /* get & parse master wrappers */
  276. for (i = 0; i < wrappers[0]; i++) {
  277. for (j = 0; ; j++) {
  278. tmp = bcma_erom_get_addr_desc(bus, &eromptr,
  279. SCAN_ADDR_TYPE_MWRAP, i);
  280. if (tmp < 0) {
  281. /* no more entries for port _i_ */
  282. /* pr_debug("erom: master wrapper %d "
  283. * "has %d descriptors\n", i, j); */
  284. break;
  285. } else {
  286. if (i == 0 && j == 0)
  287. core->wrap = tmp;
  288. }
  289. }
  290. }
  291. /* get & parse slave wrappers */
  292. for (i = 0; i < wrappers[1]; i++) {
  293. u8 hack = (ports[1] == 1) ? 0 : 1;
  294. for (j = 0; ; j++) {
  295. tmp = bcma_erom_get_addr_desc(bus, &eromptr,
  296. SCAN_ADDR_TYPE_SWRAP, i + hack);
  297. if (tmp < 0) {
  298. /* no more entries for port _i_ */
  299. /* pr_debug("erom: master wrapper %d "
  300. * has %d descriptors\n", i, j); */
  301. break;
  302. } else {
  303. if (wrappers[0] == 0 && !i && !j)
  304. core->wrap = tmp;
  305. }
  306. }
  307. }
  308. pr_info("Core %d found: %s "
  309. "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
  310. bus->nr_cores, bcma_device_name(&core->id),
  311. core->id.manuf, core->id.id, core->id.rev,
  312. core->id.class);
  313. core->core_index = bus->nr_cores++;
  314. list_add(&core->list, &bus->cores);
  315. continue;
  316. out:
  317. return err;
  318. }
  319. return 0;
  320. }