fore200e.c 89 KB

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  1. /*
  2. A FORE Systems 200E-series driver for ATM on Linux.
  3. Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
  4. Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
  5. This driver simultaneously supports PCA-200E and SBA-200E adapters
  6. on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/init.h>
  22. #include <linux/capability.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/bitops.h>
  25. #include <linux/pci.h>
  26. #include <linux/module.h>
  27. #include <linux/atmdev.h>
  28. #include <linux/sonet.h>
  29. #include <linux/atm_suni.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include <linux/firmware.h>
  33. #include <asm/io.h>
  34. #include <asm/string.h>
  35. #include <asm/page.h>
  36. #include <asm/irq.h>
  37. #include <asm/dma.h>
  38. #include <asm/byteorder.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/atomic.h>
  41. #ifdef CONFIG_SBUS
  42. #include <linux/of.h>
  43. #include <linux/of_device.h>
  44. #include <asm/idprom.h>
  45. #include <asm/openprom.h>
  46. #include <asm/oplib.h>
  47. #include <asm/pgtable.h>
  48. #endif
  49. #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
  50. #define FORE200E_USE_TASKLET
  51. #endif
  52. #if 0 /* enable the debugging code of the buffer supply queues */
  53. #define FORE200E_BSQ_DEBUG
  54. #endif
  55. #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
  56. #define FORE200E_52BYTE_AAL0_SDU
  57. #endif
  58. #include "fore200e.h"
  59. #include "suni.h"
  60. #define FORE200E_VERSION "0.3e"
  61. #define FORE200E "fore200e: "
  62. #if 0 /* override .config */
  63. #define CONFIG_ATM_FORE200E_DEBUG 1
  64. #endif
  65. #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
  66. #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
  67. printk(FORE200E format, ##args); } while (0)
  68. #else
  69. #define DPRINTK(level, format, args...) do {} while (0)
  70. #endif
  71. #define FORE200E_ALIGN(addr, alignment) \
  72. ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
  73. #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
  74. #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
  75. #define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
  76. #if 1
  77. #define ASSERT(expr) if (!(expr)) { \
  78. printk(FORE200E "assertion failed! %s[%d]: %s\n", \
  79. __func__, __LINE__, #expr); \
  80. panic(FORE200E "%s", __func__); \
  81. }
  82. #else
  83. #define ASSERT(expr) do {} while (0)
  84. #endif
  85. static const struct atmdev_ops fore200e_ops;
  86. static const struct fore200e_bus fore200e_bus[];
  87. static LIST_HEAD(fore200e_boards);
  88. MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
  89. MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
  90. MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
  91. static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
  92. { BUFFER_S1_NBR, BUFFER_L1_NBR },
  93. { BUFFER_S2_NBR, BUFFER_L2_NBR }
  94. };
  95. static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
  96. { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
  97. { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
  98. };
  99. #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
  100. static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
  101. #endif
  102. #if 0 /* currently unused */
  103. static int
  104. fore200e_fore2atm_aal(enum fore200e_aal aal)
  105. {
  106. switch(aal) {
  107. case FORE200E_AAL0: return ATM_AAL0;
  108. case FORE200E_AAL34: return ATM_AAL34;
  109. case FORE200E_AAL5: return ATM_AAL5;
  110. }
  111. return -EINVAL;
  112. }
  113. #endif
  114. static enum fore200e_aal
  115. fore200e_atm2fore_aal(int aal)
  116. {
  117. switch(aal) {
  118. case ATM_AAL0: return FORE200E_AAL0;
  119. case ATM_AAL34: return FORE200E_AAL34;
  120. case ATM_AAL1:
  121. case ATM_AAL2:
  122. case ATM_AAL5: return FORE200E_AAL5;
  123. }
  124. return -EINVAL;
  125. }
  126. static char*
  127. fore200e_irq_itoa(int irq)
  128. {
  129. static char str[8];
  130. sprintf(str, "%d", irq);
  131. return str;
  132. }
  133. /* allocate and align a chunk of memory intended to hold the data behing exchanged
  134. between the driver and the adapter (using streaming DVMA) */
  135. static int
  136. fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
  137. {
  138. unsigned long offset = 0;
  139. if (alignment <= sizeof(int))
  140. alignment = 0;
  141. chunk->alloc_size = size + alignment;
  142. chunk->align_size = size;
  143. chunk->direction = direction;
  144. chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
  145. if (chunk->alloc_addr == NULL)
  146. return -ENOMEM;
  147. if (alignment > 0)
  148. offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
  149. chunk->align_addr = chunk->alloc_addr + offset;
  150. chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
  151. return 0;
  152. }
  153. /* free a chunk of memory */
  154. static void
  155. fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
  156. {
  157. fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
  158. kfree(chunk->alloc_addr);
  159. }
  160. static void
  161. fore200e_spin(int msecs)
  162. {
  163. unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
  164. while (time_before(jiffies, timeout));
  165. }
  166. static int
  167. fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
  168. {
  169. unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
  170. int ok;
  171. mb();
  172. do {
  173. if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
  174. break;
  175. } while (time_before(jiffies, timeout));
  176. #if 1
  177. if (!ok) {
  178. printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
  179. *addr, val);
  180. }
  181. #endif
  182. return ok;
  183. }
  184. static int
  185. fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
  186. {
  187. unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
  188. int ok;
  189. do {
  190. if ((ok = (fore200e->bus->read(addr) == val)))
  191. break;
  192. } while (time_before(jiffies, timeout));
  193. #if 1
  194. if (!ok) {
  195. printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
  196. fore200e->bus->read(addr), val);
  197. }
  198. #endif
  199. return ok;
  200. }
  201. static void
  202. fore200e_free_rx_buf(struct fore200e* fore200e)
  203. {
  204. int scheme, magn, nbr;
  205. struct buffer* buffer;
  206. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
  207. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
  208. if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
  209. for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
  210. struct chunk* data = &buffer[ nbr ].data;
  211. if (data->alloc_addr != NULL)
  212. fore200e_chunk_free(fore200e, data);
  213. }
  214. }
  215. }
  216. }
  217. }
  218. static void
  219. fore200e_uninit_bs_queue(struct fore200e* fore200e)
  220. {
  221. int scheme, magn;
  222. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
  223. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
  224. struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
  225. struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
  226. if (status->alloc_addr)
  227. fore200e->bus->dma_chunk_free(fore200e, status);
  228. if (rbd_block->alloc_addr)
  229. fore200e->bus->dma_chunk_free(fore200e, rbd_block);
  230. }
  231. }
  232. }
  233. static int
  234. fore200e_reset(struct fore200e* fore200e, int diag)
  235. {
  236. int ok;
  237. fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
  238. fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
  239. fore200e->bus->reset(fore200e);
  240. if (diag) {
  241. ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
  242. if (ok == 0) {
  243. printk(FORE200E "device %s self-test failed\n", fore200e->name);
  244. return -ENODEV;
  245. }
  246. printk(FORE200E "device %s self-test passed\n", fore200e->name);
  247. fore200e->state = FORE200E_STATE_RESET;
  248. }
  249. return 0;
  250. }
  251. static void
  252. fore200e_shutdown(struct fore200e* fore200e)
  253. {
  254. printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
  255. fore200e->name, fore200e->phys_base,
  256. fore200e_irq_itoa(fore200e->irq));
  257. if (fore200e->state > FORE200E_STATE_RESET) {
  258. /* first, reset the board to prevent further interrupts or data transfers */
  259. fore200e_reset(fore200e, 0);
  260. }
  261. /* then, release all allocated resources */
  262. switch(fore200e->state) {
  263. case FORE200E_STATE_COMPLETE:
  264. kfree(fore200e->stats);
  265. case FORE200E_STATE_IRQ:
  266. free_irq(fore200e->irq, fore200e->atm_dev);
  267. case FORE200E_STATE_ALLOC_BUF:
  268. fore200e_free_rx_buf(fore200e);
  269. case FORE200E_STATE_INIT_BSQ:
  270. fore200e_uninit_bs_queue(fore200e);
  271. case FORE200E_STATE_INIT_RXQ:
  272. fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
  273. fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
  274. case FORE200E_STATE_INIT_TXQ:
  275. fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
  276. fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
  277. case FORE200E_STATE_INIT_CMDQ:
  278. fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
  279. case FORE200E_STATE_INITIALIZE:
  280. /* nothing to do for that state */
  281. case FORE200E_STATE_START_FW:
  282. /* nothing to do for that state */
  283. case FORE200E_STATE_RESET:
  284. /* nothing to do for that state */
  285. case FORE200E_STATE_MAP:
  286. fore200e->bus->unmap(fore200e);
  287. case FORE200E_STATE_CONFIGURE:
  288. /* nothing to do for that state */
  289. case FORE200E_STATE_REGISTER:
  290. /* XXX shouldn't we *start* by deregistering the device? */
  291. atm_dev_deregister(fore200e->atm_dev);
  292. case FORE200E_STATE_BLANK:
  293. /* nothing to do for that state */
  294. break;
  295. }
  296. }
  297. #ifdef CONFIG_PCI
  298. static u32 fore200e_pca_read(volatile u32 __iomem *addr)
  299. {
  300. /* on big-endian hosts, the board is configured to convert
  301. the endianess of slave RAM accesses */
  302. return le32_to_cpu(readl(addr));
  303. }
  304. static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
  305. {
  306. /* on big-endian hosts, the board is configured to convert
  307. the endianess of slave RAM accesses */
  308. writel(cpu_to_le32(val), addr);
  309. }
  310. static u32
  311. fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
  312. {
  313. u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
  314. DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
  315. virt_addr, size, direction, dma_addr);
  316. return dma_addr;
  317. }
  318. static void
  319. fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
  320. {
  321. DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
  322. dma_addr, size, direction);
  323. pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
  324. }
  325. static void
  326. fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
  327. {
  328. DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
  329. pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
  330. }
  331. static void
  332. fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
  333. {
  334. DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
  335. pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
  336. }
  337. /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
  338. (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
  339. static int
  340. fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
  341. int size, int nbr, int alignment)
  342. {
  343. /* returned chunks are page-aligned */
  344. chunk->alloc_size = size * nbr;
  345. chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
  346. chunk->alloc_size,
  347. &chunk->dma_addr);
  348. if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
  349. return -ENOMEM;
  350. chunk->align_addr = chunk->alloc_addr;
  351. return 0;
  352. }
  353. /* free a DMA consistent chunk of memory */
  354. static void
  355. fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
  356. {
  357. pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
  358. chunk->alloc_size,
  359. chunk->alloc_addr,
  360. chunk->dma_addr);
  361. }
  362. static int
  363. fore200e_pca_irq_check(struct fore200e* fore200e)
  364. {
  365. /* this is a 1 bit register */
  366. int irq_posted = readl(fore200e->regs.pca.psr);
  367. #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
  368. if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
  369. DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
  370. }
  371. #endif
  372. return irq_posted;
  373. }
  374. static void
  375. fore200e_pca_irq_ack(struct fore200e* fore200e)
  376. {
  377. writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
  378. }
  379. static void
  380. fore200e_pca_reset(struct fore200e* fore200e)
  381. {
  382. writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
  383. fore200e_spin(10);
  384. writel(0, fore200e->regs.pca.hcr);
  385. }
  386. static int __devinit
  387. fore200e_pca_map(struct fore200e* fore200e)
  388. {
  389. DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
  390. fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
  391. if (fore200e->virt_base == NULL) {
  392. printk(FORE200E "can't map device %s\n", fore200e->name);
  393. return -EFAULT;
  394. }
  395. DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
  396. /* gain access to the PCA specific registers */
  397. fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
  398. fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
  399. fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
  400. fore200e->state = FORE200E_STATE_MAP;
  401. return 0;
  402. }
  403. static void
  404. fore200e_pca_unmap(struct fore200e* fore200e)
  405. {
  406. DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
  407. if (fore200e->virt_base != NULL)
  408. iounmap(fore200e->virt_base);
  409. }
  410. static int __devinit
  411. fore200e_pca_configure(struct fore200e* fore200e)
  412. {
  413. struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
  414. u8 master_ctrl, latency;
  415. DPRINTK(2, "device %s being configured\n", fore200e->name);
  416. if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
  417. printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
  418. return -EIO;
  419. }
  420. pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
  421. master_ctrl = master_ctrl
  422. #if defined(__BIG_ENDIAN)
  423. /* request the PCA board to convert the endianess of slave RAM accesses */
  424. | PCA200E_CTRL_CONVERT_ENDIAN
  425. #endif
  426. #if 0
  427. | PCA200E_CTRL_DIS_CACHE_RD
  428. | PCA200E_CTRL_DIS_WRT_INVAL
  429. | PCA200E_CTRL_ENA_CONT_REQ_MODE
  430. | PCA200E_CTRL_2_CACHE_WRT_INVAL
  431. #endif
  432. | PCA200E_CTRL_LARGE_PCI_BURSTS;
  433. pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
  434. /* raise latency from 32 (default) to 192, as this seems to prevent NIC
  435. lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
  436. this may impact the performances of other PCI devices on the same bus, though */
  437. latency = 192;
  438. pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
  439. fore200e->state = FORE200E_STATE_CONFIGURE;
  440. return 0;
  441. }
  442. static int __init
  443. fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
  444. {
  445. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  446. struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
  447. struct prom_opcode opcode;
  448. int ok;
  449. u32 prom_dma;
  450. FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
  451. opcode.opcode = OPCODE_GET_PROM;
  452. opcode.pad = 0;
  453. prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
  454. fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
  455. *entry->status = STATUS_PENDING;
  456. fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
  457. ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
  458. *entry->status = STATUS_FREE;
  459. fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
  460. if (ok == 0) {
  461. printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
  462. return -EIO;
  463. }
  464. #if defined(__BIG_ENDIAN)
  465. #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
  466. /* MAC address is stored as little-endian */
  467. swap_here(&prom->mac_addr[0]);
  468. swap_here(&prom->mac_addr[4]);
  469. #endif
  470. return 0;
  471. }
  472. static int
  473. fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
  474. {
  475. struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
  476. return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
  477. pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
  478. }
  479. #endif /* CONFIG_PCI */
  480. #ifdef CONFIG_SBUS
  481. static u32 fore200e_sba_read(volatile u32 __iomem *addr)
  482. {
  483. return sbus_readl(addr);
  484. }
  485. static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
  486. {
  487. sbus_writel(val, addr);
  488. }
  489. static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
  490. {
  491. struct platform_device *op = fore200e->bus_dev;
  492. u32 dma_addr;
  493. dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
  494. DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
  495. virt_addr, size, direction, dma_addr);
  496. return dma_addr;
  497. }
  498. static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
  499. {
  500. struct platform_device *op = fore200e->bus_dev;
  501. DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
  502. dma_addr, size, direction);
  503. dma_unmap_single(&op->dev, dma_addr, size, direction);
  504. }
  505. static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
  506. {
  507. struct platform_device *op = fore200e->bus_dev;
  508. DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
  509. dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
  510. }
  511. static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
  512. {
  513. struct platform_device *op = fore200e->bus_dev;
  514. DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
  515. dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
  516. }
  517. /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
  518. * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
  519. */
  520. static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
  521. int size, int nbr, int alignment)
  522. {
  523. struct platform_device *op = fore200e->bus_dev;
  524. chunk->alloc_size = chunk->align_size = size * nbr;
  525. /* returned chunks are page-aligned */
  526. chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
  527. &chunk->dma_addr, GFP_ATOMIC);
  528. if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
  529. return -ENOMEM;
  530. chunk->align_addr = chunk->alloc_addr;
  531. return 0;
  532. }
  533. /* free a DVMA consistent chunk of memory */
  534. static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
  535. {
  536. struct platform_device *op = fore200e->bus_dev;
  537. dma_free_coherent(&op->dev, chunk->alloc_size,
  538. chunk->alloc_addr, chunk->dma_addr);
  539. }
  540. static void fore200e_sba_irq_enable(struct fore200e *fore200e)
  541. {
  542. u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
  543. fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
  544. }
  545. static int fore200e_sba_irq_check(struct fore200e *fore200e)
  546. {
  547. return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
  548. }
  549. static void fore200e_sba_irq_ack(struct fore200e *fore200e)
  550. {
  551. u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
  552. fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
  553. }
  554. static void fore200e_sba_reset(struct fore200e *fore200e)
  555. {
  556. fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
  557. fore200e_spin(10);
  558. fore200e->bus->write(0, fore200e->regs.sba.hcr);
  559. }
  560. static int __init fore200e_sba_map(struct fore200e *fore200e)
  561. {
  562. struct platform_device *op = fore200e->bus_dev;
  563. unsigned int bursts;
  564. /* gain access to the SBA specific registers */
  565. fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
  566. fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
  567. fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
  568. fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
  569. if (!fore200e->virt_base) {
  570. printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
  571. return -EFAULT;
  572. }
  573. DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
  574. fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
  575. /* get the supported DVMA burst sizes */
  576. bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
  577. if (sbus_can_dma_64bit())
  578. sbus_set_sbus64(&op->dev, bursts);
  579. fore200e->state = FORE200E_STATE_MAP;
  580. return 0;
  581. }
  582. static void fore200e_sba_unmap(struct fore200e *fore200e)
  583. {
  584. struct platform_device *op = fore200e->bus_dev;
  585. of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
  586. of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
  587. of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
  588. of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
  589. }
  590. static int __init fore200e_sba_configure(struct fore200e *fore200e)
  591. {
  592. fore200e->state = FORE200E_STATE_CONFIGURE;
  593. return 0;
  594. }
  595. static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
  596. {
  597. struct platform_device *op = fore200e->bus_dev;
  598. const u8 *prop;
  599. int len;
  600. prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
  601. if (!prop)
  602. return -ENODEV;
  603. memcpy(&prom->mac_addr[4], prop, 4);
  604. prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
  605. if (!prop)
  606. return -ENODEV;
  607. memcpy(&prom->mac_addr[2], prop, 4);
  608. prom->serial_number = of_getintprop_default(op->dev.of_node,
  609. "serialnumber", 0);
  610. prom->hw_revision = of_getintprop_default(op->dev.of_node,
  611. "promversion", 0);
  612. return 0;
  613. }
  614. static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
  615. {
  616. struct platform_device *op = fore200e->bus_dev;
  617. const struct linux_prom_registers *regs;
  618. regs = of_get_property(op->dev.of_node, "reg", NULL);
  619. return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
  620. (regs ? regs->which_io : 0), op->dev.of_node->name);
  621. }
  622. #endif /* CONFIG_SBUS */
  623. static void
  624. fore200e_tx_irq(struct fore200e* fore200e)
  625. {
  626. struct host_txq* txq = &fore200e->host_txq;
  627. struct host_txq_entry* entry;
  628. struct atm_vcc* vcc;
  629. struct fore200e_vc_map* vc_map;
  630. if (fore200e->host_txq.txing == 0)
  631. return;
  632. for (;;) {
  633. entry = &txq->host_entry[ txq->tail ];
  634. if ((*entry->status & STATUS_COMPLETE) == 0) {
  635. break;
  636. }
  637. DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
  638. entry, txq->tail, entry->vc_map, entry->skb);
  639. /* free copy of misaligned data */
  640. kfree(entry->data);
  641. /* remove DMA mapping */
  642. fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
  643. DMA_TO_DEVICE);
  644. vc_map = entry->vc_map;
  645. /* vcc closed since the time the entry was submitted for tx? */
  646. if ((vc_map->vcc == NULL) ||
  647. (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
  648. DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
  649. fore200e->atm_dev->number);
  650. dev_kfree_skb_any(entry->skb);
  651. }
  652. else {
  653. ASSERT(vc_map->vcc);
  654. /* vcc closed then immediately re-opened? */
  655. if (vc_map->incarn != entry->incarn) {
  656. /* when a vcc is closed, some PDUs may be still pending in the tx queue.
  657. if the same vcc is immediately re-opened, those pending PDUs must
  658. not be popped after the completion of their emission, as they refer
  659. to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
  660. would be decremented by the size of the (unrelated) skb, possibly
  661. leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
  662. we thus bind the tx entry to the current incarnation of the vcc
  663. when the entry is submitted for tx. When the tx later completes,
  664. if the incarnation number of the tx entry does not match the one
  665. of the vcc, then this implies that the vcc has been closed then re-opened.
  666. we thus just drop the skb here. */
  667. DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
  668. fore200e->atm_dev->number);
  669. dev_kfree_skb_any(entry->skb);
  670. }
  671. else {
  672. vcc = vc_map->vcc;
  673. ASSERT(vcc);
  674. /* notify tx completion */
  675. if (vcc->pop) {
  676. vcc->pop(vcc, entry->skb);
  677. }
  678. else {
  679. dev_kfree_skb_any(entry->skb);
  680. }
  681. #if 1
  682. /* race fixed by the above incarnation mechanism, but... */
  683. if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
  684. atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
  685. }
  686. #endif
  687. /* check error condition */
  688. if (*entry->status & STATUS_ERROR)
  689. atomic_inc(&vcc->stats->tx_err);
  690. else
  691. atomic_inc(&vcc->stats->tx);
  692. }
  693. }
  694. *entry->status = STATUS_FREE;
  695. fore200e->host_txq.txing--;
  696. FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
  697. }
  698. }
  699. #ifdef FORE200E_BSQ_DEBUG
  700. int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
  701. {
  702. struct buffer* buffer;
  703. int count = 0;
  704. buffer = bsq->freebuf;
  705. while (buffer) {
  706. if (buffer->supplied) {
  707. printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
  708. where, scheme, magn, buffer->index);
  709. }
  710. if (buffer->magn != magn) {
  711. printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
  712. where, scheme, magn, buffer->index, buffer->magn);
  713. }
  714. if (buffer->scheme != scheme) {
  715. printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
  716. where, scheme, magn, buffer->index, buffer->scheme);
  717. }
  718. if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
  719. printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
  720. where, scheme, magn, buffer->index);
  721. }
  722. count++;
  723. buffer = buffer->next;
  724. }
  725. if (count != bsq->freebuf_count) {
  726. printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
  727. where, scheme, magn, count, bsq->freebuf_count);
  728. }
  729. return 0;
  730. }
  731. #endif
  732. static void
  733. fore200e_supply(struct fore200e* fore200e)
  734. {
  735. int scheme, magn, i;
  736. struct host_bsq* bsq;
  737. struct host_bsq_entry* entry;
  738. struct buffer* buffer;
  739. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
  740. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
  741. bsq = &fore200e->host_bsq[ scheme ][ magn ];
  742. #ifdef FORE200E_BSQ_DEBUG
  743. bsq_audit(1, bsq, scheme, magn);
  744. #endif
  745. while (bsq->freebuf_count >= RBD_BLK_SIZE) {
  746. DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
  747. RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
  748. entry = &bsq->host_entry[ bsq->head ];
  749. for (i = 0; i < RBD_BLK_SIZE; i++) {
  750. /* take the first buffer in the free buffer list */
  751. buffer = bsq->freebuf;
  752. if (!buffer) {
  753. printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
  754. scheme, magn, bsq->freebuf_count);
  755. return;
  756. }
  757. bsq->freebuf = buffer->next;
  758. #ifdef FORE200E_BSQ_DEBUG
  759. if (buffer->supplied)
  760. printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
  761. scheme, magn, buffer->index);
  762. buffer->supplied = 1;
  763. #endif
  764. entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
  765. entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
  766. }
  767. FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
  768. /* decrease accordingly the number of free rx buffers */
  769. bsq->freebuf_count -= RBD_BLK_SIZE;
  770. *entry->status = STATUS_PENDING;
  771. fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
  772. }
  773. }
  774. }
  775. }
  776. static int
  777. fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
  778. {
  779. struct sk_buff* skb;
  780. struct buffer* buffer;
  781. struct fore200e_vcc* fore200e_vcc;
  782. int i, pdu_len = 0;
  783. #ifdef FORE200E_52BYTE_AAL0_SDU
  784. u32 cell_header = 0;
  785. #endif
  786. ASSERT(vcc);
  787. fore200e_vcc = FORE200E_VCC(vcc);
  788. ASSERT(fore200e_vcc);
  789. #ifdef FORE200E_52BYTE_AAL0_SDU
  790. if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
  791. cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
  792. (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
  793. (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
  794. (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
  795. rpd->atm_header.clp;
  796. pdu_len = 4;
  797. }
  798. #endif
  799. /* compute total PDU length */
  800. for (i = 0; i < rpd->nseg; i++)
  801. pdu_len += rpd->rsd[ i ].length;
  802. skb = alloc_skb(pdu_len, GFP_ATOMIC);
  803. if (skb == NULL) {
  804. DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
  805. atomic_inc(&vcc->stats->rx_drop);
  806. return -ENOMEM;
  807. }
  808. __net_timestamp(skb);
  809. #ifdef FORE200E_52BYTE_AAL0_SDU
  810. if (cell_header) {
  811. *((u32*)skb_put(skb, 4)) = cell_header;
  812. }
  813. #endif
  814. /* reassemble segments */
  815. for (i = 0; i < rpd->nseg; i++) {
  816. /* rebuild rx buffer address from rsd handle */
  817. buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
  818. /* Make device DMA transfer visible to CPU. */
  819. fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
  820. memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
  821. /* Now let the device get at it again. */
  822. fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
  823. }
  824. DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
  825. if (pdu_len < fore200e_vcc->rx_min_pdu)
  826. fore200e_vcc->rx_min_pdu = pdu_len;
  827. if (pdu_len > fore200e_vcc->rx_max_pdu)
  828. fore200e_vcc->rx_max_pdu = pdu_len;
  829. fore200e_vcc->rx_pdu++;
  830. /* push PDU */
  831. if (atm_charge(vcc, skb->truesize) == 0) {
  832. DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
  833. vcc->itf, vcc->vpi, vcc->vci);
  834. dev_kfree_skb_any(skb);
  835. atomic_inc(&vcc->stats->rx_drop);
  836. return -ENOMEM;
  837. }
  838. ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
  839. vcc->push(vcc, skb);
  840. atomic_inc(&vcc->stats->rx);
  841. ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
  842. return 0;
  843. }
  844. static void
  845. fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
  846. {
  847. struct host_bsq* bsq;
  848. struct buffer* buffer;
  849. int i;
  850. for (i = 0; i < rpd->nseg; i++) {
  851. /* rebuild rx buffer address from rsd handle */
  852. buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
  853. bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
  854. #ifdef FORE200E_BSQ_DEBUG
  855. bsq_audit(2, bsq, buffer->scheme, buffer->magn);
  856. if (buffer->supplied == 0)
  857. printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
  858. buffer->scheme, buffer->magn, buffer->index);
  859. buffer->supplied = 0;
  860. #endif
  861. /* re-insert the buffer into the free buffer list */
  862. buffer->next = bsq->freebuf;
  863. bsq->freebuf = buffer;
  864. /* then increment the number of free rx buffers */
  865. bsq->freebuf_count++;
  866. }
  867. }
  868. static void
  869. fore200e_rx_irq(struct fore200e* fore200e)
  870. {
  871. struct host_rxq* rxq = &fore200e->host_rxq;
  872. struct host_rxq_entry* entry;
  873. struct atm_vcc* vcc;
  874. struct fore200e_vc_map* vc_map;
  875. for (;;) {
  876. entry = &rxq->host_entry[ rxq->head ];
  877. /* no more received PDUs */
  878. if ((*entry->status & STATUS_COMPLETE) == 0)
  879. break;
  880. vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
  881. if ((vc_map->vcc == NULL) ||
  882. (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
  883. DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
  884. fore200e->atm_dev->number,
  885. entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
  886. }
  887. else {
  888. vcc = vc_map->vcc;
  889. ASSERT(vcc);
  890. if ((*entry->status & STATUS_ERROR) == 0) {
  891. fore200e_push_rpd(fore200e, vcc, entry->rpd);
  892. }
  893. else {
  894. DPRINTK(2, "damaged PDU on %d.%d.%d\n",
  895. fore200e->atm_dev->number,
  896. entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
  897. atomic_inc(&vcc->stats->rx_err);
  898. }
  899. }
  900. FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
  901. fore200e_collect_rpd(fore200e, entry->rpd);
  902. /* rewrite the rpd address to ack the received PDU */
  903. fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
  904. *entry->status = STATUS_FREE;
  905. fore200e_supply(fore200e);
  906. }
  907. }
  908. #ifndef FORE200E_USE_TASKLET
  909. static void
  910. fore200e_irq(struct fore200e* fore200e)
  911. {
  912. unsigned long flags;
  913. spin_lock_irqsave(&fore200e->q_lock, flags);
  914. fore200e_rx_irq(fore200e);
  915. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  916. spin_lock_irqsave(&fore200e->q_lock, flags);
  917. fore200e_tx_irq(fore200e);
  918. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  919. }
  920. #endif
  921. static irqreturn_t
  922. fore200e_interrupt(int irq, void* dev)
  923. {
  924. struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
  925. if (fore200e->bus->irq_check(fore200e) == 0) {
  926. DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
  927. return IRQ_NONE;
  928. }
  929. DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
  930. #ifdef FORE200E_USE_TASKLET
  931. tasklet_schedule(&fore200e->tx_tasklet);
  932. tasklet_schedule(&fore200e->rx_tasklet);
  933. #else
  934. fore200e_irq(fore200e);
  935. #endif
  936. fore200e->bus->irq_ack(fore200e);
  937. return IRQ_HANDLED;
  938. }
  939. #ifdef FORE200E_USE_TASKLET
  940. static void
  941. fore200e_tx_tasklet(unsigned long data)
  942. {
  943. struct fore200e* fore200e = (struct fore200e*) data;
  944. unsigned long flags;
  945. DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
  946. spin_lock_irqsave(&fore200e->q_lock, flags);
  947. fore200e_tx_irq(fore200e);
  948. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  949. }
  950. static void
  951. fore200e_rx_tasklet(unsigned long data)
  952. {
  953. struct fore200e* fore200e = (struct fore200e*) data;
  954. unsigned long flags;
  955. DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
  956. spin_lock_irqsave(&fore200e->q_lock, flags);
  957. fore200e_rx_irq((struct fore200e*) data);
  958. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  959. }
  960. #endif
  961. static int
  962. fore200e_select_scheme(struct atm_vcc* vcc)
  963. {
  964. /* fairly balance the VCs over (identical) buffer schemes */
  965. int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
  966. DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
  967. vcc->itf, vcc->vpi, vcc->vci, scheme);
  968. return scheme;
  969. }
  970. static int
  971. fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
  972. {
  973. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  974. struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
  975. struct activate_opcode activ_opcode;
  976. struct deactivate_opcode deactiv_opcode;
  977. struct vpvc vpvc;
  978. int ok;
  979. enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
  980. FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
  981. if (activate) {
  982. FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
  983. activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
  984. activ_opcode.aal = aal;
  985. activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
  986. activ_opcode.pad = 0;
  987. }
  988. else {
  989. deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
  990. deactiv_opcode.pad = 0;
  991. }
  992. vpvc.vci = vcc->vci;
  993. vpvc.vpi = vcc->vpi;
  994. *entry->status = STATUS_PENDING;
  995. if (activate) {
  996. #ifdef FORE200E_52BYTE_AAL0_SDU
  997. mtu = 48;
  998. #endif
  999. /* the MTU is not used by the cp, except in the case of AAL0 */
  1000. fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
  1001. fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
  1002. fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
  1003. }
  1004. else {
  1005. fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
  1006. fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
  1007. }
  1008. ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
  1009. *entry->status = STATUS_FREE;
  1010. if (ok == 0) {
  1011. printk(FORE200E "unable to %s VC %d.%d.%d\n",
  1012. activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
  1013. return -EIO;
  1014. }
  1015. DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
  1016. activate ? "open" : "clos");
  1017. return 0;
  1018. }
  1019. #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
  1020. static void
  1021. fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
  1022. {
  1023. if (qos->txtp.max_pcr < ATM_OC3_PCR) {
  1024. /* compute the data cells to idle cells ratio from the tx PCR */
  1025. rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
  1026. rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
  1027. }
  1028. else {
  1029. /* disable rate control */
  1030. rate->data_cells = rate->idle_cells = 0;
  1031. }
  1032. }
  1033. static int
  1034. fore200e_open(struct atm_vcc *vcc)
  1035. {
  1036. struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
  1037. struct fore200e_vcc* fore200e_vcc;
  1038. struct fore200e_vc_map* vc_map;
  1039. unsigned long flags;
  1040. int vci = vcc->vci;
  1041. short vpi = vcc->vpi;
  1042. ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
  1043. ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
  1044. spin_lock_irqsave(&fore200e->q_lock, flags);
  1045. vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
  1046. if (vc_map->vcc) {
  1047. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  1048. printk(FORE200E "VC %d.%d.%d already in use\n",
  1049. fore200e->atm_dev->number, vpi, vci);
  1050. return -EINVAL;
  1051. }
  1052. vc_map->vcc = vcc;
  1053. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  1054. fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
  1055. if (fore200e_vcc == NULL) {
  1056. vc_map->vcc = NULL;
  1057. return -ENOMEM;
  1058. }
  1059. DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
  1060. "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
  1061. vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
  1062. fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
  1063. vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
  1064. fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
  1065. vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
  1066. /* pseudo-CBR bandwidth requested? */
  1067. if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
  1068. mutex_lock(&fore200e->rate_mtx);
  1069. if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
  1070. mutex_unlock(&fore200e->rate_mtx);
  1071. kfree(fore200e_vcc);
  1072. vc_map->vcc = NULL;
  1073. return -EAGAIN;
  1074. }
  1075. /* reserve bandwidth */
  1076. fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
  1077. mutex_unlock(&fore200e->rate_mtx);
  1078. }
  1079. vcc->itf = vcc->dev->number;
  1080. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1081. set_bit(ATM_VF_ADDR, &vcc->flags);
  1082. vcc->dev_data = fore200e_vcc;
  1083. if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
  1084. vc_map->vcc = NULL;
  1085. clear_bit(ATM_VF_ADDR, &vcc->flags);
  1086. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1087. vcc->dev_data = NULL;
  1088. fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
  1089. kfree(fore200e_vcc);
  1090. return -EINVAL;
  1091. }
  1092. /* compute rate control parameters */
  1093. if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
  1094. fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
  1095. set_bit(ATM_VF_HASQOS, &vcc->flags);
  1096. DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
  1097. vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
  1098. vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
  1099. fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
  1100. }
  1101. fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
  1102. fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
  1103. fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
  1104. /* new incarnation of the vcc */
  1105. vc_map->incarn = ++fore200e->incarn_count;
  1106. /* VC unusable before this flag is set */
  1107. set_bit(ATM_VF_READY, &vcc->flags);
  1108. return 0;
  1109. }
  1110. static void
  1111. fore200e_close(struct atm_vcc* vcc)
  1112. {
  1113. struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
  1114. struct fore200e_vcc* fore200e_vcc;
  1115. struct fore200e_vc_map* vc_map;
  1116. unsigned long flags;
  1117. ASSERT(vcc);
  1118. ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
  1119. ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
  1120. DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
  1121. clear_bit(ATM_VF_READY, &vcc->flags);
  1122. fore200e_activate_vcin(fore200e, 0, vcc, 0);
  1123. spin_lock_irqsave(&fore200e->q_lock, flags);
  1124. vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
  1125. /* the vc is no longer considered as "in use" by fore200e_open() */
  1126. vc_map->vcc = NULL;
  1127. vcc->itf = vcc->vci = vcc->vpi = 0;
  1128. fore200e_vcc = FORE200E_VCC(vcc);
  1129. vcc->dev_data = NULL;
  1130. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  1131. /* release reserved bandwidth, if any */
  1132. if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
  1133. mutex_lock(&fore200e->rate_mtx);
  1134. fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
  1135. mutex_unlock(&fore200e->rate_mtx);
  1136. clear_bit(ATM_VF_HASQOS, &vcc->flags);
  1137. }
  1138. clear_bit(ATM_VF_ADDR, &vcc->flags);
  1139. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1140. ASSERT(fore200e_vcc);
  1141. kfree(fore200e_vcc);
  1142. }
  1143. static int
  1144. fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1145. {
  1146. struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
  1147. struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
  1148. struct fore200e_vc_map* vc_map;
  1149. struct host_txq* txq = &fore200e->host_txq;
  1150. struct host_txq_entry* entry;
  1151. struct tpd* tpd;
  1152. struct tpd_haddr tpd_haddr;
  1153. int retry = CONFIG_ATM_FORE200E_TX_RETRY;
  1154. int tx_copy = 0;
  1155. int tx_len = skb->len;
  1156. u32* cell_header = NULL;
  1157. unsigned char* skb_data;
  1158. int skb_len;
  1159. unsigned char* data;
  1160. unsigned long flags;
  1161. ASSERT(vcc);
  1162. ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
  1163. ASSERT(fore200e);
  1164. ASSERT(fore200e_vcc);
  1165. if (!test_bit(ATM_VF_READY, &vcc->flags)) {
  1166. DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
  1167. dev_kfree_skb_any(skb);
  1168. return -EINVAL;
  1169. }
  1170. #ifdef FORE200E_52BYTE_AAL0_SDU
  1171. if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
  1172. cell_header = (u32*) skb->data;
  1173. skb_data = skb->data + 4; /* skip 4-byte cell header */
  1174. skb_len = tx_len = skb->len - 4;
  1175. DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
  1176. }
  1177. else
  1178. #endif
  1179. {
  1180. skb_data = skb->data;
  1181. skb_len = skb->len;
  1182. }
  1183. if (((unsigned long)skb_data) & 0x3) {
  1184. DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
  1185. tx_copy = 1;
  1186. tx_len = skb_len;
  1187. }
  1188. if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
  1189. /* this simply NUKES the PCA board */
  1190. DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
  1191. tx_copy = 1;
  1192. tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
  1193. }
  1194. if (tx_copy) {
  1195. data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
  1196. if (data == NULL) {
  1197. if (vcc->pop) {
  1198. vcc->pop(vcc, skb);
  1199. }
  1200. else {
  1201. dev_kfree_skb_any(skb);
  1202. }
  1203. return -ENOMEM;
  1204. }
  1205. memcpy(data, skb_data, skb_len);
  1206. if (skb_len < tx_len)
  1207. memset(data + skb_len, 0x00, tx_len - skb_len);
  1208. }
  1209. else {
  1210. data = skb_data;
  1211. }
  1212. vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
  1213. ASSERT(vc_map->vcc == vcc);
  1214. retry_here:
  1215. spin_lock_irqsave(&fore200e->q_lock, flags);
  1216. entry = &txq->host_entry[ txq->head ];
  1217. if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
  1218. /* try to free completed tx queue entries */
  1219. fore200e_tx_irq(fore200e);
  1220. if (*entry->status != STATUS_FREE) {
  1221. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  1222. /* retry once again? */
  1223. if (--retry > 0) {
  1224. udelay(50);
  1225. goto retry_here;
  1226. }
  1227. atomic_inc(&vcc->stats->tx_err);
  1228. fore200e->tx_sat++;
  1229. DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
  1230. fore200e->name, fore200e->cp_queues->heartbeat);
  1231. if (vcc->pop) {
  1232. vcc->pop(vcc, skb);
  1233. }
  1234. else {
  1235. dev_kfree_skb_any(skb);
  1236. }
  1237. if (tx_copy)
  1238. kfree(data);
  1239. return -ENOBUFS;
  1240. }
  1241. }
  1242. entry->incarn = vc_map->incarn;
  1243. entry->vc_map = vc_map;
  1244. entry->skb = skb;
  1245. entry->data = tx_copy ? data : NULL;
  1246. tpd = entry->tpd;
  1247. tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
  1248. tpd->tsd[ 0 ].length = tx_len;
  1249. FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
  1250. txq->txing++;
  1251. /* The dma_map call above implies a dma_sync so the device can use it,
  1252. * thus no explicit dma_sync call is necessary here.
  1253. */
  1254. DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
  1255. vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
  1256. tpd->tsd[0].length, skb_len);
  1257. if (skb_len < fore200e_vcc->tx_min_pdu)
  1258. fore200e_vcc->tx_min_pdu = skb_len;
  1259. if (skb_len > fore200e_vcc->tx_max_pdu)
  1260. fore200e_vcc->tx_max_pdu = skb_len;
  1261. fore200e_vcc->tx_pdu++;
  1262. /* set tx rate control information */
  1263. tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
  1264. tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
  1265. if (cell_header) {
  1266. tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
  1267. tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
  1268. tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
  1269. tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
  1270. tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
  1271. }
  1272. else {
  1273. /* set the ATM header, common to all cells conveying the PDU */
  1274. tpd->atm_header.clp = 0;
  1275. tpd->atm_header.plt = 0;
  1276. tpd->atm_header.vci = vcc->vci;
  1277. tpd->atm_header.vpi = vcc->vpi;
  1278. tpd->atm_header.gfc = 0;
  1279. }
  1280. tpd->spec.length = tx_len;
  1281. tpd->spec.nseg = 1;
  1282. tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
  1283. tpd->spec.intr = 1;
  1284. tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
  1285. tpd_haddr.pad = 0;
  1286. tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
  1287. *entry->status = STATUS_PENDING;
  1288. fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
  1289. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  1290. return 0;
  1291. }
  1292. static int
  1293. fore200e_getstats(struct fore200e* fore200e)
  1294. {
  1295. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  1296. struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
  1297. struct stats_opcode opcode;
  1298. int ok;
  1299. u32 stats_dma_addr;
  1300. if (fore200e->stats == NULL) {
  1301. fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
  1302. if (fore200e->stats == NULL)
  1303. return -ENOMEM;
  1304. }
  1305. stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
  1306. sizeof(struct stats), DMA_FROM_DEVICE);
  1307. FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
  1308. opcode.opcode = OPCODE_GET_STATS;
  1309. opcode.pad = 0;
  1310. fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
  1311. *entry->status = STATUS_PENDING;
  1312. fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
  1313. ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
  1314. *entry->status = STATUS_FREE;
  1315. fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
  1316. if (ok == 0) {
  1317. printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
  1318. return -EIO;
  1319. }
  1320. return 0;
  1321. }
  1322. static int
  1323. fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
  1324. {
  1325. /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
  1326. DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
  1327. vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
  1328. return -EINVAL;
  1329. }
  1330. static int
  1331. fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
  1332. {
  1333. /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
  1334. DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
  1335. vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
  1336. return -EINVAL;
  1337. }
  1338. #if 0 /* currently unused */
  1339. static int
  1340. fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
  1341. {
  1342. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  1343. struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
  1344. struct oc3_opcode opcode;
  1345. int ok;
  1346. u32 oc3_regs_dma_addr;
  1347. oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
  1348. FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
  1349. opcode.opcode = OPCODE_GET_OC3;
  1350. opcode.reg = 0;
  1351. opcode.value = 0;
  1352. opcode.mask = 0;
  1353. fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
  1354. *entry->status = STATUS_PENDING;
  1355. fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
  1356. ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
  1357. *entry->status = STATUS_FREE;
  1358. fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
  1359. if (ok == 0) {
  1360. printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
  1361. return -EIO;
  1362. }
  1363. return 0;
  1364. }
  1365. #endif
  1366. static int
  1367. fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
  1368. {
  1369. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  1370. struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
  1371. struct oc3_opcode opcode;
  1372. int ok;
  1373. DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
  1374. FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
  1375. opcode.opcode = OPCODE_SET_OC3;
  1376. opcode.reg = reg;
  1377. opcode.value = value;
  1378. opcode.mask = mask;
  1379. fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
  1380. *entry->status = STATUS_PENDING;
  1381. fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
  1382. ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
  1383. *entry->status = STATUS_FREE;
  1384. if (ok == 0) {
  1385. printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
  1386. return -EIO;
  1387. }
  1388. return 0;
  1389. }
  1390. static int
  1391. fore200e_setloop(struct fore200e* fore200e, int loop_mode)
  1392. {
  1393. u32 mct_value, mct_mask;
  1394. int error;
  1395. if (!capable(CAP_NET_ADMIN))
  1396. return -EPERM;
  1397. switch (loop_mode) {
  1398. case ATM_LM_NONE:
  1399. mct_value = 0;
  1400. mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
  1401. break;
  1402. case ATM_LM_LOC_PHY:
  1403. mct_value = mct_mask = SUNI_MCT_DLE;
  1404. break;
  1405. case ATM_LM_RMT_PHY:
  1406. mct_value = mct_mask = SUNI_MCT_LLE;
  1407. break;
  1408. default:
  1409. return -EINVAL;
  1410. }
  1411. error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
  1412. if (error == 0)
  1413. fore200e->loop_mode = loop_mode;
  1414. return error;
  1415. }
  1416. static int
  1417. fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
  1418. {
  1419. struct sonet_stats tmp;
  1420. if (fore200e_getstats(fore200e) < 0)
  1421. return -EIO;
  1422. tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
  1423. tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
  1424. tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
  1425. tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
  1426. tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
  1427. tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
  1428. tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
  1429. tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
  1430. be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
  1431. be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
  1432. tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
  1433. be32_to_cpu(fore200e->stats->aal34.cells_received) +
  1434. be32_to_cpu(fore200e->stats->aal5.cells_received);
  1435. if (arg)
  1436. return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
  1437. return 0;
  1438. }
  1439. static int
  1440. fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
  1441. {
  1442. struct fore200e* fore200e = FORE200E_DEV(dev);
  1443. DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
  1444. switch (cmd) {
  1445. case SONET_GETSTAT:
  1446. return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
  1447. case SONET_GETDIAG:
  1448. return put_user(0, (int __user *)arg) ? -EFAULT : 0;
  1449. case ATM_SETLOOP:
  1450. return fore200e_setloop(fore200e, (int)(unsigned long)arg);
  1451. case ATM_GETLOOP:
  1452. return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
  1453. case ATM_QUERYLOOP:
  1454. return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
  1455. }
  1456. return -ENOSYS; /* not implemented */
  1457. }
  1458. static int
  1459. fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
  1460. {
  1461. struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
  1462. struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
  1463. if (!test_bit(ATM_VF_READY, &vcc->flags)) {
  1464. DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
  1465. return -EINVAL;
  1466. }
  1467. DPRINTK(2, "change_qos %d.%d.%d, "
  1468. "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
  1469. "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
  1470. "available_cell_rate = %u",
  1471. vcc->itf, vcc->vpi, vcc->vci,
  1472. fore200e_traffic_class[ qos->txtp.traffic_class ],
  1473. qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
  1474. fore200e_traffic_class[ qos->rxtp.traffic_class ],
  1475. qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
  1476. flags, fore200e->available_cell_rate);
  1477. if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
  1478. mutex_lock(&fore200e->rate_mtx);
  1479. if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
  1480. mutex_unlock(&fore200e->rate_mtx);
  1481. return -EAGAIN;
  1482. }
  1483. fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
  1484. fore200e->available_cell_rate -= qos->txtp.max_pcr;
  1485. mutex_unlock(&fore200e->rate_mtx);
  1486. memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
  1487. /* update rate control parameters */
  1488. fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
  1489. set_bit(ATM_VF_HASQOS, &vcc->flags);
  1490. return 0;
  1491. }
  1492. return -EINVAL;
  1493. }
  1494. static int __devinit
  1495. fore200e_irq_request(struct fore200e* fore200e)
  1496. {
  1497. if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
  1498. printk(FORE200E "unable to reserve IRQ %s for device %s\n",
  1499. fore200e_irq_itoa(fore200e->irq), fore200e->name);
  1500. return -EBUSY;
  1501. }
  1502. printk(FORE200E "IRQ %s reserved for device %s\n",
  1503. fore200e_irq_itoa(fore200e->irq), fore200e->name);
  1504. #ifdef FORE200E_USE_TASKLET
  1505. tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
  1506. tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
  1507. #endif
  1508. fore200e->state = FORE200E_STATE_IRQ;
  1509. return 0;
  1510. }
  1511. static int __devinit
  1512. fore200e_get_esi(struct fore200e* fore200e)
  1513. {
  1514. struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
  1515. int ok, i;
  1516. if (!prom)
  1517. return -ENOMEM;
  1518. ok = fore200e->bus->prom_read(fore200e, prom);
  1519. if (ok < 0) {
  1520. kfree(prom);
  1521. return -EBUSY;
  1522. }
  1523. printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
  1524. fore200e->name,
  1525. (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
  1526. prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
  1527. for (i = 0; i < ESI_LEN; i++) {
  1528. fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
  1529. }
  1530. kfree(prom);
  1531. return 0;
  1532. }
  1533. static int __devinit
  1534. fore200e_alloc_rx_buf(struct fore200e* fore200e)
  1535. {
  1536. int scheme, magn, nbr, size, i;
  1537. struct host_bsq* bsq;
  1538. struct buffer* buffer;
  1539. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
  1540. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
  1541. bsq = &fore200e->host_bsq[ scheme ][ magn ];
  1542. nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
  1543. size = fore200e_rx_buf_size[ scheme ][ magn ];
  1544. DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
  1545. /* allocate the array of receive buffers */
  1546. buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
  1547. if (buffer == NULL)
  1548. return -ENOMEM;
  1549. bsq->freebuf = NULL;
  1550. for (i = 0; i < nbr; i++) {
  1551. buffer[ i ].scheme = scheme;
  1552. buffer[ i ].magn = magn;
  1553. #ifdef FORE200E_BSQ_DEBUG
  1554. buffer[ i ].index = i;
  1555. buffer[ i ].supplied = 0;
  1556. #endif
  1557. /* allocate the receive buffer body */
  1558. if (fore200e_chunk_alloc(fore200e,
  1559. &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
  1560. DMA_FROM_DEVICE) < 0) {
  1561. while (i > 0)
  1562. fore200e_chunk_free(fore200e, &buffer[ --i ].data);
  1563. kfree(buffer);
  1564. return -ENOMEM;
  1565. }
  1566. /* insert the buffer into the free buffer list */
  1567. buffer[ i ].next = bsq->freebuf;
  1568. bsq->freebuf = &buffer[ i ];
  1569. }
  1570. /* all the buffers are free, initially */
  1571. bsq->freebuf_count = nbr;
  1572. #ifdef FORE200E_BSQ_DEBUG
  1573. bsq_audit(3, bsq, scheme, magn);
  1574. #endif
  1575. }
  1576. }
  1577. fore200e->state = FORE200E_STATE_ALLOC_BUF;
  1578. return 0;
  1579. }
  1580. static int __devinit
  1581. fore200e_init_bs_queue(struct fore200e* fore200e)
  1582. {
  1583. int scheme, magn, i;
  1584. struct host_bsq* bsq;
  1585. struct cp_bsq_entry __iomem * cp_entry;
  1586. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
  1587. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
  1588. DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
  1589. bsq = &fore200e->host_bsq[ scheme ][ magn ];
  1590. /* allocate and align the array of status words */
  1591. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1592. &bsq->status,
  1593. sizeof(enum status),
  1594. QUEUE_SIZE_BS,
  1595. fore200e->bus->status_alignment) < 0) {
  1596. return -ENOMEM;
  1597. }
  1598. /* allocate and align the array of receive buffer descriptors */
  1599. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1600. &bsq->rbd_block,
  1601. sizeof(struct rbd_block),
  1602. QUEUE_SIZE_BS,
  1603. fore200e->bus->descr_alignment) < 0) {
  1604. fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
  1605. return -ENOMEM;
  1606. }
  1607. /* get the base address of the cp resident buffer supply queue entries */
  1608. cp_entry = fore200e->virt_base +
  1609. fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
  1610. /* fill the host resident and cp resident buffer supply queue entries */
  1611. for (i = 0; i < QUEUE_SIZE_BS; i++) {
  1612. bsq->host_entry[ i ].status =
  1613. FORE200E_INDEX(bsq->status.align_addr, enum status, i);
  1614. bsq->host_entry[ i ].rbd_block =
  1615. FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
  1616. bsq->host_entry[ i ].rbd_block_dma =
  1617. FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
  1618. bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
  1619. *bsq->host_entry[ i ].status = STATUS_FREE;
  1620. fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
  1621. &cp_entry[ i ].status_haddr);
  1622. }
  1623. }
  1624. }
  1625. fore200e->state = FORE200E_STATE_INIT_BSQ;
  1626. return 0;
  1627. }
  1628. static int __devinit
  1629. fore200e_init_rx_queue(struct fore200e* fore200e)
  1630. {
  1631. struct host_rxq* rxq = &fore200e->host_rxq;
  1632. struct cp_rxq_entry __iomem * cp_entry;
  1633. int i;
  1634. DPRINTK(2, "receive queue is being initialized\n");
  1635. /* allocate and align the array of status words */
  1636. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1637. &rxq->status,
  1638. sizeof(enum status),
  1639. QUEUE_SIZE_RX,
  1640. fore200e->bus->status_alignment) < 0) {
  1641. return -ENOMEM;
  1642. }
  1643. /* allocate and align the array of receive PDU descriptors */
  1644. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1645. &rxq->rpd,
  1646. sizeof(struct rpd),
  1647. QUEUE_SIZE_RX,
  1648. fore200e->bus->descr_alignment) < 0) {
  1649. fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
  1650. return -ENOMEM;
  1651. }
  1652. /* get the base address of the cp resident rx queue entries */
  1653. cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
  1654. /* fill the host resident and cp resident rx entries */
  1655. for (i=0; i < QUEUE_SIZE_RX; i++) {
  1656. rxq->host_entry[ i ].status =
  1657. FORE200E_INDEX(rxq->status.align_addr, enum status, i);
  1658. rxq->host_entry[ i ].rpd =
  1659. FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
  1660. rxq->host_entry[ i ].rpd_dma =
  1661. FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
  1662. rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
  1663. *rxq->host_entry[ i ].status = STATUS_FREE;
  1664. fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
  1665. &cp_entry[ i ].status_haddr);
  1666. fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
  1667. &cp_entry[ i ].rpd_haddr);
  1668. }
  1669. /* set the head entry of the queue */
  1670. rxq->head = 0;
  1671. fore200e->state = FORE200E_STATE_INIT_RXQ;
  1672. return 0;
  1673. }
  1674. static int __devinit
  1675. fore200e_init_tx_queue(struct fore200e* fore200e)
  1676. {
  1677. struct host_txq* txq = &fore200e->host_txq;
  1678. struct cp_txq_entry __iomem * cp_entry;
  1679. int i;
  1680. DPRINTK(2, "transmit queue is being initialized\n");
  1681. /* allocate and align the array of status words */
  1682. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1683. &txq->status,
  1684. sizeof(enum status),
  1685. QUEUE_SIZE_TX,
  1686. fore200e->bus->status_alignment) < 0) {
  1687. return -ENOMEM;
  1688. }
  1689. /* allocate and align the array of transmit PDU descriptors */
  1690. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1691. &txq->tpd,
  1692. sizeof(struct tpd),
  1693. QUEUE_SIZE_TX,
  1694. fore200e->bus->descr_alignment) < 0) {
  1695. fore200e->bus->dma_chunk_free(fore200e, &txq->status);
  1696. return -ENOMEM;
  1697. }
  1698. /* get the base address of the cp resident tx queue entries */
  1699. cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
  1700. /* fill the host resident and cp resident tx entries */
  1701. for (i=0; i < QUEUE_SIZE_TX; i++) {
  1702. txq->host_entry[ i ].status =
  1703. FORE200E_INDEX(txq->status.align_addr, enum status, i);
  1704. txq->host_entry[ i ].tpd =
  1705. FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
  1706. txq->host_entry[ i ].tpd_dma =
  1707. FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
  1708. txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
  1709. *txq->host_entry[ i ].status = STATUS_FREE;
  1710. fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
  1711. &cp_entry[ i ].status_haddr);
  1712. /* although there is a one-to-one mapping of tx queue entries and tpds,
  1713. we do not write here the DMA (physical) base address of each tpd into
  1714. the related cp resident entry, because the cp relies on this write
  1715. operation to detect that a new pdu has been submitted for tx */
  1716. }
  1717. /* set the head and tail entries of the queue */
  1718. txq->head = 0;
  1719. txq->tail = 0;
  1720. fore200e->state = FORE200E_STATE_INIT_TXQ;
  1721. return 0;
  1722. }
  1723. static int __devinit
  1724. fore200e_init_cmd_queue(struct fore200e* fore200e)
  1725. {
  1726. struct host_cmdq* cmdq = &fore200e->host_cmdq;
  1727. struct cp_cmdq_entry __iomem * cp_entry;
  1728. int i;
  1729. DPRINTK(2, "command queue is being initialized\n");
  1730. /* allocate and align the array of status words */
  1731. if (fore200e->bus->dma_chunk_alloc(fore200e,
  1732. &cmdq->status,
  1733. sizeof(enum status),
  1734. QUEUE_SIZE_CMD,
  1735. fore200e->bus->status_alignment) < 0) {
  1736. return -ENOMEM;
  1737. }
  1738. /* get the base address of the cp resident cmd queue entries */
  1739. cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
  1740. /* fill the host resident and cp resident cmd entries */
  1741. for (i=0; i < QUEUE_SIZE_CMD; i++) {
  1742. cmdq->host_entry[ i ].status =
  1743. FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
  1744. cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
  1745. *cmdq->host_entry[ i ].status = STATUS_FREE;
  1746. fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
  1747. &cp_entry[ i ].status_haddr);
  1748. }
  1749. /* set the head entry of the queue */
  1750. cmdq->head = 0;
  1751. fore200e->state = FORE200E_STATE_INIT_CMDQ;
  1752. return 0;
  1753. }
  1754. static void __devinit
  1755. fore200e_param_bs_queue(struct fore200e* fore200e,
  1756. enum buffer_scheme scheme, enum buffer_magn magn,
  1757. int queue_length, int pool_size, int supply_blksize)
  1758. {
  1759. struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
  1760. fore200e->bus->write(queue_length, &bs_spec->queue_length);
  1761. fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
  1762. fore200e->bus->write(pool_size, &bs_spec->pool_size);
  1763. fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
  1764. }
  1765. static int __devinit
  1766. fore200e_initialize(struct fore200e* fore200e)
  1767. {
  1768. struct cp_queues __iomem * cpq;
  1769. int ok, scheme, magn;
  1770. DPRINTK(2, "device %s being initialized\n", fore200e->name);
  1771. mutex_init(&fore200e->rate_mtx);
  1772. spin_lock_init(&fore200e->q_lock);
  1773. cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
  1774. /* enable cp to host interrupts */
  1775. fore200e->bus->write(1, &cpq->imask);
  1776. if (fore200e->bus->irq_enable)
  1777. fore200e->bus->irq_enable(fore200e);
  1778. fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
  1779. fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
  1780. fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
  1781. fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
  1782. fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
  1783. fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
  1784. for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
  1785. for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
  1786. fore200e_param_bs_queue(fore200e, scheme, magn,
  1787. QUEUE_SIZE_BS,
  1788. fore200e_rx_buf_nbr[ scheme ][ magn ],
  1789. RBD_BLK_SIZE);
  1790. /* issue the initialize command */
  1791. fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
  1792. fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
  1793. ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
  1794. if (ok == 0) {
  1795. printk(FORE200E "device %s initialization failed\n", fore200e->name);
  1796. return -ENODEV;
  1797. }
  1798. printk(FORE200E "device %s initialized\n", fore200e->name);
  1799. fore200e->state = FORE200E_STATE_INITIALIZE;
  1800. return 0;
  1801. }
  1802. static void __devinit
  1803. fore200e_monitor_putc(struct fore200e* fore200e, char c)
  1804. {
  1805. struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
  1806. #if 0
  1807. printk("%c", c);
  1808. #endif
  1809. fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
  1810. }
  1811. static int __devinit
  1812. fore200e_monitor_getc(struct fore200e* fore200e)
  1813. {
  1814. struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
  1815. unsigned long timeout = jiffies + msecs_to_jiffies(50);
  1816. int c;
  1817. while (time_before(jiffies, timeout)) {
  1818. c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
  1819. if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
  1820. fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
  1821. #if 0
  1822. printk("%c", c & 0xFF);
  1823. #endif
  1824. return c & 0xFF;
  1825. }
  1826. }
  1827. return -1;
  1828. }
  1829. static void __devinit
  1830. fore200e_monitor_puts(struct fore200e* fore200e, char* str)
  1831. {
  1832. while (*str) {
  1833. /* the i960 monitor doesn't accept any new character if it has something to say */
  1834. while (fore200e_monitor_getc(fore200e) >= 0);
  1835. fore200e_monitor_putc(fore200e, *str++);
  1836. }
  1837. while (fore200e_monitor_getc(fore200e) >= 0);
  1838. }
  1839. #ifdef __LITTLE_ENDIAN
  1840. #define FW_EXT ".bin"
  1841. #else
  1842. #define FW_EXT "_ecd.bin2"
  1843. #endif
  1844. static int __devinit
  1845. fore200e_load_and_start_fw(struct fore200e* fore200e)
  1846. {
  1847. const struct firmware *firmware;
  1848. struct device *device;
  1849. struct fw_header *fw_header;
  1850. const __le32 *fw_data;
  1851. u32 fw_size;
  1852. u32 __iomem *load_addr;
  1853. char buf[48];
  1854. int err = -ENODEV;
  1855. if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
  1856. device = &((struct pci_dev *) fore200e->bus_dev)->dev;
  1857. #ifdef CONFIG_SBUS
  1858. else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
  1859. device = &((struct platform_device *) fore200e->bus_dev)->dev;
  1860. #endif
  1861. else
  1862. return err;
  1863. sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
  1864. if ((err = request_firmware(&firmware, buf, device)) < 0) {
  1865. printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
  1866. return err;
  1867. }
  1868. fw_data = (__le32 *) firmware->data;
  1869. fw_size = firmware->size / sizeof(u32);
  1870. fw_header = (struct fw_header *) firmware->data;
  1871. load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
  1872. DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
  1873. fore200e->name, load_addr, fw_size);
  1874. if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
  1875. printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
  1876. goto release;
  1877. }
  1878. for (; fw_size--; fw_data++, load_addr++)
  1879. fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
  1880. DPRINTK(2, "device %s firmware being started\n", fore200e->name);
  1881. #if defined(__sparc_v9__)
  1882. /* reported to be required by SBA cards on some sparc64 hosts */
  1883. fore200e_spin(100);
  1884. #endif
  1885. sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
  1886. fore200e_monitor_puts(fore200e, buf);
  1887. if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
  1888. printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
  1889. goto release;
  1890. }
  1891. printk(FORE200E "device %s firmware started\n", fore200e->name);
  1892. fore200e->state = FORE200E_STATE_START_FW;
  1893. err = 0;
  1894. release:
  1895. release_firmware(firmware);
  1896. return err;
  1897. }
  1898. static int __devinit
  1899. fore200e_register(struct fore200e* fore200e, struct device *parent)
  1900. {
  1901. struct atm_dev* atm_dev;
  1902. DPRINTK(2, "device %s being registered\n", fore200e->name);
  1903. atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
  1904. -1, NULL);
  1905. if (atm_dev == NULL) {
  1906. printk(FORE200E "unable to register device %s\n", fore200e->name);
  1907. return -ENODEV;
  1908. }
  1909. atm_dev->dev_data = fore200e;
  1910. fore200e->atm_dev = atm_dev;
  1911. atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
  1912. atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
  1913. fore200e->available_cell_rate = ATM_OC3_PCR;
  1914. fore200e->state = FORE200E_STATE_REGISTER;
  1915. return 0;
  1916. }
  1917. static int __devinit
  1918. fore200e_init(struct fore200e* fore200e, struct device *parent)
  1919. {
  1920. if (fore200e_register(fore200e, parent) < 0)
  1921. return -ENODEV;
  1922. if (fore200e->bus->configure(fore200e) < 0)
  1923. return -ENODEV;
  1924. if (fore200e->bus->map(fore200e) < 0)
  1925. return -ENODEV;
  1926. if (fore200e_reset(fore200e, 1) < 0)
  1927. return -ENODEV;
  1928. if (fore200e_load_and_start_fw(fore200e) < 0)
  1929. return -ENODEV;
  1930. if (fore200e_initialize(fore200e) < 0)
  1931. return -ENODEV;
  1932. if (fore200e_init_cmd_queue(fore200e) < 0)
  1933. return -ENOMEM;
  1934. if (fore200e_init_tx_queue(fore200e) < 0)
  1935. return -ENOMEM;
  1936. if (fore200e_init_rx_queue(fore200e) < 0)
  1937. return -ENOMEM;
  1938. if (fore200e_init_bs_queue(fore200e) < 0)
  1939. return -ENOMEM;
  1940. if (fore200e_alloc_rx_buf(fore200e) < 0)
  1941. return -ENOMEM;
  1942. if (fore200e_get_esi(fore200e) < 0)
  1943. return -EIO;
  1944. if (fore200e_irq_request(fore200e) < 0)
  1945. return -EBUSY;
  1946. fore200e_supply(fore200e);
  1947. /* all done, board initialization is now complete */
  1948. fore200e->state = FORE200E_STATE_COMPLETE;
  1949. return 0;
  1950. }
  1951. #ifdef CONFIG_SBUS
  1952. static const struct of_device_id fore200e_sba_match[];
  1953. static int __devinit fore200e_sba_probe(struct platform_device *op)
  1954. {
  1955. const struct of_device_id *match;
  1956. const struct fore200e_bus *bus;
  1957. struct fore200e *fore200e;
  1958. static int index = 0;
  1959. int err;
  1960. match = of_match_device(fore200e_sba_match, &op->dev);
  1961. if (!match)
  1962. return -EINVAL;
  1963. bus = match->data;
  1964. fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
  1965. if (!fore200e)
  1966. return -ENOMEM;
  1967. fore200e->bus = bus;
  1968. fore200e->bus_dev = op;
  1969. fore200e->irq = op->archdata.irqs[0];
  1970. fore200e->phys_base = op->resource[0].start;
  1971. sprintf(fore200e->name, "%s-%d", bus->model_name, index);
  1972. err = fore200e_init(fore200e, &op->dev);
  1973. if (err < 0) {
  1974. fore200e_shutdown(fore200e);
  1975. kfree(fore200e);
  1976. return err;
  1977. }
  1978. index++;
  1979. dev_set_drvdata(&op->dev, fore200e);
  1980. return 0;
  1981. }
  1982. static int __devexit fore200e_sba_remove(struct platform_device *op)
  1983. {
  1984. struct fore200e *fore200e = dev_get_drvdata(&op->dev);
  1985. fore200e_shutdown(fore200e);
  1986. kfree(fore200e);
  1987. return 0;
  1988. }
  1989. static const struct of_device_id fore200e_sba_match[] = {
  1990. {
  1991. .name = SBA200E_PROM_NAME,
  1992. .data = (void *) &fore200e_bus[1],
  1993. },
  1994. {},
  1995. };
  1996. MODULE_DEVICE_TABLE(of, fore200e_sba_match);
  1997. static struct platform_driver fore200e_sba_driver = {
  1998. .driver = {
  1999. .name = "fore_200e",
  2000. .owner = THIS_MODULE,
  2001. .of_match_table = fore200e_sba_match,
  2002. },
  2003. .probe = fore200e_sba_probe,
  2004. .remove = __devexit_p(fore200e_sba_remove),
  2005. };
  2006. #endif
  2007. #ifdef CONFIG_PCI
  2008. static int __devinit
  2009. fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
  2010. {
  2011. const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
  2012. struct fore200e* fore200e;
  2013. int err = 0;
  2014. static int index = 0;
  2015. if (pci_enable_device(pci_dev)) {
  2016. err = -EINVAL;
  2017. goto out;
  2018. }
  2019. fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
  2020. if (fore200e == NULL) {
  2021. err = -ENOMEM;
  2022. goto out_disable;
  2023. }
  2024. fore200e->bus = bus;
  2025. fore200e->bus_dev = pci_dev;
  2026. fore200e->irq = pci_dev->irq;
  2027. fore200e->phys_base = pci_resource_start(pci_dev, 0);
  2028. sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
  2029. pci_set_master(pci_dev);
  2030. printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
  2031. fore200e->bus->model_name,
  2032. fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
  2033. sprintf(fore200e->name, "%s-%d", bus->model_name, index);
  2034. err = fore200e_init(fore200e, &pci_dev->dev);
  2035. if (err < 0) {
  2036. fore200e_shutdown(fore200e);
  2037. goto out_free;
  2038. }
  2039. ++index;
  2040. pci_set_drvdata(pci_dev, fore200e);
  2041. out:
  2042. return err;
  2043. out_free:
  2044. kfree(fore200e);
  2045. out_disable:
  2046. pci_disable_device(pci_dev);
  2047. goto out;
  2048. }
  2049. static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
  2050. {
  2051. struct fore200e *fore200e;
  2052. fore200e = pci_get_drvdata(pci_dev);
  2053. fore200e_shutdown(fore200e);
  2054. kfree(fore200e);
  2055. pci_disable_device(pci_dev);
  2056. }
  2057. static struct pci_device_id fore200e_pca_tbl[] = {
  2058. { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
  2059. 0, 0, (unsigned long) &fore200e_bus[0] },
  2060. { 0, }
  2061. };
  2062. MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
  2063. static struct pci_driver fore200e_pca_driver = {
  2064. .name = "fore_200e",
  2065. .probe = fore200e_pca_detect,
  2066. .remove = __devexit_p(fore200e_pca_remove_one),
  2067. .id_table = fore200e_pca_tbl,
  2068. };
  2069. #endif
  2070. static int __init fore200e_module_init(void)
  2071. {
  2072. int err;
  2073. printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
  2074. #ifdef CONFIG_SBUS
  2075. err = platform_driver_register(&fore200e_sba_driver);
  2076. if (err)
  2077. return err;
  2078. #endif
  2079. #ifdef CONFIG_PCI
  2080. err = pci_register_driver(&fore200e_pca_driver);
  2081. #endif
  2082. #ifdef CONFIG_SBUS
  2083. if (err)
  2084. platform_driver_unregister(&fore200e_sba_driver);
  2085. #endif
  2086. return err;
  2087. }
  2088. static void __exit fore200e_module_cleanup(void)
  2089. {
  2090. #ifdef CONFIG_PCI
  2091. pci_unregister_driver(&fore200e_pca_driver);
  2092. #endif
  2093. #ifdef CONFIG_SBUS
  2094. platform_driver_unregister(&fore200e_sba_driver);
  2095. #endif
  2096. }
  2097. static int
  2098. fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
  2099. {
  2100. struct fore200e* fore200e = FORE200E_DEV(dev);
  2101. struct fore200e_vcc* fore200e_vcc;
  2102. struct atm_vcc* vcc;
  2103. int i, len, left = *pos;
  2104. unsigned long flags;
  2105. if (!left--) {
  2106. if (fore200e_getstats(fore200e) < 0)
  2107. return -EIO;
  2108. len = sprintf(page,"\n"
  2109. " device:\n"
  2110. " internal name:\t\t%s\n", fore200e->name);
  2111. /* print bus-specific information */
  2112. if (fore200e->bus->proc_read)
  2113. len += fore200e->bus->proc_read(fore200e, page + len);
  2114. len += sprintf(page + len,
  2115. " interrupt line:\t\t%s\n"
  2116. " physical base address:\t0x%p\n"
  2117. " virtual base address:\t0x%p\n"
  2118. " factory address (ESI):\t%pM\n"
  2119. " board serial number:\t\t%d\n\n",
  2120. fore200e_irq_itoa(fore200e->irq),
  2121. (void*)fore200e->phys_base,
  2122. fore200e->virt_base,
  2123. fore200e->esi,
  2124. fore200e->esi[4] * 256 + fore200e->esi[5]);
  2125. return len;
  2126. }
  2127. if (!left--)
  2128. return sprintf(page,
  2129. " free small bufs, scheme 1:\t%d\n"
  2130. " free large bufs, scheme 1:\t%d\n"
  2131. " free small bufs, scheme 2:\t%d\n"
  2132. " free large bufs, scheme 2:\t%d\n",
  2133. fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
  2134. fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
  2135. fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
  2136. fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
  2137. if (!left--) {
  2138. u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
  2139. len = sprintf(page,"\n\n"
  2140. " cell processor:\n"
  2141. " heartbeat state:\t\t");
  2142. if (hb >> 16 != 0xDEAD)
  2143. len += sprintf(page + len, "0x%08x\n", hb);
  2144. else
  2145. len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
  2146. return len;
  2147. }
  2148. if (!left--) {
  2149. static const char* media_name[] = {
  2150. "unshielded twisted pair",
  2151. "multimode optical fiber ST",
  2152. "multimode optical fiber SC",
  2153. "single-mode optical fiber ST",
  2154. "single-mode optical fiber SC",
  2155. "unknown"
  2156. };
  2157. static const char* oc3_mode[] = {
  2158. "normal operation",
  2159. "diagnostic loopback",
  2160. "line loopback",
  2161. "unknown"
  2162. };
  2163. u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
  2164. u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
  2165. u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
  2166. u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
  2167. u32 oc3_index;
  2168. if (media_index > 4)
  2169. media_index = 5;
  2170. switch (fore200e->loop_mode) {
  2171. case ATM_LM_NONE: oc3_index = 0;
  2172. break;
  2173. case ATM_LM_LOC_PHY: oc3_index = 1;
  2174. break;
  2175. case ATM_LM_RMT_PHY: oc3_index = 2;
  2176. break;
  2177. default: oc3_index = 3;
  2178. }
  2179. return sprintf(page,
  2180. " firmware release:\t\t%d.%d.%d\n"
  2181. " monitor release:\t\t%d.%d\n"
  2182. " media type:\t\t\t%s\n"
  2183. " OC-3 revision:\t\t0x%x\n"
  2184. " OC-3 mode:\t\t\t%s",
  2185. fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
  2186. mon960_release >> 16, mon960_release << 16 >> 16,
  2187. media_name[ media_index ],
  2188. oc3_revision,
  2189. oc3_mode[ oc3_index ]);
  2190. }
  2191. if (!left--) {
  2192. struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
  2193. return sprintf(page,
  2194. "\n\n"
  2195. " monitor:\n"
  2196. " version number:\t\t%d\n"
  2197. " boot status word:\t\t0x%08x\n",
  2198. fore200e->bus->read(&cp_monitor->mon_version),
  2199. fore200e->bus->read(&cp_monitor->bstat));
  2200. }
  2201. if (!left--)
  2202. return sprintf(page,
  2203. "\n"
  2204. " device statistics:\n"
  2205. " 4b5b:\n"
  2206. " crc_header_errors:\t\t%10u\n"
  2207. " framing_errors:\t\t%10u\n",
  2208. be32_to_cpu(fore200e->stats->phy.crc_header_errors),
  2209. be32_to_cpu(fore200e->stats->phy.framing_errors));
  2210. if (!left--)
  2211. return sprintf(page, "\n"
  2212. " OC-3:\n"
  2213. " section_bip8_errors:\t%10u\n"
  2214. " path_bip8_errors:\t\t%10u\n"
  2215. " line_bip24_errors:\t\t%10u\n"
  2216. " line_febe_errors:\t\t%10u\n"
  2217. " path_febe_errors:\t\t%10u\n"
  2218. " corr_hcs_errors:\t\t%10u\n"
  2219. " ucorr_hcs_errors:\t\t%10u\n",
  2220. be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
  2221. be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
  2222. be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
  2223. be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
  2224. be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
  2225. be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
  2226. be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
  2227. if (!left--)
  2228. return sprintf(page,"\n"
  2229. " ATM:\t\t\t\t cells\n"
  2230. " TX:\t\t\t%10u\n"
  2231. " RX:\t\t\t%10u\n"
  2232. " vpi out of range:\t\t%10u\n"
  2233. " vpi no conn:\t\t%10u\n"
  2234. " vci out of range:\t\t%10u\n"
  2235. " vci no conn:\t\t%10u\n",
  2236. be32_to_cpu(fore200e->stats->atm.cells_transmitted),
  2237. be32_to_cpu(fore200e->stats->atm.cells_received),
  2238. be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
  2239. be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
  2240. be32_to_cpu(fore200e->stats->atm.vci_bad_range),
  2241. be32_to_cpu(fore200e->stats->atm.vci_no_conn));
  2242. if (!left--)
  2243. return sprintf(page,"\n"
  2244. " AAL0:\t\t\t cells\n"
  2245. " TX:\t\t\t%10u\n"
  2246. " RX:\t\t\t%10u\n"
  2247. " dropped:\t\t\t%10u\n",
  2248. be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
  2249. be32_to_cpu(fore200e->stats->aal0.cells_received),
  2250. be32_to_cpu(fore200e->stats->aal0.cells_dropped));
  2251. if (!left--)
  2252. return sprintf(page,"\n"
  2253. " AAL3/4:\n"
  2254. " SAR sublayer:\t\t cells\n"
  2255. " TX:\t\t\t%10u\n"
  2256. " RX:\t\t\t%10u\n"
  2257. " dropped:\t\t\t%10u\n"
  2258. " CRC errors:\t\t%10u\n"
  2259. " protocol errors:\t\t%10u\n\n"
  2260. " CS sublayer:\t\t PDUs\n"
  2261. " TX:\t\t\t%10u\n"
  2262. " RX:\t\t\t%10u\n"
  2263. " dropped:\t\t\t%10u\n"
  2264. " protocol errors:\t\t%10u\n",
  2265. be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
  2266. be32_to_cpu(fore200e->stats->aal34.cells_received),
  2267. be32_to_cpu(fore200e->stats->aal34.cells_dropped),
  2268. be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
  2269. be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
  2270. be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
  2271. be32_to_cpu(fore200e->stats->aal34.cspdus_received),
  2272. be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
  2273. be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
  2274. if (!left--)
  2275. return sprintf(page,"\n"
  2276. " AAL5:\n"
  2277. " SAR sublayer:\t\t cells\n"
  2278. " TX:\t\t\t%10u\n"
  2279. " RX:\t\t\t%10u\n"
  2280. " dropped:\t\t\t%10u\n"
  2281. " congestions:\t\t%10u\n\n"
  2282. " CS sublayer:\t\t PDUs\n"
  2283. " TX:\t\t\t%10u\n"
  2284. " RX:\t\t\t%10u\n"
  2285. " dropped:\t\t\t%10u\n"
  2286. " CRC errors:\t\t%10u\n"
  2287. " protocol errors:\t\t%10u\n",
  2288. be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
  2289. be32_to_cpu(fore200e->stats->aal5.cells_received),
  2290. be32_to_cpu(fore200e->stats->aal5.cells_dropped),
  2291. be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
  2292. be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
  2293. be32_to_cpu(fore200e->stats->aal5.cspdus_received),
  2294. be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
  2295. be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
  2296. be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
  2297. if (!left--)
  2298. return sprintf(page,"\n"
  2299. " AUX:\t\t allocation failures\n"
  2300. " small b1:\t\t\t%10u\n"
  2301. " large b1:\t\t\t%10u\n"
  2302. " small b2:\t\t\t%10u\n"
  2303. " large b2:\t\t\t%10u\n"
  2304. " RX PDUs:\t\t\t%10u\n"
  2305. " TX PDUs:\t\t\t%10lu\n",
  2306. be32_to_cpu(fore200e->stats->aux.small_b1_failed),
  2307. be32_to_cpu(fore200e->stats->aux.large_b1_failed),
  2308. be32_to_cpu(fore200e->stats->aux.small_b2_failed),
  2309. be32_to_cpu(fore200e->stats->aux.large_b2_failed),
  2310. be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
  2311. fore200e->tx_sat);
  2312. if (!left--)
  2313. return sprintf(page,"\n"
  2314. " receive carrier:\t\t\t%s\n",
  2315. fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
  2316. if (!left--) {
  2317. return sprintf(page,"\n"
  2318. " VCCs:\n address VPI VCI AAL "
  2319. "TX PDUs TX min/max size RX PDUs RX min/max size\n");
  2320. }
  2321. for (i = 0; i < NBR_CONNECT; i++) {
  2322. vcc = fore200e->vc_map[i].vcc;
  2323. if (vcc == NULL)
  2324. continue;
  2325. spin_lock_irqsave(&fore200e->q_lock, flags);
  2326. if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
  2327. fore200e_vcc = FORE200E_VCC(vcc);
  2328. ASSERT(fore200e_vcc);
  2329. len = sprintf(page,
  2330. " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
  2331. (u32)(unsigned long)vcc,
  2332. vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
  2333. fore200e_vcc->tx_pdu,
  2334. fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
  2335. fore200e_vcc->tx_max_pdu,
  2336. fore200e_vcc->rx_pdu,
  2337. fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
  2338. fore200e_vcc->rx_max_pdu);
  2339. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  2340. return len;
  2341. }
  2342. spin_unlock_irqrestore(&fore200e->q_lock, flags);
  2343. }
  2344. return 0;
  2345. }
  2346. module_init(fore200e_module_init);
  2347. module_exit(fore200e_module_cleanup);
  2348. static const struct atmdev_ops fore200e_ops =
  2349. {
  2350. .open = fore200e_open,
  2351. .close = fore200e_close,
  2352. .ioctl = fore200e_ioctl,
  2353. .getsockopt = fore200e_getsockopt,
  2354. .setsockopt = fore200e_setsockopt,
  2355. .send = fore200e_send,
  2356. .change_qos = fore200e_change_qos,
  2357. .proc_read = fore200e_proc_read,
  2358. .owner = THIS_MODULE
  2359. };
  2360. static const struct fore200e_bus fore200e_bus[] = {
  2361. #ifdef CONFIG_PCI
  2362. { "PCA-200E", "pca200e", 32, 4, 32,
  2363. fore200e_pca_read,
  2364. fore200e_pca_write,
  2365. fore200e_pca_dma_map,
  2366. fore200e_pca_dma_unmap,
  2367. fore200e_pca_dma_sync_for_cpu,
  2368. fore200e_pca_dma_sync_for_device,
  2369. fore200e_pca_dma_chunk_alloc,
  2370. fore200e_pca_dma_chunk_free,
  2371. fore200e_pca_configure,
  2372. fore200e_pca_map,
  2373. fore200e_pca_reset,
  2374. fore200e_pca_prom_read,
  2375. fore200e_pca_unmap,
  2376. NULL,
  2377. fore200e_pca_irq_check,
  2378. fore200e_pca_irq_ack,
  2379. fore200e_pca_proc_read,
  2380. },
  2381. #endif
  2382. #ifdef CONFIG_SBUS
  2383. { "SBA-200E", "sba200e", 32, 64, 32,
  2384. fore200e_sba_read,
  2385. fore200e_sba_write,
  2386. fore200e_sba_dma_map,
  2387. fore200e_sba_dma_unmap,
  2388. fore200e_sba_dma_sync_for_cpu,
  2389. fore200e_sba_dma_sync_for_device,
  2390. fore200e_sba_dma_chunk_alloc,
  2391. fore200e_sba_dma_chunk_free,
  2392. fore200e_sba_configure,
  2393. fore200e_sba_map,
  2394. fore200e_sba_reset,
  2395. fore200e_sba_prom_read,
  2396. fore200e_sba_unmap,
  2397. fore200e_sba_irq_enable,
  2398. fore200e_sba_irq_check,
  2399. fore200e_sba_irq_ack,
  2400. fore200e_sba_proc_read,
  2401. },
  2402. #endif
  2403. {}
  2404. };
  2405. MODULE_LICENSE("GPL");
  2406. #ifdef CONFIG_PCI
  2407. #ifdef __LITTLE_ENDIAN__
  2408. MODULE_FIRMWARE("pca200e.bin");
  2409. #else
  2410. MODULE_FIRMWARE("pca200e_ecd.bin2");
  2411. #endif
  2412. #endif /* CONFIG_PCI */
  2413. #ifdef CONFIG_SBUS
  2414. MODULE_FIRMWARE("sba200e_ecd.bin2");
  2415. #endif