hndpmu.c 3.8 KB

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  1. /*
  2. * Misc utility routines for accessing PMU corerev specific features
  3. * of the SiliconBackplane-based Broadcom chips.
  4. *
  5. * Copyright (C) 1999-2010, Broadcom Corporation
  6. *
  7. * Unless you and Broadcom execute a separate written software license
  8. * agreement governing use of this software, this software is licensed to you
  9. * under the terms of the GNU General Public License version 2 (the "GPL"),
  10. * available at http://www.broadcom.com/licenses/GPLv2.php, with the
  11. * following added to such license:
  12. *
  13. * As a special exception, the copyright holders of this software give you
  14. * permission to link this software with independent modules, and to copy and
  15. * distribute the resulting executable under terms of your choice, provided that
  16. * you also meet, for each linked independent module, the terms and conditions of
  17. * the license of that module. An independent module is a module which is not
  18. * derived from this software. The special exception does not apply to any
  19. * modifications of the software.
  20. *
  21. * Notwithstanding the above, under no circumstances may you combine this
  22. * software in any way with any other Broadcom software provided under a license
  23. * other than the GPL, without Broadcom's express prior written consent.
  24. *
  25. * $Id: hndpmu.c,v 1.95.2.17.4.11.2.63 2010/07/21 13:55:09 Exp $
  26. */
  27. #include <typedefs.h>
  28. #include <bcmdefs.h>
  29. #include <osl.h>
  30. #include <bcmutils.h>
  31. #include <siutils.h>
  32. #include <bcmdevs.h>
  33. #include <hndsoc.h>
  34. #include <sbchipc.h>
  35. #include <hndpmu.h>
  36. /* debug/trace */
  37. #define PMU_ERROR(args)
  38. #define PMU_MSG(args)
  39. /* SDIO Pad drive strength to select value mappings */
  40. typedef struct {
  41. uint8 strength; /* Pad Drive Strength in mA */
  42. uint8 sel; /* Chip-specific select value */
  43. } sdiod_drive_str_t;
  44. /* SDIO Drive Strength to sel value table for PMU Rev 1 */
  45. static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = {
  46. {4, 0x2},
  47. {2, 0x3},
  48. {1, 0x0},
  49. {0, 0x0} };
  50. /* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
  51. static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = {
  52. {12, 0x7},
  53. {10, 0x6},
  54. {8, 0x5},
  55. {6, 0x4},
  56. {4, 0x2},
  57. {2, 0x1},
  58. {0, 0x0} };
  59. #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
  60. void
  61. si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength)
  62. {
  63. chipcregs_t *cc;
  64. uint origidx, intr_val = 0;
  65. sdiod_drive_str_t *str_tab = NULL;
  66. uint32 str_mask = 0;
  67. uint32 str_shift = 0;
  68. if (!(sih->cccaps & CC_CAP_PMU)) {
  69. return;
  70. }
  71. /* Remember original core before switch to chipc */
  72. cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx, &intr_val);
  73. switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
  74. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
  75. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
  76. str_mask = 0x30000000;
  77. str_shift = 28;
  78. break;
  79. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
  80. case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
  81. case SDIOD_DRVSTR_KEY(BCM4315_CHIP_ID, 4):
  82. str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
  83. str_mask = 0x00003800;
  84. str_shift = 11;
  85. break;
  86. default:
  87. PMU_MSG(("No SDIO Drive strength init done for chip %x rev %d pmurev %d\n",
  88. sih->chip, sih->chiprev, sih->pmurev));
  89. break;
  90. }
  91. if (str_tab != NULL) {
  92. uint32 drivestrength_sel = 0;
  93. uint32 cc_data_temp;
  94. int i;
  95. for (i = 0; str_tab[i].strength != 0; i ++) {
  96. if (drivestrength >= str_tab[i].strength) {
  97. drivestrength_sel = str_tab[i].sel;
  98. break;
  99. }
  100. }
  101. W_REG(osh, &cc->chipcontrol_addr, 1);
  102. cc_data_temp = R_REG(osh, &cc->chipcontrol_data);
  103. cc_data_temp &= ~str_mask;
  104. drivestrength_sel <<= str_shift;
  105. cc_data_temp |= drivestrength_sel;
  106. W_REG(osh, &cc->chipcontrol_data, cc_data_temp);
  107. PMU_MSG(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
  108. drivestrength, cc_data_temp));
  109. }
  110. /* Return to original core */
  111. si_restore_core(sih, origidx, intr_val);
  112. }