hdmi_tx_cec.h 17 KB

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  1. /*
  2. * Amlogic M1
  3. * HDMI CEC Driver-----------HDMI_TX
  4. * Copyright (C) 2011 Amlogic, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the named License,
  9. * or any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #ifndef _TV_CEC_H_
  18. #define _TV_CEC_H_
  19. #include "hdmi_tx_module.h"
  20. //#define CEC0_LOG_ADDR 0 // TV logical address
  21. #define CEC0_LOG_ADDR 4 // MBX logical address
  22. #define TV_CEC_INTERVAL (HZ*3)
  23. #define CEC_VERSION "v1.0"
  24. //#define _SUPPORT_CEC_TV_MASTER_
  25. #define MSG_P0( init, follow, opcode ) { \
  26. gbl_msg[0] = (init)<<4 | (follow); \
  27. gbl_msg[1] = (opcode); \
  28. }
  29. #define MSG_P1( i, f, o, p1 ) { \
  30. gbl_msg[2]=(p1); MSG_P0((i),(f),(o)); }
  31. #define MSG_P2( i, f, o, p1, p2 ) { \
  32. gbl_msg[3]=(p2); MSG_P1((i),(f),(o),(p1)); }
  33. #define MSG_P3( i, f, o, p1, p2, p3 ) { \
  34. gbl_msg[4]=(p3); MSG_P2((i),(f),(o),(p1),(p2)); }
  35. #define MSG_P4( i, f, o, p1, p2, p3, p4 ) { \
  36. gbl_msg[5]=(p4); MSG_P3((i),(f),(o),(p1),(p2),(p3)); }
  37. #define MSG_P5( i, f, o, p1, p2, p3, p4, p5 ) { \
  38. gbl_msg[6]=(p5); MSG_P4((i),(f),(o),(p1),(p2),(p3),(p4)); }
  39. #define MSG_P6( i, f, o, p1, p2, p3, p4, p5, p6 ) { \
  40. gbl_msg[7]=(p6); MSG_P5((i),(f),(o),(p1),(p2),(p3),(p4),(p5)); }
  41. #define MSG_P7( i, f, o, p1, p2, p3, p4, p5, p6, p7 ) { \
  42. gbl_msg[8]=(p7); MSG_P6((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6)); }
  43. #define MSG_P8( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8 ) { \
  44. gbl_msg[9]=(p8); MSG_P7((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7)); }
  45. #define MSG_P9( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9 ) { \
  46. gbl_msg[10]=(p9); MSG_P8((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8)); }
  47. #define MSG_P10( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10 ) { \
  48. gbl_msg[11]=(p10); MSG_P9((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8),(p9)); }
  49. #define MSG_P11( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11 ) { \
  50. gbl_msg[12]=(p11); MSG_P10((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8),(p9),(p10)); }
  51. #define MSG_P12( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12 ) { \
  52. gbl_msg[13]=(p12); MSG_P11((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8),(p9),(p10),(p11)); }
  53. #define MSG_P13( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12, p13 ) { \
  54. gbl_msg[14]=(p13); MSG_P12((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8),(p9),(p10),(p11),(p12)); }
  55. #define MSG_P14( i, f, o, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12, p13, p14 ) { \
  56. gbl_msg[15]=(p14); MSG_P13((i),(f),(o),(p1),(p2),(p3),(p4),(p5),(p6),(p7),(p8),(p9),(p10),(p11),(p12),(p13)); }
  57. #define MAX_MSG 16
  58. #define MAX_NUM_OF_DEV 16
  59. enum _cec_ping_e {
  60. CEC_PING_REPLY = 0,
  61. CEC_PING_FAIL
  62. };
  63. enum _cec_log_dev_addr_e {
  64. CEC_TV_ADDR = 0x00,
  65. CEC_RECORDING_DEVICE_1_ADDR,
  66. CEC_RECORDING_DEVICE_2_ADDR,
  67. CEC_TUNER_1_ADDR,
  68. CEC_PLAYBACK_DEVICE_1_ADDR,
  69. CEC_AUDIO_SYSTEM_ADDR,
  70. CEC_TUNER_2_ADDR,
  71. CEC_TUNER_3_ADDR,
  72. CEC_PLAYBACK_DEVICE_2_ADDR,
  73. CEC_RECORDING_DEVICE_3_ADDR,
  74. CEC_TUNER_4_ADDR,
  75. CEC_PLAYBACK_DEVICE_3_ADDR,
  76. CEC_RESERVED_1_ADDR,
  77. CEC_RESERVED_2_ADDR,
  78. CEC_FREE_USE_ADDR,
  79. CEC_UNREGISTERED_ADDR
  80. };
  81. #define CEC_BROADCAST_ADDR CEC_UNREGISTERED_ADDR
  82. #define CEC_TV ( 1 << CEC_TV_ADDR )
  83. #define CEC_RECORDING_DEVICE_1 ( 1 << CEC_RECORDING_DEVICE_1_ADDR )
  84. #define CEC_RECORDING_DEVICE_2 ( 1 << CEC_RECORDING_DEVICE_2_ADDR )
  85. #define CEC_TUNER_1 ( 1 << CEC_TUNER_1_ADDR )
  86. #define CEC_PLAYBACK_DEVICE_1 ( 1 << CEC_PLAYBACK_DEVICE_1_ADDR )
  87. #define CEC_AUDIO_SYSTEM ( 1 << CEC_AUDIO_SYSTEM_ADDR )
  88. #define CEC_TUNER_2 ( 1 << CEC_TUNER_2_ADDR )
  89. #define CEC_TUNER_3 ( 1 << CEC_TUNER_3_ADDR )
  90. #define CEC_PLAYBACK_DEVICE_2 ( 1 << CEC_PLAYBACK_DEVICE_2_ADDR )
  91. #define CEC_RECORDING_DEVICE_3 ( 1 << CEC_RECORDING_DEVICE_3_ADDR )
  92. #define CEC_TUNER_4 ( 1 << CEC_TUNER_4_ADDR )
  93. #define CEC_PLAYBACK_DEVICE_3 ( 1 << CEC_PLAYBACK_DEVICE_3_ADDR )
  94. #define CEC_RESERVED_1 ( 1 << CEC_RESERVED_1_ADDR )
  95. #define CEC_RESERVED_2 ( 1 << CEC_RESERVED_2_ADDR )
  96. #define CEC_FREE_USE ( 1 << CEC_FREE_USE_ADDR )
  97. #define CEC_UNREGISTERED ( 1 << CEC_UNREGISTERED_ADDR )
  98. #define CEC_DISPLAY_DEVICE ( CEC_TV | CEC_FREE_USE )
  99. #define CEC_RECORDING_DEVICE ( CEC_RECORDING_DEVICE_1 | CEC_RECORDING_DEVICE_2 | CEC_RECORDING_DEVICE_3 )
  100. #define CEC_PLAYBACK_DEVICE ( CEC_PLAYBACK_DEVICE_1 | CEC_PLAYBACK_DEVICE_2 | CEC_PLAYBACK_DEVICE_3 )
  101. #define CEC_TUNER_DEVICE ( CEC_TUNER_1 | CEC_TUNER_2 | CEC_TUNER_3 | CEC_TUNER_4 )
  102. #define CEC_AUDIO_SYSTEM_DEVICE ( CEC_AUDIO_SYSTEM )
  103. enum cec_dev_type_addr {
  104. CEC_DISPLAY_DEVICE_TYPE = 0x0,
  105. CEC_RECORDING_DEVICE_TYPE,
  106. CEC_RESERVED_DEVICE_TYPE,
  107. CEC_TUNER_DEVICE_TYPE,
  108. CEC_PLAYBACK_DEVICE_TYPE,
  109. CEC_AUDIO_SYSTEM_DEVICE_TYPE,
  110. CEC_UNREGISTERED_DEVICE_TYPE,
  111. };
  112. typedef struct _context_t {
  113. unsigned char state;
  114. } context_t;
  115. /*
  116. * CEC OPCODES
  117. */
  118. #define CEC_OC_ABORT_MESSAGE 0xFF
  119. #define CEC_OC_ACTIVE_SOURCE 0x82
  120. #define CEC_OC_CEC_VERSION 0x9E
  121. #define CEC_OC_CLEAR_ANALOGUE_TIMER 0x33
  122. #define CEC_OC_CLEAR_DIGITAL_TIMER 0x99
  123. #define CEC_OC_CLEAR_EXTERNAL_TIMER 0xA1
  124. #define CEC_OC_DECK_CONTROL 0x42
  125. #define CEC_OC_DECK_STATUS 0x1B
  126. #define CEC_OC_DEVICE_VENDOR_ID 0x87
  127. #define CEC_OC_FEATURE_ABORT 0x00
  128. #define CEC_OC_GET_CEC_VERSION 0x9F
  129. #define CEC_OC_GET_MENU_LANGUAGE 0x91
  130. #define CEC_OC_GIVE_AUDIO_STATUS 0x71
  131. #define CEC_OC_GIVE_DECK_STATUS 0x1A
  132. #define CEC_OC_GIVE_DEVICE_POWER_STATUS 0x8F
  133. #define CEC_OC_GIVE_DEVICE_VENDOR_ID 0x8C
  134. #define CEC_OC_GIVE_OSD_NAME 0x46
  135. #define CEC_OC_GIVE_PHYSICAL_ADDRESS 0x83
  136. #define CEC_OC_GIVE_SYSTEM_AUDIO_MODE_STATUS 0x7D
  137. #define CEC_OC_GIVE_TUNER_DEVICE_STATUS 0x08
  138. #define CEC_OC_IMAGE_VIEW_ON 0x04
  139. #define CEC_OC_INACTIVE_SOURCE 0x9D
  140. #define CEC_OC_MENU_REQUEST 0x8D
  141. #define CEC_OC_MENU_STATUS 0x8E
  142. #define CEC_OC_PLAY 0x41
  143. #define CEC_OC_POLLING_MESSAGE 0xFC /* Fake Code - <Poll Message> has no OP Code and requires only the header byte */
  144. #define CEC_OC_RECORD_OFF 0x0B
  145. #define CEC_OC_RECORD_ON 0x09
  146. #define CEC_OC_RECORD_STATUS 0x0A
  147. #define CEC_OC_RECORD_TV_SCREEN 0x0F
  148. #define CEC_OC_REPORT_AUDIO_STATUS 0x7A
  149. #define CEC_OC_REPORT_PHYSICAL_ADDRESS 0x84
  150. #define CEC_OC_REPORT_POWER_STATUS 0x90
  151. #define CEC_OC_REQUEST_ACTIVE_SOURCE 0x85
  152. #define CEC_OC_ROUTING_CHANGE 0x80
  153. #define CEC_OC_ROUTING_INFORMATION 0x81
  154. #define CEC_OC_SELECT_ANALOGUE_SERVICE 0x92
  155. #define CEC_OC_SELECT_DIGITAL_SERVICE 0x93
  156. #define CEC_OC_SET_ANALOGUE_TIMER 0x34
  157. #define CEC_OC_SET_AUDIO_RATE 0x9A
  158. #define CEC_OC_SET_DIGITAL_TIMER 0x97
  159. #define CEC_OC_SET_EXTERNAL_TIMER 0xA2
  160. #define CEC_OC_SET_MENU_LANGUAGE 0x32
  161. #define CEC_OC_SET_OSD_NAME 0x47
  162. #define CEC_OC_SET_OSD_STRING 0x64
  163. #define CEC_OC_SET_STREAM_PATH 0x86
  164. #define CEC_OC_SET_SYSTEM_AUDIO_MODE 0x72
  165. #define CEC_OC_SET_TIMER_PROGRAM_TITLE 0x67
  166. #define CEC_OC_STANDBY 0x36
  167. #define CEC_OC_SYSTEM_AUDIO_MODE_REQUEST 0x70
  168. #define CEC_OC_SYSTEM_AUDIO_MODE_STATUS 0x7E
  169. #define CEC_OC_TEXT_VIEW_ON 0x0D
  170. #define CEC_OC_TIMER_CLEARED_STATUS 0x43
  171. #define CEC_OC_TIMER_STATUS 0x35
  172. #define CEC_OC_TUNER_DEVICE_STATUS 0x07
  173. #define CEC_OC_TUNER_STEP_DECREMENT 0x06
  174. #define CEC_OC_TUNER_STEP_INCREMENT 0x05
  175. #define CEC_OC_USER_CONTROL_PRESSED 0x44
  176. #define CEC_OC_USER_CONTROL_RELEASED 0x45
  177. #define CEC_OC_VENDOR_COMMAND 0x89
  178. #define CEC_OC_VENDOR_COMMAND_WITH_ID 0xA0
  179. #define CEC_OC_VENDOR_REMOTE_BUTTON_DOWN 0x8A
  180. #define CEC_OC_VENDOR_REMOTE_BUTTON_UP 0x8B
  181. /* cec message structure */
  182. typedef struct {
  183. union {
  184. unsigned char buffer[16]; // message memory
  185. struct {
  186. unsigned char header; // 4bit Initiator logical address + 4bit Destination logical address
  187. unsigned char opcode; // message opcode
  188. unsigned char operands[14]; // the maximun operand is 14
  189. }msg; // message struct
  190. }content; // message content
  191. unsigned char operand_num; // number of operand
  192. unsigned char msg_length;
  193. } cec_rx_message_t;
  194. typedef struct {
  195. cec_rx_message_t cec_message;
  196. struct list_head list;
  197. } cec_rx_message_list_t;
  198. typedef struct {
  199. unsigned char msg[MAX_MSG];
  200. unsigned char length;
  201. struct list_head list;
  202. } cec_tx_message_list_t;
  203. /* cec global struct */
  204. typedef enum {
  205. STATE_UNKNOWN = 0x00,
  206. STATE_START,
  207. STATE_STOP
  208. } cec_node_status_e;
  209. typedef enum {
  210. POWER_ON = 0x00,
  211. POWER_STANDBY,
  212. TRANS_STANDBY_TO_ON,
  213. TRANS_ON_TO_STANDBY,
  214. } cec_power_status_e;
  215. typedef enum {
  216. STATUS_REQ_ON = 1,
  217. STATUS_REQ_OFF,
  218. STATUS_REQ_ONCE,
  219. }status_req_mode_e;
  220. typedef enum {
  221. DECK_UNKNOWN_STATUS = 0,
  222. DECK_PLAY = 0X11,
  223. DECK_RECORD,
  224. DECK_PLAY_REVERSE,
  225. DECK_STILL,
  226. DECK_SLOW,
  227. DECK_SLOW_REVERSE,
  228. DECK_FAST_FORWARD,
  229. DECK_FAST_REVERSE,
  230. DECK_NO_MEDIA,
  231. DECK_STOP,
  232. DECK_SKIP_FORWARD_WIND,
  233. DECK_SKIP_REVERSE_REWIND,
  234. DECK_INDEX_SEARCH_FORWARD,
  235. DECK_INDEX_SEARCH_REVERSE,
  236. DECK_OTHER_STATUS,
  237. } deck_info_e;
  238. typedef enum {
  239. DECK_CNT_SKIP_FORWARD_WIND = 1,
  240. DECK_CNT_SKIP_REVERSE_REWIND,
  241. DECK_CNT_STOP,
  242. DECK_CNT_EJECT,
  243. } deck_cnt_mode_e;
  244. typedef enum {
  245. PLAY_FORWARD = 0X24,
  246. PLAY_REVERSE = 0X20,
  247. PLAY_STILL = 0X25,
  248. FAST_FORWARD_MIN_SPEED = 0X05,
  249. FAST_FORWARD_MEDIUM_SPEED = 0X06,
  250. FAST_FORWARD_MAX_SPEED = 0X07,
  251. FAST_REVERSE_MIN_SPEED = 0X09,
  252. FAST_REVERSE_MEDIUM_SPEED = 0X0A,
  253. FAST_REVERSE_MAX_SPEED = 0X0B,
  254. SLOW_FORWARD_MIN_SPEED = 0X15,
  255. SLOW_FORWARD_MEDIUM_SPEED = 0X16,
  256. SLOW_FORWARD_MAX_SPEED = 0X17,
  257. SLOW_REVERSE_MIN_SPEED = 0X19,
  258. SLOW_REVERSE_MEDIUM_SPEED = 0X1A,
  259. SLOW_REVERSE_MAX_SPEED = 0X1B,
  260. } play_mode_e;
  261. typedef enum {
  262. MENU_REQ_ACTIVATE = 0,
  263. MENU_REQ_DEACTIVATE,
  264. MENU_REQ_QUERY,
  265. } menu_req_type_e;
  266. typedef enum {
  267. MENU_STATE_ACTIVATED = 0,
  268. MENU_STATE_DEACTIVATED,
  269. } menu_state_e;
  270. typedef enum {
  271. CEC_VERSION_11 = 0,
  272. CEC_VERSION_12,
  273. CEC_VERSION_12A,
  274. CEC_VERSION_13,
  275. CEC_VERSION_13A,
  276. } cec_version_e;
  277. typedef enum {
  278. CEC_HDMI_PORT_UKNOWN = 0,
  279. CEC_HDMI_PORT_1,
  280. CEC_HDMI_PORT_2,
  281. CEC_HDMI_PORT_3,
  282. } cec_hdmi_port_e;
  283. typedef enum {
  284. CEC_MENU_LANG_CHN = 0,
  285. CEC_MENU_LANG_ENG,
  286. CEC_MENU_LANG_JAP,
  287. CEC_MENU_LANG_KOR,
  288. CEC_MENU_LANG_FRA,
  289. CEC_MENU_LANG_GER,
  290. } cec_menu_lang_e;
  291. typedef unsigned long cec_info_mask;
  292. #define INFO_MASK_CEC_VERSION (1<<0)
  293. #define INFO_MASK_VENDOR_ID (1<<1)
  294. #define INFO_MASK_DEVICE_TYPE (1<<2)
  295. #define INFO_MASK_POWER_STATUS (1<<3)
  296. #define INFO_MASK_PHYSICAL_ADDRESS (1<<4)
  297. #define INFO_MASK_LOGIC_ADDRESS (1<<5)
  298. #define INFO_MASK_OSD_NAME (1<<6)
  299. #define INFO_MASK_MENU_STATE (1<<7)
  300. #define INFO_MASK_MENU_LANGUAGE (1<<8)
  301. #define INFO_MASK_DECK_INfO (1<<9)
  302. #define INFO_MASK_PLAY_MODE (1<<10)
  303. //typedef struct {
  304. // unsigned long vendor_id;
  305. // unsigned char vendor_id_byte_num;
  306. //} vendor_id_t;
  307. //typedef struct {
  308. // unsigned char vsdb_phy_addr_offset;
  309. // unsigned short phy_addr[3];
  310. // unsigned char checksum[3];
  311. //} vsdb_phy_addr_t;
  312. typedef struct {
  313. cec_hdmi_port_e hdmi_port;
  314. cec_info_mask real_info_mask;
  315. unsigned char cec_version;
  316. unsigned int vendor_id:24;
  317. // vendor_id_t vendor_id;
  318. unsigned char dev_type;
  319. cec_power_status_e power_status;
  320. union {
  321. unsigned short phy_addr_4;
  322. struct {
  323. unsigned char cd;
  324. unsigned char ab;
  325. } phy_addr_2;
  326. struct {
  327. unsigned char d:4;
  328. unsigned char c:4;
  329. unsigned char b:4;
  330. unsigned char a:4;
  331. }phy_addr_1;
  332. }phy_addr;
  333. unsigned char log_addr;
  334. unsigned char osd_name[16];
  335. unsigned char osd_name_def[16];
  336. menu_state_e menu_state;
  337. cec_menu_lang_e menu_lang;
  338. union {
  339. struct {
  340. } display;
  341. struct {
  342. } recording;
  343. struct {
  344. deck_cnt_mode_e deck_cnt_mode;
  345. deck_info_e deck_info;
  346. play_mode_e play_mode;
  347. } playback;
  348. struct {
  349. } tuner;
  350. struct {
  351. } audio;
  352. }specific_info;
  353. } cec_node_info_t;
  354. typedef struct {
  355. unsigned short dev_mask;
  356. //unsigned char tv_log_addr;
  357. //unsigned short tv_phy_addr;
  358. unsigned char active_log_dev;
  359. unsigned char my_node_index;
  360. cec_node_info_t cec_node_info[MAX_NUM_OF_DEV];
  361. } cec_global_info_t;
  362. typedef struct {
  363. unsigned char dev_number;
  364. unsigned char active_log_dev;
  365. cec_node_info_t cec_node_info_online[];
  366. } cec_global_info_to_usr_t;
  367. typedef enum {
  368. GET_CEC_VERSION = 0,
  369. GET_POWER_STATUS,
  370. GET_DEV_POWER_STATUS,
  371. GET_DEV_VENDOR_ID,
  372. GET_OSD_NAME,
  373. GET_OSD_STRING,
  374. GET_PHYSICAL_ADDR,
  375. GET_SYSTEM_AUDIO_MODE,
  376. GET_TUNER_DEV_STATUS, //0x8
  377. GIVE_DECK_STATUS,
  378. SET_DECK_CONTROL_MODE,
  379. SET_PLAY_MODE,
  380. GET_AUDIO_STATUS,
  381. SET_STANDBY,
  382. SET_IMAGEVIEW_ON,
  383. GET_MENU_STATE,
  384. SET_MENU_STATE, //0x10
  385. SET_MENU_LANGAGE,
  386. GET_MENU_LANGUAGE,
  387. GET_ACTIVE_SOURCE,
  388. SET_ACTIVE_SOURCE,
  389. SET_DEACTIVE_SOURCE,
  390. CLR_NODE_DEV_REAL_INFO_MASK,
  391. //SET_STREAM_PATH,
  392. REPORT_PHYSICAL_ADDRESS, //0x17
  393. SET_TEXT_VIEW_ON,
  394. USR_CMD_MAX,
  395. } usr_cmd_type_e;
  396. typedef enum {
  397. TV_CEC_PENDING_OFF = 0,
  398. TV_CEC_PENDING_ON,
  399. } tv_cec_pending_e;
  400. typedef enum {
  401. TV_CEC_POLLING_OFF = 0,
  402. TV_CEC_POLLING_ON,
  403. } tv_cec_polling_state_e;
  404. int cec_ll_tx(unsigned char *msg, unsigned char len, unsigned char *stat_header);
  405. void cec_test_function(unsigned char* arg, unsigned char arg_cnt);
  406. void cec_init(hdmitx_dev_t* hdmitx_device);
  407. void cec_uninit(hdmitx_dev_t* hdmitx_device);
  408. void cec_node_init(hdmitx_dev_t* hdmitx_device);
  409. void cec_node_uninit(hdmitx_dev_t* hdmitx_device);
  410. void cec_hw_reset(void);
  411. void register_cec_rx_msg(unsigned char *msg, unsigned char len );
  412. void cec_handle_message(cec_rx_message_t* pcec_message);
  413. void unregister_cec_tx_msg(cec_tx_message_list_t* cec_usr_message_list);
  414. void register_cec_tx_msg(unsigned char *msg, unsigned char len);
  415. void cec_usr_cmd_post_process(void);
  416. void cec_set_pending(tv_cec_pending_e on_off);
  417. void cec_polling_online_dev(int log_addr, int *bool);
  418. void cec_usrcmd_get_cec_version(unsigned char log_addr);
  419. void cec_usrcmd_get_audio_status(unsigned char log_addr);
  420. void cec_usrcmd_get_deck_status(unsigned char log_addr);
  421. void cec_usrcmd_get_device_power_status(unsigned char log_addr);
  422. void cec_usrcmd_get_device_vendor_id(unsigned char log_addr);
  423. void cec_usrcmd_get_osd_name(unsigned char log_addr);
  424. void cec_usrcmd_get_physical_address(unsigned char log_addr);
  425. void cec_usrcmd_get_system_audio_mode_status(unsigned char log_addr);
  426. void cec_usrcmd_get_tuner_device_status(unsigned char log_addr);
  427. void cec_usrcmd_parse_all_dev_online(void);
  428. void cec_usrcmd_set_deck_cnt_mode(unsigned char log_addr, deck_cnt_mode_e deck_cnt_mode);
  429. void cec_usrcmd_set_standby(unsigned char log_addr);
  430. void cec_usrcmd_set_imageview_on(unsigned char log_addr);
  431. void cec_usrcmd_set_play_mode(unsigned char log_addr, play_mode_e play_mode);
  432. void cec_usrcmd_get_menu_state(unsigned char log_addr);
  433. void cec_usrcmd_set_menu_state(unsigned char log_addr, menu_req_type_e menu_req_type);
  434. void cec_usrcmd_get_menu_language(unsigned char log_addr);
  435. void cec_usrcmd_set_menu_language(unsigned char log_addr, cec_menu_lang_e menu_lang);
  436. void cec_usrcmd_get_active_source(void);
  437. void cec_usrcmd_set_active_source(void);
  438. void cec_usrcmd_set_deactive_source(unsigned char log_addr);
  439. void cec_usrcmd_clear_node_dev_real_info_mask(unsigned char log_addr, cec_info_mask mask);
  440. void cec_usrcmd_set_report_physical_address(void);
  441. void cec_usrcmd_text_view_on(unsigned char log_addr);
  442. void cec_polling_online_dev(int log_addr, int *bool);
  443. size_t cec_usrcmd_get_global_info(char * buf);
  444. void cec_usrcmd_set_dispatch(const char * buf, size_t count);
  445. #endif