async_memset.c 2.6 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889
  1. /*
  2. * memory fill offload engine support
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/mm.h>
  29. #include <linux/dma-mapping.h>
  30. #include <linux/async_tx.h>
  31. /**
  32. * async_memset - attempt to fill memory with a dma engine.
  33. * @dest: destination page
  34. * @val: fill value
  35. * @offset: offset in pages to start transaction
  36. * @len: length in bytes
  37. *
  38. * honored flags: ASYNC_TX_ACK
  39. */
  40. struct dma_async_tx_descriptor *
  41. async_memset(struct page *dest, int val, unsigned int offset, size_t len,
  42. struct async_submit_ctl *submit)
  43. {
  44. struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMSET,
  45. &dest, 1, NULL, 0, len);
  46. struct dma_device *device = chan ? chan->device : NULL;
  47. struct dma_async_tx_descriptor *tx = NULL;
  48. if (device && is_dma_fill_aligned(device, offset, 0, len)) {
  49. dma_addr_t dma_dest;
  50. unsigned long dma_prep_flags = 0;
  51. if (submit->cb_fn)
  52. dma_prep_flags |= DMA_PREP_INTERRUPT;
  53. if (submit->flags & ASYNC_TX_FENCE)
  54. dma_prep_flags |= DMA_PREP_FENCE;
  55. dma_dest = dma_map_page(device->dev, dest, offset, len,
  56. DMA_FROM_DEVICE);
  57. tx = device->device_prep_dma_memset(chan, dma_dest, val, len,
  58. dma_prep_flags);
  59. }
  60. if (tx) {
  61. pr_debug("%s: (async) len: %zu\n", __func__, len);
  62. async_tx_submit(chan, tx, submit);
  63. } else { /* run the memset synchronously */
  64. void *dest_buf;
  65. pr_debug("%s: (sync) len: %zu\n", __func__, len);
  66. dest_buf = page_address(dest) + offset;
  67. /* wait for any prerequisite operations */
  68. async_tx_quiesce(&submit->depend_tx);
  69. memset(dest_buf, val, len);
  70. async_tx_sync_epilog(submit);
  71. }
  72. return tx;
  73. }
  74. EXPORT_SYMBOL_GPL(async_memset);
  75. MODULE_AUTHOR("Intel Corporation");
  76. MODULE_DESCRIPTION("asynchronous memset api");
  77. MODULE_LICENSE("GPL");