async_memcpy.c 3.0 KB

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  1. /*
  2. * copy offload engine support
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/highmem.h>
  28. #include <linux/mm.h>
  29. #include <linux/dma-mapping.h>
  30. #include <linux/async_tx.h>
  31. /**
  32. * async_memcpy - attempt to copy memory with a dma engine.
  33. * @dest: destination page
  34. * @src: src page
  35. * @dest_offset: offset into 'dest' to start transaction
  36. * @src_offset: offset into 'src' to start transaction
  37. * @len: length in bytes
  38. * @submit: submission / completion modifiers
  39. *
  40. * honored flags: ASYNC_TX_ACK
  41. */
  42. struct dma_async_tx_descriptor *
  43. async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
  44. unsigned int src_offset, size_t len,
  45. struct async_submit_ctl *submit)
  46. {
  47. struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
  48. &dest, 1, &src, 1, len);
  49. struct dma_device *device = chan ? chan->device : NULL;
  50. struct dma_async_tx_descriptor *tx = NULL;
  51. if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
  52. dma_addr_t dma_dest, dma_src;
  53. unsigned long dma_prep_flags = 0;
  54. if (submit->cb_fn)
  55. dma_prep_flags |= DMA_PREP_INTERRUPT;
  56. if (submit->flags & ASYNC_TX_FENCE)
  57. dma_prep_flags |= DMA_PREP_FENCE;
  58. dma_dest = dma_map_page(device->dev, dest, dest_offset, len,
  59. DMA_FROM_DEVICE);
  60. dma_src = dma_map_page(device->dev, src, src_offset, len,
  61. DMA_TO_DEVICE);
  62. tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src,
  63. len, dma_prep_flags);
  64. }
  65. if (tx) {
  66. pr_debug("%s: (async) len: %zu\n", __func__, len);
  67. async_tx_submit(chan, tx, submit);
  68. } else {
  69. void *dest_buf, *src_buf;
  70. pr_debug("%s: (sync) len: %zu\n", __func__, len);
  71. /* wait for any prerequisite operations */
  72. async_tx_quiesce(&submit->depend_tx);
  73. dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
  74. src_buf = kmap_atomic(src, KM_USER1) + src_offset;
  75. memcpy(dest_buf, src_buf, len);
  76. kunmap_atomic(src_buf, KM_USER1);
  77. kunmap_atomic(dest_buf, KM_USER0);
  78. async_tx_sync_epilog(submit);
  79. }
  80. return tx;
  81. }
  82. EXPORT_SYMBOL_GPL(async_memcpy);
  83. MODULE_AUTHOR("Intel Corporation");
  84. MODULE_DESCRIPTION("asynchronous memcpy api");
  85. MODULE_LICENSE("GPL");