tlb.c 3.1 KB

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  1. /*
  2. * arch/xtensa/mm/tlb.c
  3. *
  4. * Logic that manipulates the Xtensa MMU. Derived from MIPS.
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2003 Tensilica Inc.
  11. *
  12. * Joe Taylor
  13. * Chris Zankel <chris@zankel.net>
  14. * Marc Gauthier
  15. */
  16. #include <linux/mm.h>
  17. #include <asm/processor.h>
  18. #include <asm/mmu_context.h>
  19. #include <asm/tlbflush.h>
  20. #include <asm/system.h>
  21. #include <asm/cacheflush.h>
  22. static inline void __flush_itlb_all (void)
  23. {
  24. int w, i;
  25. for (w = 0; w < ITLB_ARF_WAYS; w++) {
  26. for (i = 0; i < (1 << XCHAL_ITLB_ARF_ENTRIES_LOG2); i++) {
  27. int e = w + (i << PAGE_SHIFT);
  28. invalidate_itlb_entry_no_isync(e);
  29. }
  30. }
  31. asm volatile ("isync\n");
  32. }
  33. static inline void __flush_dtlb_all (void)
  34. {
  35. int w, i;
  36. for (w = 0; w < DTLB_ARF_WAYS; w++) {
  37. for (i = 0; i < (1 << XCHAL_DTLB_ARF_ENTRIES_LOG2); i++) {
  38. int e = w + (i << PAGE_SHIFT);
  39. invalidate_dtlb_entry_no_isync(e);
  40. }
  41. }
  42. asm volatile ("isync\n");
  43. }
  44. void flush_tlb_all (void)
  45. {
  46. __flush_itlb_all();
  47. __flush_dtlb_all();
  48. }
  49. /* If mm is current, we simply assign the current task a new ASID, thus,
  50. * invalidating all previous tlb entries. If mm is someone else's user mapping,
  51. * wie invalidate the context, thus, when that user mapping is swapped in,
  52. * a new context will be assigned to it.
  53. */
  54. void flush_tlb_mm(struct mm_struct *mm)
  55. {
  56. if (mm == current->active_mm) {
  57. int flags;
  58. local_save_flags(flags);
  59. __get_new_mmu_context(mm);
  60. __load_mmu_context(mm);
  61. local_irq_restore(flags);
  62. }
  63. else
  64. mm->context = 0;
  65. }
  66. #define _ITLB_ENTRIES (ITLB_ARF_WAYS << XCHAL_ITLB_ARF_ENTRIES_LOG2)
  67. #define _DTLB_ENTRIES (DTLB_ARF_WAYS << XCHAL_DTLB_ARF_ENTRIES_LOG2)
  68. #if _ITLB_ENTRIES > _DTLB_ENTRIES
  69. # define _TLB_ENTRIES _ITLB_ENTRIES
  70. #else
  71. # define _TLB_ENTRIES _DTLB_ENTRIES
  72. #endif
  73. void flush_tlb_range (struct vm_area_struct *vma,
  74. unsigned long start, unsigned long end)
  75. {
  76. struct mm_struct *mm = vma->vm_mm;
  77. unsigned long flags;
  78. if (mm->context == NO_CONTEXT)
  79. return;
  80. #if 0
  81. printk("[tlbrange<%02lx,%08lx,%08lx>]\n",
  82. (unsigned long)mm->context, start, end);
  83. #endif
  84. local_save_flags(flags);
  85. if (end-start + (PAGE_SIZE-1) <= _TLB_ENTRIES << PAGE_SHIFT) {
  86. int oldpid = get_rasid_register();
  87. set_rasid_register (ASID_INSERT(mm->context));
  88. start &= PAGE_MASK;
  89. if (vma->vm_flags & VM_EXEC)
  90. while(start < end) {
  91. invalidate_itlb_mapping(start);
  92. invalidate_dtlb_mapping(start);
  93. start += PAGE_SIZE;
  94. }
  95. else
  96. while(start < end) {
  97. invalidate_dtlb_mapping(start);
  98. start += PAGE_SIZE;
  99. }
  100. set_rasid_register(oldpid);
  101. } else {
  102. flush_tlb_mm(mm);
  103. }
  104. local_irq_restore(flags);
  105. }
  106. void flush_tlb_page (struct vm_area_struct *vma, unsigned long page)
  107. {
  108. struct mm_struct* mm = vma->vm_mm;
  109. unsigned long flags;
  110. int oldpid;
  111. if(mm->context == NO_CONTEXT)
  112. return;
  113. local_save_flags(flags);
  114. oldpid = get_rasid_register();
  115. if (vma->vm_flags & VM_EXEC)
  116. invalidate_itlb_mapping(page);
  117. invalidate_dtlb_mapping(page);
  118. set_rasid_register(oldpid);
  119. local_irq_restore(flags);
  120. }